Patents by Inventor Kuei-Wu Huang
Kuei-Wu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170330991Abstract: The present invention provides a method of hydrogenating a solar cell and a device thereof. The device includes a chamber, a moving device, and a light-beam generator. The light-beam generated by the light-beam generator has a power density between 20 W/cm2 and 200 W/cm2 and a width between 1 mm and 156 mm. The light-beam scans a solar cell with a scanning speed between 50 mm/sec and 200 mm/sec to achieve hydrogenating the solar cell. Furthermore, the device includes a heating device used to heat the solar cell.Type: ApplicationFiled: July 4, 2016Publication date: November 16, 2017Inventors: Chung-Chi LIAU, Chung-Chi LIU, Yan-Kai CHIOU, Kang-Cheng LIN, Kuei-Wu HUANG
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Publication number: 20170330992Abstract: The present disclosure provides a method for recovering the efficacy of solar cell modules and a device thereof. The method includes providing a solar cell module and scanning the solar cell module with a light-beam. The light-beam has a power density between 20 W/cm2 and 200 W/cm2, a width between 1 mm and 156 mm. The light-beam scans a solar cell module with a scanning speed between 50 mm/sec and 200 mm/sec. Furthermore, the present disclosure also provides a portable device for recovering the efficacy of solar cell modules. The portable device includes two types such as placed type and hand-held type. The aforementioned devices can perform a hydrogenating process on solar cell modules to improve the degree of light-induced degradation (LID) so as to improve the photovoltaic conversion efficiency of solar cell modules.Type: ApplicationFiled: July 7, 2017Publication date: November 16, 2017Inventors: Chung-Chi LIAU, Chung-Chi LIU, Yan-Kai CHIOU, Kang-Cheng LIN, Kuei-Wu HUANG
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Patent number: 9748433Abstract: The present disclosure provides a method for recovering the efficacy of solar cell modules and a device thereof. The method includes providing a solar cell module and scanning the solar cell module with a light-beam. The light-beam has a power density between 20 W/cm2 and 200 W/cm2, a width between 1 mm and 156 mm. The light-beam scans a solar cell module with a scanning speed between 50 mm/sec and 200 mm/sec. Furthermore, the present disclosure also provides a portable device for recovering the efficacy of solar cell modules. The portable device includes two types such as placed type and hand-held type. The aforementioned devices can perform a hydrogenating process on solar cell modules to improve the degree of light-induced degradation (LID) so as to improve the photovoltaic conversion efficiency of solar cell modules.Type: GrantFiled: July 11, 2016Date of Patent: August 29, 2017Assignee: GINTECH ENERGY CORPORATIONInventors: Chung-Chi Liau, Chung-Chi Liu, Yan-Kai Chiou, Kang-Cheng Lin, Kuei-Wu Huang
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Publication number: 20170025554Abstract: A solar cell includes a semiconductor wafer, plural finger electrodes, at least one bus electrode, and at least one finger loop electrode. The semiconductor wafer has a light-receiving surface. The finger electrodes are arranged along a first direction and disposed on the light-receiving surface. The bus electrode is arranged along a second direction and disposed on the light-receiving surface, and the bus electrode is connected with the finger electrodes, in which the second direction is perpendicular to the first direction. The finger loop electrode is substantially arranged along the second direction and disposed on the light-receiving surface, and the finger loop electrode is connected to at least two of the finger electrodes, in which the finger loop electrode has a shape of non-square periodic wave.Type: ApplicationFiled: October 13, 2015Publication date: January 26, 2017Inventors: Chien-Feng YEH, Qi-Long WU, Chih-Lung LIN, Jen-Yin CHENG, Ching-Tang TSAI, Kuei-Wu HUANG
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Patent number: 9514965Abstract: A substrate having metallized surface is provided. The substrate having metallized surface includes a silicon substrate, an adhesive layer and a metallic layer. The silicon substrate has a silanated surface and the adhesive layer is disposed on the silanated surface. The metallic layer bonds to the silanated surface through the adhesive layer. The adhesive layer is formed with a plurality of colloidal nanoparticle groups, the colloidal nanoparticle groups each include at least one metallic nanoparticle capped with at least one polymer, and the metallic layer and the adhesive layer have chemical bonds formed there between.Type: GrantFiled: December 3, 2015Date of Patent: December 6, 2016Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Tzu-Chien Wei, Chih-Ming Chen, Tseng-Chieh Pan, Kuei-Chang Lai, Chung-Han Wu, Kuei-Po Chen, Nai-Tien Ou, Kuei-Wu Huang
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Publication number: 20160163567Abstract: A coating device for coating a coating liquid onto a substrate includes: a coating head having a coating-liquid outlet, adapted to move with respect to the substrate along a first axial direction and capable of coating the substrate with coating liquid through the coating-liquid outlet; and adjustment unit connected to the coating head and including a movable pad disposed proximal to the coating-liquid outlet and adapted to move along a second axial direction for adjusting the size of the opening of the coating-liquid outlet; and a drive assembly connected to the adjustment unit for controlling the adjustment unit to move along the second axial direction. Additionally a coating method is provided.Type: ApplicationFiled: December 3, 2015Publication date: June 9, 2016Inventors: TZU-CHIEN WEI, CHIH-MING CHEN, TSENG-CHIEH PAN, KUEI-CHANG LAI, CHUNG-HAN WU, KUEI-PO CHEN, NAI-TIEN OU, KUEI-WU HUANG
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Publication number: 20160118510Abstract: A solar cell includes a semiconductor substrate, a boron back surface field (BSF) layer, a passivation layer, a back electrode layer and an aluminum local BSF layer. The semiconductor substrate has a front surface and a back surface opposite to each other. The boron BSF layer is disposed in the semiconductor substrate beneath the back surface. The passivation layer is disposed over the boron BSF layer and has an opening through the passivation layer. The back electrode layer is disposed in the opening. The aluminum local BSF layer is disposed in the semiconductor substrate beneath the opening and in contact with the boron BSF layer and the back electrode layer.Type: ApplicationFiled: January 27, 2015Publication date: April 28, 2016Inventors: Chung-Han WU, Kuei-Po CHEN, Hsing-Hua WU, Hsin-Cheng LIN, Nai-Tien OU, Kuei-Wu HUANG
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Patent number: 8685784Abstract: An electrically conductive ribbon, which is soldered on an electrically conductive busbar of a photovoltaic panel, includes a cooper core and a tin based solder. The tin based solder fully wraps an outer surface of the cooper core, and has a convex solder surface, which has a first curvature to be fitted with a second curvature of a concave solder surface of the electrically conductive busbar.Type: GrantFiled: July 16, 2012Date of Patent: April 1, 2014Assignee: Gintech Energy CorporationInventors: Chen-Chan Wang, Kuei-Wu Huang, Nai-Tien Ou, Tien-Szu Chen, Ching-Tang Tsai, Kai-Sheng Chang, Hua-Hsuan Kuo, Chi-Cheng Lee, Yu-Chih Chan
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Patent number: 8647917Abstract: A method of manufacturing a solar cell includes the following steps. An ion implantation process is performed to a first surface of a substrate to form a first doping layer. Then, the ion implantation process is performed to a second surface of the substrate to form a second doping layer. After that, an annealing process is performed to the structure formed by the substrate, the first doping layer and the second doping layer, and forming a first passivation layer on the first doping layer and a second passivation layer on the second doping layer by the annealing process. A third passivation layer is formed on the first passivation layer formed after the annealing process and a fourth passivation layer is formed on the second passivation layer formed after the annealing process. Afterward, conductive electrodes are formed on the third passivation layer and the fourth passivation layer, respectively.Type: GrantFiled: July 27, 2011Date of Patent: February 11, 2014Assignee: Gintech Energy CorporationInventors: Yan-Kai Chiou, Ming-Chin Kuo, Ching-Tang Tsai, Tien-Szu Chen, Kuei-Wu Huang
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Patent number: 8420941Abstract: An electrically conductive ribbon, which is soldered on an electrically conductive busbar of a photovoltaic panel, includes a cooper core and a tin based solder. The tin based solder fully wraps an outer surface of the cooper core, and has a convex solder surface, which has a first curvature to be fitted with a second curvature of a concave solder surface of the electrically conductive busbar.Type: GrantFiled: May 19, 2010Date of Patent: April 16, 2013Assignee: Gintech Energy CorporationInventors: Chen-Chan Wang, Kuei-Wu Huang, Nai-Tien O, Tien-Szu Chen, Ching-Tang Tsai, Kai-Sheng Chang, Hua-Hsuan Kuo, Chi-Cheng Lee, Yu-Chih Chan
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Publication number: 20130056055Abstract: A solar energy cell includes a photoelectric conversion layer, an anti-reflection layer and a plurality of electrical conductive channels. The anti-reflection layer is disposed on the photoelectric conversion layer. The electrical conductive channels are disposed on the anti-reflection layer and electrically connected with the photoelectric conversion layer, wherein the electrical conductive channels include a conductive paste and pigments to enable a color thereof to be substantially the same as a color of the anti-reflection layer.Type: ApplicationFiled: November 10, 2011Publication date: March 7, 2013Inventors: Kuei-Wu HUANG, Ming-Chin KUO, Yan-Kai CHIOU, Ching-Tang TSAI, Tien-Szu CHEN
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Publication number: 20120276686Abstract: An electrically conductive ribbon, which is soldered on an electrically conductive busbar of a photovoltaic panel, includes a cooper core and a tin based solder. The tin based solder fully wraps an outer surface of the cooper core, and has a convex solder surface, which has a first curvature to be fitted with a second curvature of a concave solder surface of the electrically conductive busbar.Type: ApplicationFiled: July 16, 2012Publication date: November 1, 2012Inventors: Chen-Chan WANG, Kuei-Wu HUANG, Nai-Tien O, Tien-Szu CHEN, Ching-Tang TSAI, Kai-Sheng CHANG, Hua-Hsuan KUO, Chi-Cheng LEE, Yu-Chih CHAN
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Publication number: 20120255592Abstract: A photovoltaic panel includes a photovoltaic array, an electrically conductive busbar, a plurality of electrically conductive fingers and an electrically conductive ribbon. The electrically conductive busbar is disposed on the photovoltaic array and having a plurality of connection ribs. The electrically conductive fingers are disposed on the photovoltaic array and connected with the connection ribs respectively. The electrically conductive ribbon is soldered on the electrically conductive busbar, wherein a gap is formed between each electrically conductive finger and the electrically conductive ribbon.Type: ApplicationFiled: July 26, 2011Publication date: October 11, 2012Applicant: GINTECH ENERGY CORPORATIONInventors: Kai-Sheng Chang, Chen-Chan Wang, Tzu-Chun Chen, Chia-Hung Wu, Hung-Ming Lin, Ching-Tang Tsai, Tien-Szu Chen, Kuei-Wu Huang
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Publication number: 20120220070Abstract: A method of manufacturing a solar cell includes the following steps. An ion implantation process is performed to a first surface of a substrate to form a first doping layer. Then, the ion implantation process is performed to a second surface of the substrate to form a second doping layer. After that, an annealing process is performed to the structure formed by the substrate, the first doping layer and the second doping layer, and forming a first passivation layer on the first doping layer and a second passivation layer on the second doping layer by the annealing process. A third passivation layer is formed on the first passivation layer formed after the annealing process and a fourth passivation layer is formed on the second passivation layer formed after the annealing process. Afterward, conductive electrodes are formed on the third passivation layer and the fourth passivation layer, respectively.Type: ApplicationFiled: July 27, 2011Publication date: August 30, 2012Applicant: GINTECH ENERGY CORPORATIONInventors: Yan-Kai CHIOU, Ming-Chin KUO, Ching-Tang TSAI, Tien-Szu CHEN, Kuei-Wu HUANG
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Publication number: 20110240339Abstract: An electrically conductive ribbon, which is soldered on an electrically conductive busbar of a photovoltaic panel, includes a cooper core and a tin based solder. The tin based solder fully wraps an outer surface of the cooper core, and has a convex solder surface, which has a first curvature to be fitted with a second curvature of a concave solder surface of the electrically conductive busbar.Type: ApplicationFiled: May 19, 2010Publication date: October 6, 2011Inventors: Chen-Chan Wang, Kuei-Wu Huang, Nai-Tien O., Tien-Szu Chen, Ching-Tang Tsai, Kai-Sheng Chang, Hua-Hsuan Kuo, Chi-Cheng Lee, Yu-Chih Chan
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Patent number: 7271103Abstract: A Cu damascene structure is formed where Cu diffusion barrier is formed by treating the top surface of the surrounding low-k interlayer dielectric with nitrogen or carbon containing medium to form a silicon nitride or silicon carbide diffusion barrier rather than capping the top surface of the Cu with metal diffusion barrier as is conventionally done.Type: GrantFiled: October 17, 2003Date of Patent: September 18, 2007Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuei-Wu Huang, Ai-Sen Liu, Baw-Ching Perng, Ming-Ta Lei, Wen-Kai Wan, Cheng-Chung Lin, Yih-Shung Lin, Chia-Hui Lin
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Publication number: 20050085083Abstract: A Cu damascene structure is formed where Cu diffusion barrier is formed by treating the top surface of the surrounding low-k interlayer dielectric with nitrogen or carbon containing medium to form a silicon nitride or silicon carbide diffusion barrier rather than capping the top surface of the Cu with metal diffusion barrier as is conventionally done.Type: ApplicationFiled: October 17, 2003Publication date: April 21, 2005Inventors: Kuei-Wu Huang, Ai-Sen Liu, Baw-Ching Perng, Ming-Ta Lei, Wen-Kai Wan, Cheng-Chung Lin, Yih-Shung Lin, Chia-Hui Lin
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Patent number: 6746900Abstract: In a method of forming an integrated circuit, a sacrificial layer is formed over a substrate. The sacrificial layer has a gate trench formed therein and a first layer of a first material formed over the substrate in the gate trench. A second layer of a second material is formed over the first layer in the gate trench. The first and second layers are processed to form a layer of a high-K dielectric material.Type: GrantFiled: February 19, 2003Date of Patent: June 8, 2004Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ai-Sen Liu, Baw-Ching Perng, Ming-Ta Lei, Wen-Kai Wan, Cheng-Chung Lin, Kuei-Wu Huang, Yih-Shung Lin, Chia-Hui Lin
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Patent number: 6617638Abstract: A method is provided to form a split-gate flash memory not susceptible to inadvertent reverse tunneling during programming. This is accomplished by forming a silicon nitride spacer on the negatively tapered walls of the floating gate of the cell which serves as a barrier to reverse tunneling. The negatively tapered walls, in contrast to vertical walls, is disclosed to provide a geometry better suited for forming thicker spacers around the floating gate, which in turn serve to act as a more robust barrier to reverse tunneling. Furthermore, it is shown that the method requires fewer steps than practiced in prior art.Type: GrantFiled: January 8, 2001Date of Patent: September 9, 2003Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: An-Ming Chiang, Kuei-Wu Huang
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Patent number: RE41068Abstract: The cross-sectional area of a thin-film transistor (TFT) is decreased in order to minimize bitline to supply leakage of the TFT. This is accomplished by utilizing a spacer etch process to manufacture a TFT having a very narrow and thin channel in a controllable manner. The spacer dimensions of the TFT may be adjusted by simply modifying the thicknesses of the poly gate and the channel poly. The channel thickness is limited by the thickness of the deposited channel polysilicon which may be as thin as approximately 300 ? to 500 ?, and the channel width of the TFT corresponds to the height of the spacer etched along the polysilicon gate of the device which may be as small as approximately 0.15 to 0.25 ?m.Type: GrantFiled: October 29, 1999Date of Patent: January 5, 2010Assignee: STMicroelectronics, Inc.Inventors: Artur P. Balasinski, Kuei-Wu Huang