Abstract: This disclosure relates to a method of increasing the size of particulates in a gas comprising particulates, e.g. a gas that is formed from the combustion of fuels. The method comprises mixing an ionised gas stream with the gas comprising particulates.

Abstract: A method of video processing, including performing a conversion between a video block of a video component of a video and a bitstream of the video, where the video block includes sub-blocks, where a filtering tool is used during the conversion according to a rule, and where the rule specifies that the filtering tool is applied by using a single offset for all samples of each sub-block of the video block.

Abstract: Embodiments of the present disclosure relate to a method, system and computer program product for providing system services. In some embodiments, a method is disclosed. According to the method, from a user program in a user address space, a request for a system service is received via a program call instruction of a set of program call instructions in an application interface code library. Based on the program call instruction, a target authorized address space of a plurality of authorized address spaces and a target system service routine for providing the system service in the target authorized address space is determined. A result of running the target system service routine in the target authorized address space is returned to the user program as a response to the request.

Abstract: Embodiments of the present disclosure relate to the field of semiconductors, and in particular to a method of manufacturing a semiconductor structure, a semiconductor structure and a memory. The method of manufacturing a semiconductor structure includes: forming a first semiconductor layer on a substrate, the first semiconductor layer including a first trench region and a to-be-doped region on two opposite sides of the first trench region; forming a word line, the word line surrounding a sidewall surface of a part of the first semiconductor layer in the first trench region, and at least a part of a projection of a part of the first semiconductor layer in the to-be-doped region on a surface of the substrate coinciding with a projection of the word line on the surface of the substrate; forming a doping body portion, the doping body portion including first dopant ions.

Abstract: A method and an apparatus for privacy protection biometric authentication and an electronic device. The method comprises the following steps: constructing a corresponding a biological data template according to a biological information data set input by a user when registering; generating a pair of public key and private key by asymmetric cryptography technology; generating encrypted biological data by a secret sharing solution and OKVS technology according to the biological data template and the private key; sending the public key and the encrypted biological data to a server; recovering the private key by OKVS technology according to the biological data input by the user during authentication and the encrypted biological data; constructing a signature according to the recovered private key and the corresponding public key; sending the signature to the server, so that the server verifies the user according to the public key and the signature.

Abstract: A semiconductor structure and a forming method thereof are provided. The method for forming a semiconductor structure includes providing a base including a semiconductor substrate and a well region located on a surface of the semiconductor substrate, in which the well region includes a plurality of active pillar columns arranged at intervals along a first direction, and each of the active pillar columns includes a plurality of active pillars arranged at intervals along a second direction, in which the first direction is perpendicular to the second direction; forming a plurality of bit line trenches by etching at least the well region and a partial thickness of the semiconductor substrate at bottoms of the active pillars; and forming buried bit lines in the bit line trenches.

Abstract: A display substrate includes a substrate and a light-emitting device layer which includes a first electrode layer, a light-emitting functional layer, and a second electrode layer that are sequentially stacked in a direction away from the substrate. The first electrode layer includes a reflective layer, an insulating layer, and a transparent conductive layer that are sequentially stacked in the direction away from the substrate. In a red sub-pixel region, a thickness of a first portion of the insulating layer is within a range of about 1000 ? to about 2500 ?. In a green sub-pixel region, a thickness of a second portion of the insulating layer is within a range of about 500 ? to about 2000 ?. In a blue sub-pixel region, a thickness of a third portion of the insulating layer is within a range of about 1500 ? to about 3000 ?.

Abstract: The present application discloses an oil supply device for a compressor, a compressor, and refrigeration equipment. The oil supply device for a compressor includes: a piston cylinder with an inner chamber, a piston, and an outer housing; the outer housing includes a housing body and a separator, the separator has a separation board and a partition plate, forming an oil chamber between the separation board and the bottom of the housing groove, the partition plate divides the oil chamber into an oil intake chamber and an oil discharge chamber; one end of the piston cylinder extends into the housing groove. This embodiment conveniently realizes the arrangement of the oil intake chamber and the oil discharge chamber on the outer housing.

Abstract: Method for nanoparticle-mediated deposition of radiation (NMDR) and targeted radiation therapies using a biodegradable and bioabsorbable iron oxide nanoparticle with a biocompatible coating that is effective to overcome various extra- and intra-cellular barriers and selectively accumulate in solid and metastatic tumors to improve the energy transfer of conventional radiotherapy

Abstract: The present application discloses an oil supply device of a compressor, a compressor and a refrigeration equipment, the oil supply device of a compressor comprising: a piston cylinder with an inner chamber, a piston, an outer housing, and an oil intake passage and an oil discharge passage, the oil intake passage comprises an oil intake chamber, an oil inlet and an oil outlet; the side wall of the oil intake chamber has an arcuate flow guide portion to direct flow between the oil inlet and the oil outlet. The application can create a vortex in the oil intake chamber after the oil entering the oil intake chamber from the oil inlet, thereby improving the oil suction efficiency.

Abstract: A heterojunction semiconductor device with a low on-resistance includes a metal drain electrode, a substrate, and a buffer layer. A current blocking layer is arranged in the buffer layer, a gate structure is arranged on the buffer layer, and the gate structure comprises a metal gate electrode, GaN pillars and AlGaN layers, wherein a metal source electrode is arranged above the metal gate electrode; and the current blocking layer comprises multiple levels of current blocking layers, the centers of symmetry of the layers are collinear, and annular inner openings of the current blocking layers at all levels gradually become smaller from top to bottom. The AlGaN layers and the GaN pillars are distributed in a honeycomb above the buffer layer.

Abstract: The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate, including a plurality of lower electrode pillars that are arranged at intervals; a dielectric layer, at least partially covering a sidewall of each of the lower electrode pillars; a first upper electrode, covering a surface of the dielectric layer; a first support layer, located above the plurality of lower electrode pillars, the dielectric layer, and the first upper electrode, wherein the first support layer at least exposes a peripheral region of a part of the first upper electrode.

Abstract: A semiconductor structure and a manufacturing method are provided. The semiconductor structure includes: a substrate having a bit line extending along a first direction; a semiconductor channel located on the bit line; a semiconductor doping layer located on the side of the bit line, wherein the top surface of the semiconductor doping layer is connected to the semiconductor channel contact; a word line extending in the second direction, encircling part of the semiconductor channel, and the bottom surface of the word line is higher than the top surface of the bit line; a word line dielectric layer located between the word line and the semiconductor channel; an isolation layer located between the word line and the bit line and between the word line and the semiconductor doping layer. The device and method improve the prior weak electrical conductivity between the bit line structure and the active structure.

Abstract: A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The semiconductor structure includes a semiconductor base, a bit line and a word line. The semiconductor base includes a substrate and an isolation structure. The isolation structure is arranged above the substrate and configured to isolate a plurality of active regions from each other. The bit line is arranged in the substrate and connected to the plurality of active regions. The word line is arranged in the isolation structure, intersects with the plurality of active regions and surrounds the plurality of active regions. The substrate is a Silicon-On-Insulator (SOI) substrate.

Abstract: The present application is applicable to the field of semiconductor technology and provides a method for packaging stacking a flip chip, which includes: placing a filling template on a substrate, the filling template being provided with a through hole of a preset pattern; filling a filling material into the through hole of the filling template, and after the filling material being formed on the substrate, removing the filling template; placing a chip with solder balls on the substrate formed with the filling material, such that at least a portion of the solder balls being covered by the filling material; and connecting the chip to the substrate through the solder balls, and curing the filling material with air gaps formed between the at least a portion of the solder balls covered with the filling material.

Abstract: The present disclosure provides a display panel, a method for preparing the same, and a display device. The display panel includes: a display substrate, including a base substrate, a driving transistor embedded on the base substrate, and a first electrode layer located on the base substrate; an encapsulation protection structure located on the display substrate and surrounding a display area of the display substrate; a light emitting layer located on a surface of the first electrode layer away from the base substrate; a second electrode layer located on a surface of the light emitting layer away from the base substrate; and a first encapsulation layer located on a surface of the second electrode layer away from the base substrate.

Abstract: Provided is a manufacturing method of a semiconductor structure, including: providing a substrate; forming a first mask layer having a first mask pattern on the substrate, and etching the substrate by using the first mask layer as a mask to form active regions; forming several discrete bitlines on the active regions; forming a sacrificial layer between adjacent bitlines; forming a second mask layer having a second mask pattern on the sacrificial layer, the first mask pattern and the second mask pattern being complementary to each other; and etching the sacrificial layer by using the second mask layer and the bitlines as masks to form a plurality of contact structures. The embodiment of the present disclosure is beneficial to reducing the manufacturing cost of the semiconductor structure.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. A semiconductor structure includes a semiconductor body, bit lines and word lines. The semiconductor body includes a substrate and an isolation structure positioned above the substrate and configured to isolate a plurality of active regions, part of each of the active regions being formed from the substrate. The bit lines are positioned in the substrate and are connected to the active regions. The word lines intersect with the active regions and surround the active regions. The substrate is Silicon On Insulator (SOI) substrate.

Abstract: A high-precision analysis method for key thermal safety phenomena in a nuclear reactor based on a particle method is provided. Fine complex geometric modeling is implemented based on a multi-resolution particle method. High-order discretization of control equations is implemented using a high-order particle discretization model. Key thermal-hydraulic, mechanical deformation, chemical reaction, and neutron physics phenomena can be analyzed. An implicit and explicit hybrid solving technique and an asynchronous marching algorithm are employed.

Abstract: The technology of this application relates to a memory management method and apparatus. When garbage collection is performed by using the method, stored information about a first reference cycle is first obtained, where the first reference cycle is a cyclic reference formed by a plurality of objects, and the information about the first reference cycle includes the plurality of objects in the first reference cycle and a reference relationship between the plurality of objects. The method further includes determining that a second reference cycle exists, where information about the second reference cycle matches the information about the first reference cycle, and the information about the second reference cycle includes a plurality of objects in the second reference cycle and a reference relationship between the plurality of objects. The method further includes reclaiming memory occupied by the plurality of objects in the second reference cycle.