Patents by Inventor Kumar Srivastava

Kumar Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ADAPTIVE AGING TOLERANT APPARATUS
    Publication number: 20190296746
    Abstract: An apparatus is provided which comprises: a first ring oscillator comprising at least one aging tolerant circuitry; a second ring oscillator comprising a non-aging tolerant circuitry; a first counter coupled to the first ring oscillator, wherein the first counter is to count a frequency of the first ring oscillator; a second counter coupled to the second ring oscillator, wherein the second counter is to count a frequency of the second ring oscillator; and logic to compare the frequencies of the first and second ring oscillators, and to generate one or more controls to mitigate aging of one or more devices.
    Type: Application
    Filed: March 22, 2018
    Publication date: September 26, 2019
    Applicant: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • Parts-per-million detection apparatus and method
    Patent number: 10425123
    Abstract: An apparatus is provided which comprises: a first circuitry to track a spread spectrum of a differential signal according to sampled data; and a second circuitry to adjust phase of a clock according to the spread spectrum, wherein the clock is used for sampling the differential signal.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: September 24, 2019
    Assignee: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • Lithium ion battery electrode with uniformly dispersed electrode binder and conductive additive
    Publication number: 20190267616
    Abstract: The present disclosure relates generally to an electrode produced with a non-toxic solvent, resulting in a homogeneous mixture with uniform distributions of a conductive additive and a binder. Electrodes produced according to the present disclosure feature narrow binder particle size distribution, which distinguishes such electrodes from typical electrodes produced via a N-Methyl-Pyrrolidone (NMP) process. The resulting microstructure promotes the flow of current through the electrode and has an improved cycling stability due, in part, to the binder's and the conductive additive's ability to bind with the active material particles used in the fabrication of the electrode.
    Type: Application
    Filed: February 28, 2019
    Publication date: August 29, 2019
    Inventors: Rajshekar DAS GUPTA, Elmira MEMARZADEH, Sankar DAS GUPTA, Bjorn Haugseter, Tom Henriksen, Lars Ole Valøen, Akhilesh Kumar Srivastava
  • Apparatus and method for adaptive common mode noise decomposition and tuning
    Patent number: 10396834
    Abstract: Described is an apparatus which comprises: a pre-driver coupled to a transmitter, the transmitter having a differential output; and a tuning circuit operable to couple to the differential output to tune the pre-driver of the transmitter according to a common mode noise signature of a common mode signal derived from the differential output.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: August 27, 2019
    Assignee: Intel Corporation
    Inventors: Khang Choong Yong, Boon Ping Koh, Amit Kumar Srivastava, Wil Choon Song
  • METHOD AND SYSTEM FOR AI-DRIVEN & AI-OPTIMIZED DECISIONS, ACTIONS, & WORKFLOWS IN PROCESS OPERATIONS
    Publication number: 20190251487
    Abstract: Disclosed is a method and a system for AI-driven & AI-optimized decisions, actions, & workflows in process operations. The system has the ability to create, update, process, and link tickets automatically. The system can also automatically determine the transactions that should be converted into tickets. The system further processes any generated or created tickets through a set of AI models designed to produce classifications for tickets in real time and appends the AI driven classifications to the tickets. The system can analyze the content of the ticket and assign the ticket automatically to the appropriate ticket queue that is owned by a user or team.
    Type: Application
    Filed: April 26, 2019
    Publication date: August 15, 2019
    Inventor: Kumar Srivastava
  • DYNAMIC LANE ACCESS SWITCHING BETWEEN PCIE ROOT SPACES
    Publication number: 20190251055
    Abstract: An apparatus includes physical layer circuitry with lanes to couple the apparatus to endpoint devices. a first input/output (I/O) controller to couple a first processor to the physical layer circuitry, and a second I/O controller to couple a second processor to the physical layer circuitry. The first and second I/O controllers are compatible with a Peripheral Component Interconnect Express (PCIe)-based protocol. The apparatus also includes a flexible input/output adapter (FIA) coupling the first and second I/O controllers to the lanes. The FIA selectively assigns access to each lane of the lanes by either the first or second I/O controller. The apparatus also includes a power management controller (PMC) communicably coupled to the FIA. The PMC causes the FIA to dynamically assign access to at least one of the lanes by the first or second I/O controller without a reboot cycle.
    Type: Application
    Filed: April 26, 2019
    Publication date: August 15, 2019
    Applicant: Intel Corporation
    Inventors: Chih-Cheh Chen, Janusz P. Jurski, Amit Kumar Srivastava, Malay Trivedi, James Mitchell, Piotr Michael Kwidzinski, David N. Lombard
  • System, Apparatus And Method For Sharing A Flash Device Among Multiple Masters Of A Computing Platform
    Publication number: 20190227753
    Abstract: In one embodiment, a flash sharing controller is to enable a plurality of components of a platform to share a flash memory. The flash sharing controller may include: a flash sharing class layer including a configuration controller to configure the plurality of components to be flash master devices and configure a flash sharing slave device for the flash memory; and a physical layer coupled to the flash sharing class layer to communicate with the plurality of components via a bus. Other embodiments are described and claimed.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 25, 2019
    Inventors: Zhenyu Zhu, Mikal Hunsaker, Karthi R. Vadivelu, Rahul Bhatt, Kenneth P. Foust, Rajesh Bhaskar, Amit Kumar Srivastava
  • Strobe centering apparatus and method
    Patent number: 10361705
    Abstract: An apparatus is provided which comprises: a receiver to receive a differential clock; a delay locked loop (DLL) coupled to the receiver; a first phase interpolator (PI) coupled to the DLL, the first PI to provide a first clock phase; a second PI coupled to the DLL, wherein the second PI is to provide a second or third clock phase; circuitry to adjust the first and second PIs according to the first clock phase, and the second or third clock phase.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: July 23, 2019
    Assignee: Intel Corporation
    Inventors: Chenchu Punnarao Bandi, Amit Kumar Srivastava, Navindra Navaratnam
  • High speed driver with adaptive termination impedance
    Patent number: 10355690
    Abstract: An apparatus is provided which comprises: a data sampler coupled to an output of a driver, wherein the data sampler is to sample data and to compare it with a first threshold voltage and a second threshold voltage, and wherein the data sampler is to generate an up or down indicator according to comparing the data with the first and second threshold voltages; and logic coupled to the data sampler, wherein the logic is to receive the up or down indicator and to increment or decrement a number of already DC compensated impedance legs of the driver according to the up or down indicator.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: July 16, 2019
    Assignee: Intel Corporation
    Inventors: Siti Suhaila Mohd Yusof, Amit Kumar Srivastava, Lay Hock Khoo, Chin Boon Tear
  • Link training mechanism by controlling delay in data path
    Patent number: 10347347
    Abstract: An apparatus is provided which comprises: a buffer to receive first data from a host, and output the first data with configurable delay; and one or more circuitries to: compare the first data from the host with second data that is accessible to the apparatus, wherein the second data is substantially a copy of the first data, and calibrate the delay of the buffer, based at least in part on the comparison of the first data and the second data.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: July 9, 2019
    Assignee: Intel Corporation
    Inventors: Amit Kumar Srivastava, Sriram Balasubrahmanyam
  • USB interface using repeaters with guest protocol support
    Patent number: 10339093
    Abstract: An example system for side band communication can include a processor, a system-on-chip (SOC), and a repeater communicatively coupled to the processor and the SOC. The repeater can receive packets from a first transceiver. The repeater can also detect a pattern in the packets to identify a guest protocol. The repeater can further send the packets from the first transceiver to the SOC via a second transceiver based on the identified guest protocol.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 2, 2019
    Assignee: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • Low power clamp for electrical overstress protection
    Patent number: 10333504
    Abstract: Described is an apparatus which comprises: a sensor to detect entrance of single-ended-zero (SE0) state on first and second data lines, and to detect exit of the SE0 state; and a clamp unit to clamp an overshoot or undershoot condition on the first or second data lines during the detected entrance and exit of the SE0 state.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: June 25, 2019
    Assignee: INTEL CORPORATION
    Inventors: Amit Kumar Srivastava, Chee Seng Leong
  • DATA PATH TRAINING AND TIMING SIGNAL COMPENSATION FOR NON-VOLATILE MEMORY DEVICE INTERFACE
    Publication number: 20190187929
    Abstract: Some embodiments include apparatuses and methods using the apparatuses. Some of the apparatuses include a device that includes an interface for communication with a host. The device includes components that can operate during at least one of read link training and duty cycle distortion compensation operation.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Inventors: Amit Kumar Srivastava, Sriram Balasubrahmanyam
  • LINK TRAINING MECHANISM BY CONTROLLING DELAY IN DATA PATH
    Publication number: 20190189226
    Abstract: An apparatus is provided which comprises: a buffer to receive first data from a host, and output the first data with configurable delay; and one or more circuitries to: compare the first data from the host with second data that is accessible to the apparatus, wherein the second data is substantially a copy of the first data, and calibrate the delay of the buffer, based at least in part on the comparison of the first data and the second data.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Applicant: Intel Corporation
    Inventors: Amit Kumar SRIVASTAVA, Sriram BALASUBRAHMANYAM
  • Transmitter with power supply rejection
    Patent number: 10320430
    Abstract: Described is an apparatus which comprises: a driver comprising a push-pull transmitter; a first circuitry to sense variation in a power supply; and a second circuitry coupled to the first circuitry and to the driver, the second circuitry to generate a code according to an output of the first circuitry, wherein the code is provided to the driver to adjust a performance parameter of the driver.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: June 11, 2019
    Assignee: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • METHOD AND SYSTEM FOR AUTO LEARNING, ARTIFICIAL INTELLIGENCE (AI) APPLICATIONS DEVELOPMENT, OPERATIONALIZATION AND EXECUTION
    Publication number: 20190171950
    Abstract: Disclosed is a method and a system a method and a system for auto learning, artificial intelligence (AI) applications development, and execution. Various applications or operations may be associated with training environment-agnostic AI models, automated AI app application performance monitoring, fault, quality and performance remediation through prediction of failures or suboptimal performance, privacy and secure AI training and inference mechanism for data and AI model sharing between untrusted parties, and building auto learning applications that can automatically learn and improve.
    Type: Application
    Filed: February 10, 2019
    Publication date: June 6, 2019
    Inventor: Kumar Srivastava
  • MAGNETIC COOLING SYSTEMS
    Publication number: 20190170407
    Abstract: A magnetic cooling system is presented. The system includes at least one magnetic assembly, at least one magnetic regenerator including a magnetocaloric material, movably arranged in a closed loop to cyclically pass through the at least one magnetic assembly and a fluid supply device in fluid communication with the at least one magnetic assembly to supply a cooling fluid to the at least one magnetic assembly. A turbine assembly including a magnetic cooling system disposed in a path of an inlet air to a turbine system is also presented.
    Type: Application
    Filed: December 4, 2017
    Publication date: June 6, 2019
    Inventors: Jalal Hunain Zia, Francis Johnson, Marco Santini, Vijay Kumar Srivastava, Kimberly Nicole Hammer
  • SENSOR BUS COMMUNICATION SYSTEM
    Publication number: 20190138490
    Abstract: Described is an I3C Repeater. The I3C Repeater may have a first circuitry with an I3C interface, a second circuitry with an I2C interface, and a datapath circuitry coupled to the first circuitry and the second circuitry. The second circuitry may be operable to convert a transaction received on the I2C interface into a transaction for the I3C interface, and to convert a transaction received on the I3C interface into a transaction for the I2C interface. The I3C Repeater may also have additional circuitries operable to convert transactions received on one of an SPI interface, a UART interface, and a Debug bus interface into transactions for the I3C interface, and vice-versa.
    Type: Application
    Filed: July 20, 2018
    Publication date: May 9, 2019
    Applicant: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • AGING TOLERANT SYSTEM DESIGN USING SILICON RESOURCE UTILIZATION
    Publication number: 20190138479
    Abstract: An integrated circuit for monitoring components of the integrated circuit, comprising: a resource monitoring circuit configured to: track activity factors for a plurality of components of the integrated circuit; evaluate the activity factors for each of the plurality of components; determine whether an activity factor for a particular component of the plurality of components exceeds a threshold; and transmit, from the resource monitoring circuit, a signal to a software element, causing the software element to deactivate the particular component and activate an alternate component, when the activity factor for the particular component exceeds the threshold and the alternate component is available to substitute for the particular component.
    Type: Application
    Filed: December 29, 2018
    Publication date: May 9, 2019
    Inventors: Amit Kumar Srivastava, Asad Azam
  • Voltage tolerant termination presence detection
    Patent number: 10284199
    Abstract: Apparatuses and methods associated with voltage tolerant termination presence detection for universal serial bus type-C connectors are disclosed herein. In embodiments, an apparatus to enable voltage tolerant termination presence detection may include sensor circuitry to determine whether a device coupled to the sensor circuitry is to operate in host mode or device mode based on a signal on a configuration channel between the device and the sensor circuitry. In embodiments, the apparatus may further include termination circuitry to bias the configuration channel in accordance with the host mode or the device mode based on the determination of whether the device is to operate in the host mode or the device mode. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: May 7, 2019
    Assignee: Intel Corporation
    Inventor: Amit Kumar Srivastava