Patents by Inventor Kumar Srivastava

Kumar Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210194809
    Abstract: An ingress fabric endpoint coupled to a switch fabric within a network device reorders packet flows based on congestion status. In one example, the ingress fabric endpoint receives packet flows for switching across the switch fabric. The ingress fabric endpoint assigns each packet for each packet flow to a fast path or a slow path for packet switching. The ingress fabric endpoint processes, to generate a stream of cells for switching across the switch fabric, packets from the fast path and the slow path to maintain a first-in-first-out ordering of the packets within each packet flow. The ingress fabric endpoint switches a packet of a first packet flow after switching a packet of a second packet flow despite receiving the packet of the first packet flow before the packet of the second packet flow.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventors: Anuj Kumar Srivastava, Gary Goldman, Harshad B. Agashe, Dinesh Jaiswal, Piyush Jain, Naveen K. Jain
  • Publication number: 20210178795
    Abstract: Various photo-luminescent films and associated methods are enabled. For instance, a photo-luminescent film comprises a substrate layer comprising a plurality of pores, and a composite comprising luminescent nanoparticles disposed in the plurality of pores.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 17, 2021
    Inventors: Swadesh Kumar Gupta, Maksym Fedorovich Prodanov, Valerii Vladimirovich Vashchenko, Abhishek Kumar Srivastava, Chengbin Kang, Yiyang Gao
  • Patent number: 11036266
    Abstract: The disclosed embodiments relate to methods, systems and apparatus for dynamic temperature aware functional safety. The disclosed embodiments provide adaptive techniques to track extended dynamic temperature range of a System-on-Chip (SOC) and automatically tune critical IP components of the SOC so that system can operate reliably even at high temperatures. The disclosed embodiments relax the overdesign of the SOC components by reusing existing components such as a ring oscillator to determine temperature at different regions of the SOC. In one embodiment, the disclosed principles use a Calibrated Ring Oscillator (CRO) temperature sensors. The CRO-based temperature sensors provide fast temperature measurement suitable for detecting dynamic temperature ranges and temperature rate of change. The CROs are existing on the SOC and do not require addition of additional sensors.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: June 15, 2021
    Assignee: Intel Corporation
    Inventors: Amit Kumar Srivastava, Rao Jagannadha Rapeta, Asad Azam
  • Publication number: 20210176302
    Abstract: Embodiments herein provide a method for CLAT Aware Affinity (CAA)-based scheduling by a user equipment (UE) (100) comprising a multi-core processor (120). The method includes a CAA scheduler (180) at the user equipment (100) receiving a packet and determining a path characteristic of the packet. Further, the method includes the CAA scheduler (180) determining, at least one of a IPv4 connection and a IPv6 connection based the path characteristic of the packet; and establishing a connection to at least one of an IPv4 server and an IPv6 server based on the determined at least one of the IPv4 connection and the IPv6 connection. Further, the method includes the CAA scheduler (180) classifying the packet into at least one class and scheduling the packet on at least one core of the multi-core processor (120) based on the at least one class.
    Type: Application
    Filed: August 2, 2019
    Publication date: June 10, 2021
    Inventors: Chhaya BHARTI, Madhan Raj KANAGARATHINAM, Rohit Shankar LINGAPPA, Gyanchandani MONTY, Jaekwang HAN, Karthikeyan A., Milim LEE, Sandesh Kumar SRIVASTAVA, Wangkeun OH
  • Patent number: 11029750
    Abstract: Apparatus for managing high speed Universal Serial Bus 2.0 (USB2) communications is presented. The apparatus may include a combination differential difference detector to receive first and second input signals, the combination differential difference detector to, in a first mode: sense a first voltage difference between the first and second input signals and output a squelch signal when the first voltage difference is less than or equal to a pre-defined value. The combination differential difference detector is to, in a second mode, sense a second voltage difference between the first and second input signals and output a disconnect signal when the second voltage difference is greater than or equal to a pre-defined value. Related methods may also be disclosed.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: June 8, 2021
    Assignee: Intel Corporation
    Inventors: Amit Kumar Srivastava, Chenchu Punnarao Bandi
  • Patent number: 11030142
    Abstract: In an embodiment, a host controller includes a clock control circuit to cause the host controller to communicate a clock signal on a clock line of an interconnect, the clock control circuit to receive an indication that a first device is to send information to the host controller and to dynamically release control of the clock line of the interconnect to enable the first device to drive a second clock signal onto the clock line of the interconnect for communication with the information. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: June 8, 2021
    Assignee: Intel Corporation
    Inventors: Kenneth P. Foust, Amit Kumar Srivastava, Nobuyuki Suzuki
  • Publication number: 20210156804
    Abstract: The present invention relates to a cost effective and single step process for rapid manufacturing of paper-based SERS substrates (100), wherein chitosan is used for direct in situ reduction of the metallic precursor solutions for production of metallic nanoparticles on the substrates. The crucial step in the process involves the incubation of the paper-based substrates under humidifying conditions at an elevated temperature for a predetermined duration. The metal nanoparticles thus produced are homogenously deposited over the paper-based substrate making the paper-based substrate suitable for SERS analysis. The paper-based substrate thus developed is cost-effective, flexible, easy to load and is demonstrated to have exceptional sensitivity with detection limits of up to 1 pM.
    Type: Application
    Filed: February 8, 2019
    Publication date: May 27, 2021
    Inventors: Amit ASTHANA, Mohan Rao CHINTALAGIRI, Saurabh Kumar SRIVASTAVA, Gopi Suresh OGGU
  • Patent number: 11016920
    Abstract: Aspects of the embodiments are directed to calibrating a cross-talk cancellation module. A data eye response for a first data channel can be acquired, and the left-side and right-side maximum transition edges can be determined while adjacent data channels are silent. The adjacent data channels can be activated, first using an even mode waveform. A strobe can be positioned at the left-side maximum boundary in anticipation of a right-shift due to even mode waveform cross talk. A summer circuit can sum the waveform from the first data channel with cross-talk induced voltage pulse having an opposite polarity from the even mode waveforms on the aggressor channels. A left-side edge can be determined by incrementally adjusting gain and detector parameters. These parameters can be locked once a left-side transition edge is located. The process can be repeated for a right-side transition edge with odd-mode aggressor waveforms.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: May 25, 2021
    Assignee: Intel Corporation
    Inventors: Chenchu Punnarao Bandi, Amit Kumar Srivastava
  • Patent number: 11016550
    Abstract: A configuration interface bus may be coupled to components of a physical layer (PHY) device. A configuration controller may be coupled with the configuration interface bus and may receive an input signal representing a power state of the PHY device. The configuration controller may further identify a set of instructions that correspond to the input signal and may transmit configuration data via the configuration interface bus to one or more of the components of the PHY device in response to an execution of the set of instructions. The operation of the one or more components of the PHY device may be based on the configuration data.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: May 25, 2021
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Anoop Kumar Upadhyay, Gaurav Goel, Amit Kumar Srivastava
  • Patent number: 11015120
    Abstract: A low birefringence ferroelectric liquid crystal (FLC) mixture composed of at least two components shows birefringence in the range 0.05 to 0.14, which is suitable for the modern display and photonic devices. The cell gap can be tuned from 1.5 ?m to 4 ?m to reduces the fabrication complexity and chromatic distortion by electro-optical modulation. The FLC mixtures can be employed in a wide temperature range. The characteristics of the said FLC mixture can be tuned by tuning the concentration of the constituents of the mixture. The helical pitch of the FLC mixtures can be varied from 100 nm to 10 ?m. A smectic tilt angle can be varied between 17° to 45° and the spontaneous polarization can be tuned over a wide range to meet requirements of different electro-optical modes, and the FLC mixture is applicable for a wide variety of electro-optical effects.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: May 25, 2021
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Valerii Vladimirovich Vashchenko, Evgenii Pavlovich Pozhidaev, Abhishek Kumar Srivastava, Vladimir Grigorievich Chigrinov, Hoi Sing Kwok
  • Patent number: 10984320
    Abstract: A computer-based method includes receiving an input signal at a neuron in a computer-based neural network that includes a plurality of neuron layers, applying a first non-linear transform to the input signal at the neuron to produce a plain signal, and calculating a weighted sum of a first component of the input signal and the plain signal at the neuron. In a typical implementation, the first non-linear transform is a function of the first component of the input signal and at least a second component of the input signal.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: April 20, 2021
    Assignee: Nnaisense SA
    Inventors: Rupesh Kumar Srivastava, Klaus Greff
  • Publication number: 20210109887
    Abstract: Embodiments of the present disclosure may relate to apparatus, process, or techniques in a I3C protocol environment that include identifying a pending read notification message by a slave device to be sent to a master device to indicate that the data is available to be read by the master device from a buffer associated with the slave device. The pending read notification may be subsequently transmitted to the master device. Subsequently, until the data in the buffer has been read by the master device, the slave device may wait an identified amount of time that is less than a value of a timeout of the master device, and retransmit the pending read notification message to the master device. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 15, 2021
    Inventors: JANUSZ JURSKI, ENRICO DAVID CARRIERI, AMIT KUMAR SRIVASTAVA, MATTHEW A. SCHNOOR, MYRON LOEWEN
  • Patent number: 10979055
    Abstract: An apparatus is provided which comprises: a first ring oscillator comprising at least one aging tolerant circuitry; a second ring oscillator comprising a non-aging tolerant circuitry; a first counter coupled to the first ring oscillator, wherein the first counter is to count a frequency of the first ring oscillator; a second counter coupled to the second ring oscillator, wherein the second counter is to count a frequency of the second ring oscillator; and logic to compare the frequencies of the first and second ring oscillators, and to generate one or more controls to mitigate aging of one or more devices.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: April 13, 2021
    Assignee: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • Patent number: 10975846
    Abstract: The present discussion relates to generating power generation forecasts both on-site and remote to a wind farm, or other intermittent power generation asset, so as to increase the reliability of providing a forecast to interested parties, such as regulatory authorities. Forecasts may be separately generated at both the on-site and remote locations and, if both are available, one is selected for transmission to interested parties, such as regulatory authorities. If, due to circumstances, one forecast is unavailable, the other forecast may be used in its place locally and remotely, communications permitting.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: April 13, 2021
    Assignee: General Electric Company
    Inventors: Rahul Kumar Srivastava, Krishna Kumar Swaminathan, Sridhar Dasaratha, Shishir Goel, Milesh Shrichandra Gogad, Nitika Bhaskar, Pritesh Jain
  • Publication number: 20210089966
    Abstract: A method, referred to herein as upside down reinforcement learning (UDRL), includes: initializing a set of parameters for a computer-based learning model; providing a command input into the computer-based learning model as part of a trial, wherein the command input calls for producing a specified reward within a specified amount of time in an environment external to the computer-based learning model; producing an output with the computer-based learning model based on the command input; and utilizing the output to cause an action in the environment external to the computer-based learning model. Typically, during training, the command inputs (e.g., “get so much desired reward within so much time,” or more complex command inputs) are retrospectively adjusted to match what was really observed.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 25, 2021
    Inventors: Juergen Schmidhuber, Rupesh Kumar Srivastava
  • Patent number: 10951527
    Abstract: An ingress fabric endpoint coupled to a switch fabric within a network device reorders packet flows based on congestion status. In one example, the ingress fabric endpoint receives packet flows for switching across the switch fabric. The ingress fabric endpoint assigns each packet for each packet flow to a fast path or a slow path for packet switching. The ingress fabric endpoint processes, to generate a stream of cells for switching across the switch fabric, packets from the fast path and the slow path to maintain a first-in-first-out ordering of the packets within each packet flow. The ingress fabric endpoint switches a packet of a first packet flow after switching a packet of a second packet flow despite receiving the packet of the first packet flow before the packet of the second packet flow.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: March 16, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Anuj Kumar Srivastava, Gary Goldman, Harshad B Agashe, Dinesh Jaiswal, Piyush Jain, Naveen K Jain
  • Patent number: 10948774
    Abstract: A photoaligned quantum rod enhancement film (QREF) includes: a substrate (802, 805); a photoalignment layer deposited on the substrate (802, 805); and a polymer layer deposited on the photoalignment layer, the polymer layer comprises a plurality of quantum rods, the plurality of quantum rods are configured to emit one or more wavelengths of light in response to pumping light, and are aligned to an alignment axis based on the photoalignment layer.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: March 16, 2021
    Assignee: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Abhishek Kumar Srivastava, Wanlong Zhang, Vladimir Grigorievich Chigrinov, Hoi Sing Kwok
  • Patent number: 10942880
    Abstract: An integrated circuit for monitoring components of the integrated circuit, comprising: a resource monitoring circuit configured to: track activity factors for a plurality of components of the integrated circuit; evaluate the activity factors for each of the plurality of components; determine whether an activity factor for a particular component of the plurality of components exceeds a threshold; and transmit, from the resource monitoring circuit, a signal to a software element, causing the software element to deactivate the particular component and activate an alternate component, when the activity factor for the particular component exceeds the threshold and the alternate component is available to substitute for the particular component.
    Type: Grant
    Filed: December 29, 2018
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventors: Amit Kumar Srivastava, Asad Azam
  • Patent number: 10944408
    Abstract: Described is an apparatus which comprises: a first clocking source having a first divider; a second clocking source having a second divider, wherein the first and second clocking sources are inductively coupled; and calibration logic to monitor clock signals associated with the first and second clocking sources and to generate at least one calibration code for adjusting at least one divider ratio of the first or second dividers according to the monitored clock signals.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventor: Amit Kumar Srivastava
  • Publication number: 20210063841
    Abstract: Techniques for using ferroelectric liquid crystals Dammann grating (FLCDG) for light detection and ranging devices are disclosed. In LiDAR devices, accuracy, response time, and cost performance can be limited by some factors, such as laser pulse width, time resolution of a time-to-digital conversion chip, detector bandwidth, shot noise, and time error generated by electronic circuits. A FLCDG-based architecture can improve a LiDAR device, and provide for one-shot capturing due to the high switching speed at very low driving voltage provided by ferroelectric liquid crystals and the equal diffracting ability of Dammann grating.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 4, 2021
    Inventors: Zhengnan Yuan, Abhishek Kumar Srivastava, Zhibo Sun, Hoi Sing Kwok