Patents by Inventor KUMAR

KUMAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240415511
    Abstract: A clipping system includes an adapter and a clip. The proximal portion of the adapter extends along a first longitudinal axis. The distal portion of the adapter includes a cylinder extending along a second longitudinal axis that extends substantially perpendicular relative to the first axis. The clip includes first and second pairs of arms and first and second jaws. Proximal ends of the first arms are connected via a first hinge. Proximal ends of the second arms are connected via a second hinge. The first jaw extends between distal ends of a first one of the first arms and a first one of the second arms. The second jaw extends between distal ends of a second one of the first arms and a second one of the second arms so that the jaws are movable relative to one another between open and closed configurations.
    Type: Application
    Filed: May 23, 2024
    Publication date: December 19, 2024
    Inventor: Deepak Kumar SHARMA
  • Publication number: 20240419684
    Abstract: In an example implementation consistent with the features disclosed herein, high availability of a stateful application is achieved by orchestrating multiple computing clusters. A stateful application is deployed at a first application operator and a second application operator of a first computing cluster and a second computing cluster, respectively. The first application operator includes a first control loop that changes the first computing cluster based on first resources of the first computing cluster. The second application operator includes a second control loop that changes the second computing cluster based on second resources of the second computing cluster. Synchronization of the first resources with the second resources is configured, such as via an object storage service. The first application operator and the second application operator are scaled to, respectively, nonzero and zero. A load balancer is configured to route requests to the first computing cluster.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 19, 2024
    Inventors: Pradeep Kumar Achi Vasudevan, Sonu Sudhakaran, Santosh Nagaraj, Hardik Dhirendra Parekh
  • Publication number: 20240420047
    Abstract: The present disclosure relates to methods and systems for improvements in generating a bill of materials and a schedule.
    Type: Application
    Filed: August 27, 2024
    Publication date: December 19, 2024
    Applicant: AECInspire, Inc.
    Inventors: Abhishek Kumar, Rehan Amin, Sethu Madhavan Anilkumar, Chaitanya Bharech
  • Publication number: 20240422085
    Abstract: Techniques are described for monitoring application performance in a computer network. For example, a network management system (NMS) includes a memory storing path data received from a plurality of network devices, the path data reported by each network device of the plurality of network devices for one or more logical paths of a physical interface from the given network device over a wide area network (WAN). Additionally, the NMS may include processing circuitry in communication with the memory and configured to: determine, based on the path data, one or more application health assessments for one or more applications, wherein the one or more application health assessments are associated with one or more application time periods for a site, and in response to determining at least one failure state, output a notification including identification of a root cause of the at least one failure state.
    Type: Application
    Filed: August 23, 2024
    Publication date: December 19, 2024
    Inventors: Prashant Kumar, Jisheng Wang, Gorakhanath Kathare, Yogesh B G, Kaushik Adesh Agrawal, Jie C Jiang, Scott A. McCulley, Greg Schrock
  • Publication number: 20240419502
    Abstract: A cloud computing design evaluation platform may receive a master variant for a cloud computing design, including a sequential sequence of a set of components. The evaluation platform may then determine a maximum number of parallel levels for the master variant and automatically create a plurality of potential variants of the master variant by expanding the master variant with parallel components in accordance with the maximum number of parallel levels. The evaluation platform determines reliability information (e.g., based on MTBF data) and cost information (e.g., a TCO) for each component. An overall reliability score and overall cost score for each of the automatically created potential variants is automatically calculated and an evaluation result of the calculation is indicated (reflecting an optimum design that meets SLA and TCO goals). Some embodiments may also provide continuous monitoring of design performance and/or predict future design performance based on historical data.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 19, 2024
    Inventors: Aby JOSE, Uday Kumar Suresh PRABHU, Sowmya Lakshmi R.
  • Publication number: 20240419550
    Abstract: Embodiments generally relate to improving reliability of processing cache lines with metadata symbols encoded into parity symbols of codewords. The data and metadata of a cache line are encoded into codewords where each codeword is a number of (1) message symbols, each including message bits from data of the cache line, and (2) parity symbols, each including parity bits determined from the message symbols and a metadata symbol. For each codeword of the cache line, the plurality of message and parity symbols are rotated so that a location of each symbol of one codeword is different from other codewords of the cache line. The codewords of the cache line are then stored in memory as rotated. In this manner, the reliability is improved by rotating symbols of the codewords of the cache line, with metadata symbols encoded into parity of codewords, before storage in memory.
    Type: Application
    Filed: June 16, 2023
    Publication date: December 19, 2024
    Inventors: Majid Anaraki NEMATI, Srikanth DAKSHINAMOORTHY, Anthony Dwayne WEATHERS, Ravinder KUMAR
  • Publication number: 20240420204
    Abstract: Aspects of the present disclosure relate to providing a shoppable video corpus by generating a shoppable URL. A URL is extracted from a video corpus, in which the extracted URL may be a long URL or a short URL. Extracted URLs are then combined and normalized. From the normalized URL, noise is removed and quality control is performed. As a result, shoppable URL may be presented at the user's computing device as personal recommendation. The video and metadata of the cleaned URL is also ingested and stored in a database for future reference.
    Type: Application
    Filed: June 16, 2023
    Publication date: December 19, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Arun Kumar CHIPPADA, Yucan ZHANG, Marcelo M. DE BARROS, Xulong ZHANG
  • Publication number: 20240420293
    Abstract: A method of processing image data includes receiving, with a frame correction machine-learning (ML) model executing on processing circuitry, an image frame captured from a first camera of a plurality of cameras; performing, with the frame correction ML model executing on the processing circuitry, image frame correction to generate a corrected image frame based on weights or biases of the frame correction ML model applied to two or more of: samples of the image frame, samples of previously captured image frames from the first camera, or samples from image frames from other cameras of the plurality of cameras; and performing, with the processing circuitry, post-processing based on the corrected image frame.
    Type: Application
    Filed: June 16, 2023
    Publication date: December 19, 2024
    Inventors: Deeksha Dixit, Varun Ravi Kumar, Senthil Kumar Yogamani
  • Publication number: 20240421225
    Abstract: High-voltage transistors that may be fabricated in a standard low-voltage process. Embodiments include integrated circuits that combine, in a unitary structure, an LDMOS FET device that includes one or more dummy polysilicon structures (DPS's) overlying a drift region and comparable in configuration to the FET gate, and interstitial implant resistance pockets (IRP) formed within the drift region between the gate and an adjacent DPS and between each pair of adjacent DPS's. The IRPs may be augmented with floating contacts to remove heat from the drift region and provide additional shielding of the drain contact from the nearest edge of the gate. The IRPs may be biased to modulate the conductivity of the drift region. The DPS's may be biased to modulate the conductivity of the drift region, and in such a way as to protect each DPS from excessive and potentially destructive voltages.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 19, 2024
    Inventors: Jagar Singh, Anil Kumar, Sinan Goktepeli, Hiroshi Yamada, Akira Fujihara, Tsunekazu Saimei, Kazuhiko Shibata
  • Publication number: 20240422740
    Abstract: Certain aspects of the present disclosure provide techniques for mapping two-stage sidelink control with multiple layer sidelink data channel. A first user equipment (UE) can rate-match a multiple-layer second stage of a two-stage sidelink control information (SCI) transmission as a single layer. The first UE transmits the multiple-layer second stage of the two-stage SCI, to a second UE, using multiple antenna ports.
    Type: Application
    Filed: May 21, 2024
    Publication date: December 19, 2024
    Inventors: Gabi SARKIS, Wanshi CHEN, Alexandros MANOLAKOS, Kapil GULATI, Sudhir Kumar BAGHEL, Gideon Shlomo KUTZ
  • Publication number: 20240416011
    Abstract: Tumor resection is commonly practiced to prevent the progression of cancer. However, there are post-surgery concerns including the formation of a void that can allow cancer cells to escape at the surgery site, which increases the risk of metastasis. To counter this challenge, an embodiment includes a polyurethane-based shape memory foam as a tissue void-filling device that can also release anti-cancer drugs. Such foams may activate at body temperature and become malleable. Such properties may enable the foam to be shaped to precisely seal the tissue void and then serve as a drug-eluting device. Based on the drug composition with poly vinyl alcohol (PVA), the drug release profile from the foam may be altered depending on the application.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Inventors: Duncan Maitland, Corey Bishop, Shreedevi Arun Kumar
  • Publication number: 20240419915
    Abstract: Disclosed are various embodiments for compliance detection using natural language processing. Various embodiments include a computing device that can transcribe a sound recording of a transcript, where the sound recording can be representative of a telephonic call occurring between an agent and a client. The computing device can determine that the telephonic call included a discussion related to a regulated subject based on an analysis by a natural language processor of the transcript. The computing device can obtain a compliance rule based at least in part on the regulated subject of the telephonic call. The computing device can determine that the compliance rule has been violated using a natural language processor of the transcript. The computing device can also store various information related to the compliance violation.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 19, 2024
    Inventors: Ashish Kumar Agrawal, Srinivas K. Kumandan, Robin Jain, Abishek Jain, Yogaraj Jayaprakasam, Catherine Dzendzera, Michelle Chambless-Ferguson, Sean J. Tucker, Christopher J. Haines, Jeff B. Li, Apoorva Batra, Hector Flores, Chirag Kathuria, Seerla Phani Praveen
  • Publication number: 20240416520
    Abstract: A device may receive a three-dimensional (3D) computer-aided design (CAD) model, and may generate an assembly graph with nodes that represent components and edges that represent contact between the components. The device may generate component graphs for the components, and may generate an assembly descriptor based on the assembly graph and the component graphs. The device may process the assembly descriptor, with a graph convolution network model, to generate node embeddings, and may apply pooling to the node embeddings to generate graph embeddings. The device may calculate a cross attention between the components to generate component interrelations, and may utilize the graph embeddings and the component interrelations to predict links between the components. The device may predict poses and joint axes for the components, and may generate assembly instructions based on the graph embeddings, the component interrelations, the links, the poses, and the joint axes.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 19, 2024
    Inventors: Kumar ABHINAV, Alpana DUBEY, Shubhashis SENGUPTA, Piyush Goenka
  • Publication number: 20240416333
    Abstract: Modified zeolites may include a microporous framework including a plurality of micropores having diameters of less than or equal to 2 nm. The microporous framework may include at least silicon atoms and oxygen atoms. The modified zeolite may include a plurality of mesopores having diameters of greater than 2 nm and less than or equal to 50 nm, wherein the plurality of mesopores are ordered with cubic symmetry. The modified zeolite may include a plurality of hafnium hydride moieties each bonded to at least two bridging oxygen atoms, wherein a hafnium atom of the hafnium hydride is bonded to the bridging oxygen atom, and wherein the bridging oxygen atom bridges the hafnium atom of the hafnium hydride moiety and a silicon atom of the microporous framework.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 19, 2024
    Applicants: Saudi Arabian Oil Company, King Abdullah University of Science and Technology
    Inventors: Robert Peter Hodgkins, Omer Refa Koseoglu, Kuo-Wei Huang, Magnus Rueping, Manoja K. Samantaray, Rajesh Kumar Parsapur, Anissa Bendjeriou Sedjerari
  • Publication number: 20240417724
    Abstract: The present invention relates to an anti-inflammatory composition and also a method of obtaining the same. The anti-inflammatory composition of the present invention is capable of downregulating the inflammatory genes and comprises an extracellular ribonucleic acid (exRNA) encapsulated in an extracellular vesicle (EV) and other suitable excipients wherein both the extracellular ribonucleic acid (exRNA) and extracellular vesicle (EV) are derived from extra polymeric substances (EPS) of gram-positive non-pathogenic bacteria.
    Type: Application
    Filed: December 2, 2021
    Publication date: December 19, 2024
    Applicant: VASTU VIHAR BIOTECH PRIVATE LIMITED
    Inventor: Vinay KUMAR TIWARY
  • Publication number: 20240421587
    Abstract: A wireless power transfer system is disclosed. The wireless power transfer system includes a first converting unit configured to convert a first DC voltage of an input power to an AC voltage. Further, the wireless power transfer system includes a contactless power transfer unit configured to transmit the input power having the AC voltage. Also, the wireless power transfer system includes a second converting unit configured to convert the AC voltage to a second DC voltage and transmit the input power having the second DC voltage to an electric load. Additionally, the wireless power transfer system includes a switching unit configured to decouple the electric load from the contactless power transfer unit if the second DC voltage across the electric load is greater than a first threshold value.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Inventors: Kapil Jha, Arvind Kumar Tiwari, Yash Veer Singh, Olive Ray
  • Publication number: 20240419544
    Abstract: A memory device to use added known data as part of data written to memory cells with redundant data generated according to an error correction code (ECC). The code rate of the ECC may limit its capability to recover from excessive errors in the stored data. To reduce the errors, the added data retrieved from the memory cells can be corrected without using the ECC. Subsequently, remaining errors can be corrected via the ECC. Optionally, the added data can be configured to be the same as the data represented by an erased state of a subset of the memory cells such that when the subset is used to store the added data, the subset remains in the erased state to reduce wearing. Different subsets can be used to store added data for different write operations to distribute the benefit of reduced wearing.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Inventors: Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Akira Goda, Mustafa N. Kaynak
  • Publication number: 20240420080
    Abstract: This disclosure describes a system for automatically transitioning items from a materials handling facility without delaying a user as they exit the materials handling facility. For example, while a user is located in a materials handling facility, the user may pick one or more items. The items are identified and automatically associated with the user at or near the time of the item pick. When the users enters and/or passes through a transition area, the picked items are automatically transitioned to the user without affirmative input from or delay to the user.
    Type: Application
    Filed: April 26, 2024
    Publication date: December 19, 2024
    Inventors: Gianna Lise Puerini, Dilip Kumar, Steven Kessel
  • Publication number: 20240419878
    Abstract: A method, system, and circuit arrangement involve synthesizing a circuit design specified in a register transfer level (RTL) specification into a netlist. The RTL specification includes an assert statement that specifies a conditional expression involving one or more signals specified in the circuit design to be checked during simulation, and the synthesizing includes synthesizing the assert statement into netlist elements. The design tool places and routes the netlist into a circuit design layout and generates implementation data from the layout.
    Type: Application
    Filed: June 19, 2023
    Publication date: December 19, 2024
    Applicant: Xilinx, Inc.
    Inventors: Anil Kumar A V, Alok Mistry
  • Publication number: 20240422537
    Abstract: The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. Embodiments herein provide a method for managing aerial information of an UUAA context in a wireless network (1000) by a network device (600). The method includes storing an UUAA Mobility Management (UUAA-MM) context or UUAA Session Management (UUAA-SM) context when an UAV (100) is authenticated and authorized for an Uncrewed Aerial System (CAS) service in the wireless network. Further, the method includes detecting an event associated with an UAV (100) in the wireless network. Further, the method includes removing the stored UUAA-MM context or UUAA-SM context for the UAS service for the UAV (100) in response to detecting the event. Further, the method includes transmitting a message to an UASNF device (300) to unsubscribe for the UAS service for the UAV or to remove the UUAA-MM context or UUAA-SM context stored at the UASNF device (300) for the CAS service for the UAV.
    Type: Application
    Filed: January 11, 2023
    Publication date: December 19, 2024
    Inventors: Ashok Kumar NAYAK, Dongyeon KIM, Jungshin PARK