Abstract: A light-emitting diode chip structure including a conductive substrate, a semiconductor stacking layer and a patterned seed crystal layer is provided. The conductive substrate has a surface. The surface has a first region and a second region alternately distributed over the surface. The semiconductor stacking layer is disposed on the conductive substrate, and the surface of the conductive substrate faces the semiconductor stacking layer. The patterned seed crystal layer is disposed on the first region of the surface of the conductive substrate and between the conductive substrate and the semiconductor stacking layer. The patterned seed crystal layer separates the semiconductor stacking layer from the first region. The semiconductor stacking layer covers the patterned seed crystal layer and the second region, and is electrically connected to the conductive substrate through the second region. A fabrication method of the light-emitting diode chip structure is also provided.

Abstract: A high bright LED comprises a substrate, a conductive layer, a first semiconductor layer, a luminous layer, a second semiconductor layer, a first electrode, a second electrode and an insulation structure. The conductive layer, the first semiconductor layer, the luminous layer and the second semiconductor layer are disposed upwards from an upper solder layer of the substrate in order. The first electrode is electrically connected to the conductive layer The second electrode penetrates through the conductive layer, the first semiconductor layer and the luminous layer to make the upper solder and the second semiconductor layer electrically connected. The insulation structure comprises at least two passivation layers peripherally wrapping the second electrode. The thicknesses of the at least two passivation layers are conformed to the distributed Bragg reflection technique to make the passivation layers jointly used as a reflector with high reflectance.

Abstract: A light-emitting diode chip structure including a conductive substrate, a semiconductor stacking layer and a patterned seed crystal layer is provided. The conductive substrate has a surface. The surface has a first region and a second region alternately distributed over the surface. The semiconductor stacking layer is disposed on the conductive substrate, and the surface of the conductive substrate faces the semiconductor stacking layer. The patterned seed crystal layer is disposed on the first region of the surface of the conductive substrate and between the conductive substrate and the semiconductor stacking layer. The patterned seed crystal layer separates the semiconductor stacking layer from the first region. The semiconductor stacking layer covers the patterned seed crystal layer and the second region, and is electrically connected to the conductive substrate through the second region. A fabrication method of the light-emitting diode chip structure is also provided.

Abstract: The present invention provides fan with an inrunner motor. The fan includes a fan frame, a rotor and a stator. The fan frame includes a base. The rotor includes a hub, a bushing and a magnetic member, wherein the magnetic member sleeves on the bushing. The stator is disposed on the base and coupled with the rotor, and the stator includes a shaft through the bushing, wherein an end of the shaft is fixed on the base.

Abstract: A cover mechanism for an electronic device includes a protective cover and a resisting member. The protective cover includes a cover portion, and an arm portion. The arm portion allows the protective cover to rotate relative to the electronic device. The resisting member is attached to the electronic device, and prevents the arm portion from separating from the electronic device.

Abstract: A fuel cell MEA with a border packaging structure. A catalyst coated membrane includes an anode catalyst layer, a cathode catalyst layer, and a proton exchange membrane disposed therebetween. An anode border packaging member is connected between the anode catalyst layer and an anode gas diffusion layer. A cathode border packaging member is connected between the cathode catalyst layer and a cathode gas diffusion layer and adheres to the anode border packaging member at outer edges of the catalyst coated membrane. The anode border packaging member and the cathode border packaging member respectively include two adhesive layers and a substrate layer formed therebetween. The anode border packaging member and the cathode border packaging member are respectively connected between the anode catalyst layer and the anode gas diffusion layer and between the cathode catalyst layer and the cathode gas diffusion layer by the adhesive layers.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A fabrication method of light emitting diode is provided. A first type doped semiconductor layer is formed on a substrate. Subsequently, a light emitting layer is formed on the first type doped semiconductor layer. A process for forming the light emitting layer includes alternately forming a plurality of barrier layers and a plurality of quantum well layers on the first type doped semiconductor layer. The quantum well layers are formed at a growth temperature T1, and the barrier layers are formed at a growth temperature T2, where T1<T2. Then, a second type doped semiconductor layer is formed on the light emitting layer.

Abstract: A computing system for managing site security through a communication device includes a mobile communication device, a notification, and the communication device. Using BLUETOOTH technology, the mobile communication device communicates with and activates the communication device and the notification. The communication device detects any noteworthy event and captures visual data accordingly, and transmits the visual data to the mobile communication device. The notification generates visual and audio alerts. A related method and storage medium with instructions for performance of the method also provided.

Abstract: A semiconductor wafer includes a substrate, a first separating structure and a semiconductor stacked layer structure. The substrate has a first surface. The first separating structure is formed on the first surface to divide the first surface into a plurality of independent regions. The minimum area of each of the regions is more than or equal to one square inch. The semiconductor stacked layer structure is disposed on the first surface and the first separating structure. The semiconductor wafer can prevent bowing of the semiconductor wafer during an epitaxial growth process so as to enhance quality of the semiconductor wafer.

Abstract: A three-phase motor includes a bearing structure, a rotor structure and a stator structure. The bearing structure has a bushing. The rotor structure has a shaft disposed in the bushing. The stator structure is disposed corresponding to the rotor structure and includes a first coil assembly and a second coil assembly overlapped on the first coil assembly. A fan with the motor is also disclosed. The present invention can increase the ratio of the effective coils of the stator structure, and further promote the operation efficiency of the three-phase motor and the fan with the three-phase motor.

Abstract: A portable electronic device includes a housing defining a receiving hole, an operating element slidably received in the receiving hole, an elastic element elastically positioned between the housing and the operating element, and a battery cover removably attached to the housing and latching with the operating element. A battery cover assembly is also provided.

Abstract: A cover mechanism for an electronic device includes a protective cover and a resisting member. The protective cover includes a cover portion, and an arm portion. The arm portion allows the protective cover to rotate relative to the electronic device. The resisting member is attached to the electronic device, and prevents the arm portion from separating from the electronic device.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A fabrication method of light emitting diode is provided. A first type doped semiconductor layer is formed on a substrate. Subsequently, a light emitting layer is formed on the first type doped semiconductor layer. A process for forming the light emitting layer includes alternately forming a plurality of barrier layers and a plurality of quantum well layers on the first type doped semiconductor layer. The quantum well layers are formed at a growth temperature T1, and the barrier layers are formed at a growth temperature T2, where T1<T2. Then, a second type doped semiconductor layer is formed on the light emitting layer.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: Systems and techniques for transmitting data stream to a client include transmitting a data segment from one of a plurality of nodes of a continuous media server to a client according to a scheduler on the node. A system includes a plurality of data processing devices, each data processing device coupled with at least one storage device. Each data processing device includes a scheduler to schedule transmission of the data segment to a client in sequence with other data segments, and a module to transmit the data segment to the client.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A physical configuration of a computer system is described. The motherboard has a first series of I/O ports at an edge thereof. A riser card is perpendicularly connected with the motherboard, wherein the riser card has a second series of I/O ports at an edge thereof. A housing encloses the motherboard and the riser card, wherein the housing has a plurality of openings, exposing each of the first series of I/O ports and the second series of I/O ports so as to form an L-shaped I/O port area on a flat surface thereof.

Abstract: Admission of a new disk stream is based on the probability of overcommitting disk bandwidth based on parameters related to the disk. These fixed parameters are determined either by retrieval from the disk or by investigating the disk. Probability functions of the disk parameters may be obtained. Exemplary disk parameters may be average disk seek time, probabilistic determination of the amount of data exchange during a single exchange, and probabilistic information about reading versus writing.