Patents by Inventor Kun Tian

Kun Tian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250117264
    Abstract: Techniques for scalable virtualization of an Input/Output (I/O) device are described. An electronic device composes a virtual device comprising one or more assignable interface (AI) instances of a plurality of AI instances of a hosting function exposed by the I/O device. The electronic device emulates device resources of the I/O device via the virtual device. The electronic device intercepts a request from the guest pertaining to the virtual device, and determines whether the request from the guest is a fast-path operation to be passed directly to one of the one or more AI instances of the I/O device or a slow-path operation that is to be at least partially serviced via software executed by the electronic device. For a slow-path operation, the electronic device services the request at least partially via the software executed by the electronic device.
    Type: Application
    Filed: November 1, 2024
    Publication date: April 10, 2025
    Applicant: Intel Corporation
    Inventors: Utkarsh Y. KAKAIYA, Rajesh M. SANKARAN, Sanjay KUMAR, Kun TIAN, Philip LANTZ
  • Patent number: 12253955
    Abstract: Methods, apparatus, systems and articles of manufacture to control address space isolation in a virtual machine are disclosed. An example apparatus includes an address width adjustor to identify a memory width value corresponding to a guest memory associated with a virtual machine (VM), and generate an expanded emulated memory width value. The example apparatus also includes a memory mirror manager to generate a first guest physical address (GPA) range based on the memory width value, and generate a second GPA range based on the expanded emulated memory width value. The example apparatus also includes an EPT generator to generate root paging structures of a first type of EPT with respective addresses within the first GPA range, and generate root paging structures of a second type of EPT with respective addresses within (a) the first GPA range and (b) the second GPA range.
    Type: Grant
    Filed: April 3, 2024
    Date of Patent: March 18, 2025
    Assignee: Intel Corporation
    Inventors: Jun Tian, Kun Tian, Yu Zhang
  • Patent number: 12232497
    Abstract: A mixed bacteria for promoting nodulation and nitrogen fixation of Robinia pseudoacacia and their application are provided. The mixed bacteria includes Kocuria sp. X-22, Microbacterium sp. X-26, and Bacillus sp. X-28, all of which have been preserved in China Center for Type Culture Collection, and the preservation numbers respectively are: CCTCC No: M 2019237; CCTCC No: M 2019238; CCTCC No: M 2019239. The mixed bacteria are watered directly around the seedlings of Robinia pseudoacacia. Compared with the single bacteria control group and the sterile control group, the disclosure can produce synergistic superimposing effects, significantly improve the nodulation rate and symbiotic nitrogen fixation of the Robinia pseudoacacia, and promote the photosynthesis of the Robinia pseudoacacia.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: February 25, 2025
    Assignee: NANJING FORESTRY UNIVERSITY
    Inventors: Jiayao Zhuang, Chao Liu, Xiaoxue Wang, Jiaxin Zheng, Kun Tian
  • Patent number: 12189509
    Abstract: In an embodiment, a processor for redirecting requests includes a processing engine to execute a guest system, and monitoring circuitry coupled to the processing engine. The monitoring circuitry may be to: receive, from the guest system, a first request to access a first virtual counter; in response to a receipt of the first request, determine, based a mapping register of the processor, a first physical counter mapped to the first virtual counter; and redirect the first request to the first physical counter mapped to the first virtual counter. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: January 7, 2025
    Inventors: Wei Wang, Matthew Merten, Beeman Strong, Andreas Kleen, Kan Liang, Gilbert Neiger, Kun Tian, Like Xu
  • Publication number: 20240428200
    Abstract: Described herein is a technique for generating data for a computer system. An apparatus comprises a high-speed communication bus, a memory unit communicatively coupled to the high-speed communication bus, an integrated circuit communicatively coupled to the high-speed communication bus, the integrated circuit to execute a machine learned model trained to receive input data and generate a set of implicit keywords from the input data to support a network service, and an implicit facet mapper to map the input data to an implicit facet of a knowledge graph, a database communicatively coupled to the high-speed communication bus, the database to store the set of implicit keywords and implicit facet in a data structure, and a network interface communicatively coupled to the high-speed communication bus to access a wireless network. Other embodiments are described and claimed.
    Type: Application
    Filed: September 9, 2024
    Publication date: December 26, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Wen Pu, Yuchin Juan, Ping Liu, Kun Tian, Dawei Wang
  • Patent number: 12174739
    Abstract: Various embodiments are generally directed to virtualized systems. A first guest memory page may be identified based at least in part on a number of accesses to a page table entry for the first guest memory page in a page table by an application executing in a virtual machine (VM) on the processor, the first guest memory page corresponding to a first byte-addressable memory. The execution of the VM and the application on the processor may be paused. The first guest memory page may be migrated to a target memory page in a second byte-addressable memory, the target memory page comprising one of a target host memory page and a target guest memory page, the second byte-addressable memory having an access speed faster than an access speed of the first byte-addressable memory.
    Type: Grant
    Filed: December 21, 2023
    Date of Patent: December 24, 2024
    Assignee: Intel Corporation
    Inventors: Yao Zu Dong, Kun Tian, Fengguang Wu, Jingqi Liu
  • Patent number: 12164971
    Abstract: Techniques for scalable virtualization of an Input/Output (I/O) device are described. An electronic device composes a virtual device comprising one or more assignable interface (AI) instances of a plurality of AI instances of a hosting function exposed by the I/O device. The electronic device emulates device resources of the I/O device via the virtual device. The electronic device intercepts a request from the guest pertaining to the virtual device, and determines whether the request from the guest is a fast-path operation to be passed directly to one of the one or more AI instances of the I/O device or a slow-path operation that is to be at least partially serviced via software executed by the electronic device. For a slow-path operation, the electronic device services the request at least partially via the software executed by the electronic device.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: December 10, 2024
    Assignee: Intel Corporation
    Inventors: Utkarsh Y. Kakaiya, Rajesh Sankaran, Sanjay Kumar, Kun Tian, Philip Lantz
  • Publication number: 20240385970
    Abstract: Methods, apparatus, systems and articles of manufacture to control address space isolation in a virtual machine are disclosed. An example apparatus includes an address width adjustor to identify a memory width value corresponding to a guest memory associated with a virtual machine (VM), and generate an expanded emulated memory width value. The example apparatus also includes a memory mirror manager to generate a first guest physical address (GPA) range based on the memory width value, and generate a second GPA range based on the expanded emulated memory width value. The example apparatus also includes an EPT generator to generate root paging structures of a first type of EPT with respective addresses within the first GPA range, and generate root paging structures of a second type of EPT with respective addresses within (a) the first GPA range and (b) the second GPA range.
    Type: Application
    Filed: April 3, 2024
    Publication date: November 21, 2024
    Inventors: Jun Tian, Kun Tian, Yu Zhang
  • Publication number: 20240345865
    Abstract: Techniques for transferring virtual machines and resource management in a virtualized computing environment are described. In one embodiment, for example, an apparatus may include at least one memory, at least one processor, and logic for transferring a virtual machine (VM), at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one processor, the logic to generate a plurality of virtualized capability registers for a virtual device (VDEV) by virtualizing a plurality of device-specific capability registers of a physical device to be virtualized by the VM, the plurality of virtualized capability registers comprising a plurality of device-specific capabilities of the physical device, determine a version of the physical device to support via a virtual machine monitor (VMM), and expose a subset of the virtualized capability registers associated with the version to the VM. Other embodiments are described and claimed.
    Type: Application
    Filed: April 23, 2024
    Publication date: October 17, 2024
    Applicant: Intel Corporation
    Inventors: SANJAY KUMAR, PHILIP R. LANTZ, KUN TIAN, UTKARSH Y. KAKAIYA, RAJESH M. SANKARAN
  • Patent number: 12117910
    Abstract: Examples may include a method of instantiating a virtual machine, instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the virtual device.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: October 15, 2024
    Assignee: Intel Corporation
    Inventors: Nrupal Jani, Manasi Deval, Anjali Singhai Jain, Parthasarathy Sarangam, Mitu Aggarwal, Neerav Parikh, Alexander H. Duyck, Kiran Patil, Rajesh M. Sankaran, Sanjay K. Kumar, Utkarsh Y. Kakaiya, Philip Lantz, Kun Tian
  • Publication number: 20240338319
    Abstract: Embodiments of apparatuses, methods, and systems for unified address translation for virtualization of input/output devices are described. In an embodiment, an apparatus includes first circuitry to use at least an identifier of a device to locate a context entry and second circuitry to use at least a process address space identifier (PASID) to locate a PASID-entry. The context entry is to include at least one of a page-table pointer to a page-table translation structure and a PASID. The PASID-entry is to include at least one of a first-level page-table pointer to a first-level translation structure and a second-level page-table pointer to a second-level translation structure. The PASID is to be supplied by the device. At least one of the apparatus, the context entry, and the PASID entry is to include one or more control fields to indicate whether the first-level page-table pointer or the second-level page-table pointer is to be used.
    Type: Application
    Filed: June 17, 2024
    Publication date: October 10, 2024
    Applicant: Intel Corporation
    Inventors: Utkarsh Y. Kakaiya, Sanjay Kumar, Rajesh M. Sankaran, Philip R. Lantz, Ashok Raj, Kun Tian
  • Publication number: 20240338238
    Abstract: A method and system of host to guest (H2G) notification are disclosed. H2G is provided via an instruction. The instruction is a send user inter-processor interrupt instruction. An exemplary processor includes decoder circuitry to decode a single instruction and execute the decoded single instruction according to the at least the opcode to cause a host to guest notification from a virtual device running in a host machine on the first physical processor to a virtual device driver running on a virtual processor in a guest machine on a second physical processor.
    Type: Application
    Filed: January 26, 2022
    Publication date: October 10, 2024
    Applicant: Intel Corporation
    Inventors: Wei Wang, Kun Tian, Guang Zeng, Gilbert Neiger, Rajesh Sankaran, Asit Mallick, Jr-Shian Tsai, Jacob Jun Pan, Mesut Ergin
  • Patent number: 12020054
    Abstract: Apparatus and method for implementing a virtual display. For example, one embodiment of a graphics processing apparatus comprises at least one configuration register to store framebuffer descriptor information for a first guest running on a first virtual machine (VM) in a virtualized execution environment of a host processor, the framebuffer descriptor information to indicate one or more display pipes assigned to the first guest; and execution circuitry to execute a first driver assigned to the first guest, the first guest to use the first driver to display a framebuffer in a plane associated with one of the display pipes in accordance with the framebuffer descriptor information.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: June 25, 2024
    Assignee: INTEL CORPORATION
    Inventors: Kun Tian, Ankur Shah, David Cowperthwaite, Zhi Wang, Zhenyu Wang, Kalyan Kondapally, Jonathan Bloomfield, Wei Zhang
  • Publication number: 20240196904
    Abstract: A mixed bacteria for promoting nodulation and nitrogen fixation of Robinia pseudoacacia and their application are provided. The mixed bacteria includes Kocuria sp. X-22, Microbacterium sp. X-26, and Bacillus sp. X-28, all of which have been preserved in China Center for Type Culture Collection, and the preservation numbers respectively are: CCTCC No: M 2019237; CCTCC No: M 2019238; CCTCC No: M 2019239. The mixed bacteria are watered directly around the seedlings of Robinia pseudoacacia. Compared with the single bacteria control group and the sterile control group, the disclosure can produce synergistic superimposing effects, significantly improve the nodulation rate and symbiotic nitrogen fixation of the Robinia pseudoacacia, and promote the photosynthesis of the Robinia pseudoacacia.
    Type: Application
    Filed: January 12, 2021
    Publication date: June 20, 2024
    Applicant: NANJING FORESTRY UNIVERSITY
    Inventors: JIAYAO ZHUANG, CHAO LIU, XIAOXUE WANG, JIAXIN ZHENG, KUN TIAN
  • Patent number: 12013790
    Abstract: Embodiments of apparatuses, methods, and systems for unified address translation for virtualization of input/output devices are described. In an embodiment, an apparatus includes first circuitry to use at least an identifier of a device to locate a context entry and second circuitry to use at least a process address space identifier (PASID) to locate a PASID-entry. The context entry is to include at least one of a page-table pointer to a page-table translation structure and a PASID. The PASID-entry is to include at least one of a first-level page-table pointer to a first-level translation structure and a second-level page-table pointer to a second-level translation structure. The PASID is to be supplied by the device. At least one of the apparatus, the context entry, and the PASID entry is to include one or more control fields to indicate whether the first-level page-table pointer or the second-level page-table pointer is to be used.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: June 18, 2024
    Assignee: Intel Corporation
    Inventors: Utkarsh Y. Kakaiya, Sanjay Kumar, Rajesh M. Sankaran, Philip R. Lantz, Ashok Raj, Kun Tian
  • Publication number: 20240192981
    Abstract: Embodiments of exitless guest to host (G2H) notification are described. In some embodiments, G2H is provided via an instruction. An exemplary processor includes decoder circuitry to decode a single instruction, the single instruction to include a field for an opcode; and execution processing resources to execute the decoded single instruction according to the at least the opcode to cause an exitless guest to host notification from a virtual processor to a physical or virtual processor.
    Type: Application
    Filed: June 25, 2021
    Publication date: June 13, 2024
    Inventors: Wei WANG, Kun TIAN, Gilbert NEIGER, Rajesh SANKARAN, Asit MALLICK, Jr-Shian TSAI, Jacob Jun PAN, Mesut ERGIN
  • Publication number: 20240188515
    Abstract: A method for spraying Robinia pseudoacacia on exposed shale wall to efficiently and rapidly restore green and improve soil pH value is provided. External-soil spray seeding is used to spray mixed microorganisms, organic fertilizer, and soil on exposed shale walls with a green plant of Robinia pseudoacacia to efficiently and rapidly restore green and improve soil pH value. The mixed microorganisms include Kocuria sp. X-22, Microbacterium sp. X-26, Bacillus sp. X-28 and Microbacterium sp. X-18, and the mixed microorganisms are added to organic fertilizer and soil by fermentation broth. The weight ratio of mixed microorganisms, organic fertilizer and soil is 1:1:8. The method can promote the rapid growth of Robinia pseudoacacia on the exposed shale wall and significantly increase organic matter content, effective phosphorus content, and pH value of the Robinia pseudoacacia soil.
    Type: Application
    Filed: September 12, 2023
    Publication date: June 13, 2024
    Applicant: NANJING FORESTRY UNIVERSITY
    Inventors: JIAYAO ZHUANG, CHAO LIU, GUOHUA FAN, KUN TIAN, JINCHI ZHANG
  • Patent number: 11995462
    Abstract: Techniques for transferring virtual machines and resource management in a virtualized computing environment are described. In one embodiment, for example, an apparatus may include at least one memory, at least one processor, and logic for transferring a virtual machine (VM), at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one processor, the logic to generate a plurality of virtualized capability registers for a virtual device (VDEV) by virtualizing a plurality of device-specific capability registers of a physical device to be virtualized by the VM, the plurality of virtualized capability registers comprising a plurality of device-specific capabilities of the physical device, determine a version of the physical device to support via a virtual machine monitor (VMM), and expose a subset of the virtualized capability registers associated with the version to the VM. Other embodiments are described and claimed.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: May 28, 2024
    Assignee: Intel Corporation
    Inventors: Sanjay Kumar, Philip R. Lantz, Kun Tian, Utkarsh Y. Kakaiya, Rajesh M. Sankaran
  • Publication number: 20240146868
    Abstract: Embodiments of this disclosure relate to the multimedia processing field, and provide a video frame interpolation method, apparatus, and a device. In the video frame interpolation method in this disclosure, a first image at first time, a second image at second time, and sensor data captured by a dynamic vision sensor apparatus are obtained, and the sensor data includes dynamic event data between the first time and the second time. At least one target image is determined based on the first image, the second image, and the sensor data, where the at least one target image is an image corresponding to at least one target time between the first time and the second time. The dynamic event data is used to help compensate for motion information missing from existing image data. This implements accurate prediction of an intermediate image, and improves image prediction effect.
    Type: Application
    Filed: December 20, 2023
    Publication date: May 2, 2024
    Inventors: Ziyang ZHANG, Weihua HE, Chen YANG, Jianxing LIAO, Kun TIAN, Ying WANG, Yunlong ZHAN
  • Patent number: 11971827
    Abstract: Methods, apparatus, systems and articles of manufacture to control address space isolation in a virtual machine are disclosed. An example apparatus includes an address width adjustor to identify a memory width value corresponding to a guest memory associated with a virtual machine (VM), and generate an expanded emulated memory width value. The example apparatus also includes a memory mirror manager to generate a first guest physical address (GPA) range based on the memory width value, and generate a second GPA range based on the expanded emulated memory width value. The example apparatus also includes an EPT generator to generate root paging structures of a first type of EPT with respective addresses within the first GPA range, and generate root paging structures of a second type of EPT with respective addresses within (a) the first GPA range and (b) the second GPA range.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: April 30, 2024
    Assignee: Intel Corporation
    Inventors: Jun Tian, Kun Tian, Yu Zhang