Abstract: The present disclosure provides a wireless communication system including a first host computer, a communication dongle, a second host computer and an input device. The communication dongle is connected to the first host computer via a USB interface, connected to the second host computer via a Bluetooth interface, and connected to the input device via a RF interface. The first host computer has first application software for intercepting the operating signal(s) of the input device and transferring, via the communication dongle, to the second host computer to be executed thereby. The first application software also controls the first host computer to ignore the operating signal(s) during the operating signal(s) is being transferred to the second host computer.

Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.

Abstract: The present disclosure provides a wireless communication system including a first host computer, a communication dongle, a second host computer and an input device. The communication dongle is connected to the first host computer via a USB interface, connected to the second host computer via a Bluetooth interface, and connected to the input device via a RF interface. The first host computer has first application software for intercepting the operating signal(s) of the input device and transferring, via the communication dongle, to the second host computer to be executed thereby. The first application software also controls the first host computer to ignore the operating signal(s) during the operating signal(s) is being transferred to the second host computer.

Abstract: Embodiments of the present disclosure provide a physical test system of large-scale three-dimensional multi-functional landslide-prevention and control structure. The system comprises a model test tank, a bidirectional servo loading system, a multi-scale model transformation system, a sliding surface evolution visualization system, a positive pressure monitoring system, an artificial rainfall system, and a control system. The bidirectional servo loading system applies a horizontal load and a vertical load, and the multi-scale model transformation system includes a plurality of retractable counterforce brackets, configured to change a width of the model test tank; and the sliding surface evolution visualization system includes a plurality of filming devices, configured to record a whole evolution process of a landslide sliding surface evolution.

Abstract: Abase for mounting functional units of a stir-fry device including: a cylindrical main body including a top surface, and a connecting cylinder. The connecting cylinder extends upwards from the center of the top surface and is configured to receive a stirring blade for stirring food materials in a frying pan. The edge of the top surface includes a plurality of spaced apart mounting holes and a plurality of spaced apart fastening holes. The frying pan is fixed on the base through the spaced apart mounting holes, and the base is fixed in an inner ring of a pivoting support of a stir-fry device through the spaced apart fastening holes. The base further includes a bottom surface including a plurality of spaced apart fixing holes, and a driven gear meshed with a driving gear is fixed on the base through the spaced apart fixing holes.

Abstract: A pile-net flexible cable barrier structure includes a first V-shaped pile, a second V-shaped pile, a left tension pile, a right tension pile, a first flexible cable net disposed between the left tension pile and the first V-shaped pile, a second flexible cable net disposed between the first V-shaped pile and the second V-shaped pile, and a third flexible cable net disposed between the second V-shaped pile and the right tension pile. A second pile body of the first V-shaped pile are disposed parallel to a third pile body of the second V-shaped pile, openings of the first V-shaped pile and the second V-shaped pile face a same side, the left tension pile are disposed parallel to the first pile body of the first V-shaped pile, and the right tension pile are disposed parallel to the fourth pile body of the second V-shaped pile.

Abstract: Provided are a system and a method for impact testing and monitoring of a high-energy flexible net. The system includes a vertical impact testing unit, a slope impact testing unit, an impact simulation unit, and an impact monitoring unit. The vertical impact testing unit includes a vertically positioned gravity wall. The slope impact testing unit includes a wall slope positioned perpendicularly to a second side of the gravity wall. A first side of the gravity wall and a slope surface of the wall slope are securely provided with a flexible net, respectively. The impact simulation unit includes an impact assembly and a lifting assembly. The impact monitoring unit is configured to monitor a deformation result and an internal force change result of the flexible net.

Abstract: A semiconductor device with a deep trench isolation and a shallow trench isolation includes a substrate. The substrate is divided into a high voltage transistor region and a low voltage transistor region. A deep trench is disposed within the high voltage transistor region. The deep trench includes a first trench and a second trench. The first trench includes a first bottom. The second trench extends from the first bottom toward a bottom of the substrate. A first shallow trench and a second shallow trench are disposed within the low voltage transistor region. A length of the first shallow trench is the same as a length of the second trench. An insulating layer fills in the first trench, the second trench, the first shallow trench and the second shallow trench.

Abstract: Sulfonyl-triazole compounds and related sulfonyl-heterocycle compounds are described. The compounds can form covalent adducts with reactive nucleophilic amino acid residues, e.g., reactive tyrosines and reactive lysines, in kinases to form modified kinases and/or alter the biological activity of the kinases. Kinases targetable by the compounds include cyclin-dependent kinase 2 (CDK2), diacylglycerol kinases (DGKs), and phosphofructokinase (PFK). Pharmaceutical compositions including the compounds and methods of inhibiting kinases are also described.

Abstract: Disclosed are a colorimeter and a reflectivity measuring method based on a multichannel spectrum. The colorimeter includes a main unit and a calibration box, wherein the main unit includes an integrating sphere, a light source and a main sensor, a detection hole is formed in one side of a top of the integrating sphere, a light-through hole is formed in a side of the integrating sphere, and a measuring port is formed in a bottom of the integrating sphere, the light source is arranged outside the light-through hole, and the main sensor is arranged outside the detection hole; the calibration box includes a housing and a white board arranged at a top of the housing, the white board is correspondingly matched with the measuring port, and the calibration box is connected with the main unit; the sensor is a multichannel spectral sensor.

Abstract: Disclosed are a colorimeter and a reflectivity measuring method based on a multichannel spectrum. The colorimeter includes a main unit and a calibration box, wherein the main unit includes an integrating sphere, a light source and a main sensor, a detection hole is formed in one side of a top of the integrating sphere, a light-through hole is formed in a side of the integrating sphere, and a measuring port is formed in a bottom of the integrating sphere, the light source is arranged outside the light-through hole, and the main sensor is arranged outside the detection hole; the calibration box includes a housing and a white board arranged at a top of the housing, the white board is correspondingly matched with the measuring port, and the calibration box is connected with the main unit; the sensor is a multichannel spectral sensor.

Abstract: An electronic package and a circuit structure thereof are provided, in which a circuit layer and an electrical function part are formed on a dielectric layer of the circuit structure, and the dielectric layer has at least one corner at a right angle, where a shape of the electrical function part at the corner and corresponding to the right angle is of a non-right angle shape and/or a routing path of the circuit layer at the corner and corresponding to the right angle is of a non-right angle shape, so that stress concentration can be reduced, thereby preventing the electronic package from warping.

Abstract: An integrated circuit layout includes an upper active region comprising a first edge and a second edge extending along a first direction and respectively adjacent to an upper cell boundary by a distance D3 and a distance D4. A first gate line is disposed on the upper active region, extends along a second direction, and protrudes from the first edge by a length L3. A second gate line is disposed on the upper active region, extends along the second direction, and protrudes from the second edge by a length L4. Two dummy gate lines respectively extend along the second direction and are disposed at two sides of the upper active region and away from the upper cell boundary by a distance S. The first direction and the second direction are perpendicular. The distances D3, D4, S and the lengths L3 and L4 have the relationships: L3?D3?S, L4?D4?S, and D3?D4.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element is pasted on a routing layer that is configured with a plurality of conductive pillars, then the electronic element, the conductive pillars and the routing layer are covered with a cladding layer, and a circuit structure electrically connected to the electronic element and the conductive pillars is formed on the cladding layer. Therefore, the conductive pillars can be directly formed on the routing layer and the dielectric layer is omitted, so there is no need to consider the thickness of the dielectric layer, so as to facilitate the thinning of the electronic package.

Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.

Abstract: An electronic package is provided, in which an electronic element and a plurality of shielding pillars are embedded in an encapsulating layer, a shielding layer is formed on one surface of the encapsulating layer to cover the electronic element and is in contact with and connected to the plurality of shielding pillars, and a circuit structure is formed on the other surface of the encapsulating layer to electrically connect to the electronic element. Therefore, when the electronic package is disposed on a circuit board, the design of the shielding layer and the plurality of shielding pillars can provide the electronic element with heat dissipation and shielding effects without a metal cover arranged on the electronic element.

Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.

Abstract: A barrier structure for bearing a high-energy impact and construction method thereof are provided. The barrier structure includes a supporting pile array arranged between two opposite mountain slope surfaces. The supporting pile array is arranged in a straight line and includes two or more supporting piles. The two or more supporting piles are fixed at a lower part of a mountain. A barrier net is connected to the two or more supporting piles. The barrier net passes through the supporting pile array and extends to the two opposite mountain slope surfaces. The barrier net is fixed on the two opposite mountain slope surfaces. Pull plates are disposed on the two opposite mountain slope surfaces, and one side of each of the pull plates is fixed to a corresponding slope surface of the two opposite mountain slope surfaces through reverse prestressed anchor cables.

Abstract: The present disclosure provides a wireless communication system including a first host computer, a communication dongle, a second host computer and an input device. The communication dongle is connected to the first host computer via a USB interface, connected to the second host computer via a Bluetooth interface, and connected to the input device via a wireless interface. The first host computer has first application software for intercepting the operating signal(s) of the input device and transferring, via the communication dongle, to the second host computer to be executed thereby. The first application software also controls the first host computer to ignore the operating signal(s) during the operating signal(s) is being transferred to the second host computer.

Abstract: A barrier structure for bearing a high-energy impact and construction method thereof are provided. The barrier structure includes a supporting pile array arranged between two opposite mountain slope surfaces. The supporting pile array is arranged in a straight line and includes two or more supporting piles. The two or more supporting piles are fixed at a lower part of a mountain. A barrier net is connected to the two or more supporting piles. The barrier net passes through the supporting pile array and extends to the two opposite mountain slope surfaces. The barrier net is fixed on the two opposite mountain slope surfaces. Pull plates are disposed on the two opposite mountain slope surfaces, and one side of each of the pull plates is fixed to a corresponding slope surface of the two opposite mountain slope surfaces through reverse prestressed anchor cables.