Patents by Inventor Kuniaki Sueoka

Kuniaki Sueoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170338152
    Abstract: A method for filling a through hole with solder includes mounting a substrate having a through hole formed therein on a permeable barrier layer having pores that enable gas to flow through the permeable barrier. A solder source is positioned over the through hole. Molten solder is delivered in the through hole with a positive pressure from the solder source such that gas in the through holes passes the permeable barrier while the molten solder remains in the through hole.
    Type: Application
    Filed: August 7, 2017
    Publication date: November 23, 2017
    Inventors: Toyohiro Aoki, Akihiro Horibe, Kuniaki Sueoka, Kazushige Toriyama
  • Publication number: 20170263498
    Abstract: A method for filling a through hole with solder includes mounting a substrate having a through hole formed therein on a permeable barrier layer having pores that enable gas to flow through the permeable barrier. A solder source is positioned over the through hole. Molten solder is delivered in the through hole with a positive pressure from the solder source such that gas in the through holes passes the permeable barrier while the molten solder remains in the through hole.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 14, 2017
    Inventors: Toyohiro Aoki, Akihiro Horibe, Kuniaki Sueoka, Kazushige Toriyama
  • Patent number: 9466533
    Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: October 11, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Akihiro Horibe, Hiroyuki Mori, Yasumitsu Orii, Kuniaki Sueoka, Kazushige Toriyama
  • Patent number: 9373545
    Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: June 21, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Akihiro Horibe, Hiroyuki Mori, Yasumitsu Orii, Kuniaki Sueoka, Kazushige Toriyama
  • Publication number: 20160141218
    Abstract: There is provided a circuit module where a sufficient amount of underfill resin may be supplied to corner portions of a semiconductor chip. A circuit module includes a circuit board provided with a plurality of electrode pads on a surface of the board, a semiconductor chip arranged on the board, the chip including a surface and a back surface, where each of a plurality of solder bumps and provided on the back surface is solder joined to a corresponding one of the plurality of electrode pads, and an underfill provided between the surface of the board and the back surface of the chip. Furthermore, the chip includes an eaves portion of a predetermined thickness at an outer periphery of the surface, and the underfill forms a fillet extending from a bottom surface of the eaves portion to the surface of the board along a side wall of the chip.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 19, 2016
    Inventors: Akihiro HORIBE, Sayuri HADA, Kuniaki SUEOKA
  • Publication number: 20160099175
    Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Akihiro Horibe, Hiroyuki Mori, Yasumitsu Orii, Kuniaki Sueoka, Kazushige Toriyama
  • Publication number: 20160056129
    Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.
    Type: Application
    Filed: August 24, 2015
    Publication date: February 25, 2016
    Inventors: Akihiro Horibe, Hiroyuki Mori, Yasumitsu Orii, Kuniaki Sueoka, Kazushige Toriyama
  • Patent number: 9179579
    Abstract: [Problem] To reduce thermal resistance between a heating body and a radiating body. [Solving Means] Provided is a sheet having a high thermal conductivity and flexibility, in which graphite layers and elastic layers are stacked alternately, and each of ends of the graphite layer in its surface direction or each of ends of a graphene protrudes from an end of the elastic layer and bends so as to cover at least a part of the end of the elastic layer. By placing a sheet of the present invention in a space (gap) between a heating body and a radiating body, thermal resistance at the gap, especially contact thermal resistance on a joint surface, can be reduced even in the case where flatness of a surface of the heating body or a surface of the radiating body is small.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: November 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Sayuri Hada, Kuniaki Sueoka, Yoichi Taira
  • Patent number: 8542963
    Abstract: An optical coupling structure that interfaces between optical devices mounted on a substrate and optical waveguides formed in the substrate. A manufacturing method includes preparing a wafer formed on an inorganic solid material on a dicing tape and cutting the back surface of the wafer to form substantially angled portions using a dicing blade having a point angle. The dicing tape is stripped from the wafer and the wafer is separated at the valleys between the substantially angled portions to obtain an optical coupling element. The obtained optical coupling element is a three-dimensional polyhedral light-reflecting member having a mirror surface corresponding to a surface of the wafer. The obtained optical coupling element is inserted into a trench that opens, substantially perpendicular to an optical waveguide of an optical transmission substrate, in the main surface of the optical transmission substrate to provide a structure for optical coupling with the outside.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: September 24, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shigeru Nakagawa, Hidetoshi Numata, Kuniaki Sueoka, Yoichi Taira
  • Patent number: 8442362
    Abstract: An optical coupling structure that interfaces between optical devices mounted on a substrate and optical waveguides formed in the substrate. A manufacturing method includes preparing a wafer formed on an inorganic solid material on a dicing tape and cutting the back surface of the wafer to form substantially angled portions using a dicing blade having a point angle. The dicing tape is stripped from the wafer and the wafer is separated at the valleys between the substantially angled portions to obtain an optical coupling element. The obtained optical coupling element is a three-dimensional polyhedral light-reflecting member having a mirror surface corresponding to a surface of the wafer. The obtained optical coupling element is inserted into a trench that opens, substantially perpendicular to an optical waveguide of an optical transmission substrate, in the main surface of the optical transmission substrate to provide a structure for optical coupling with the outside.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: May 14, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shigeru Nakagawa, Hidetoshi Numata, Kuniaki Sueoka, Yoichi Taira
  • Publication number: 20120312863
    Abstract: An apparatus includes a tool head configured for bonding to establish 100 or more electrical and mechanical connections between a silicon chip having a thickness of about 50 microns (?m) or smaller and a substrate, wherein 100 or more solder bumps set on a plurality of contacts on the silicon chip or a plurality of contacts on the substrate are melted by heating between the plurality of contacts of the silicon chip and the substrate, and wherein the melted solder bumps are solidified by cooling using forced convection of air flowing from around the silicon chip. The tool head includes a pyrolytic graphite sheet configured to be used in direct contact with the silicon chip, and having a thickness between about 75 ?m and 125 ?m.
    Type: Application
    Filed: July 30, 2012
    Publication date: December 13, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Kuniaki Sueoka
  • Publication number: 20120267338
    Abstract: An optical coupling structure that interfaces between optical devices mounted on a substrate and optical waveguides formed in the substrate. A manufacturing method includes preparing a wafer formed on an inorganic solid material on a dicing tape and cutting the back surface of the wafer to form substantially angled portions using a dicing blade having a point angle. The dicing tape is stripped from the wafer and the wafer is separated at the valleys between the substantially angled portions to obtain an optical coupling element. The obtained optical coupling element is a three-dimensional polyhedral light-reflecting member having a mirror surface corresponding to a surface of the wafer. The obtained optical coupling element is inserted into a trench that opens, substantially perpendicular to an optical waveguide of an optical transmission substrate, in the main surface of the optical transmission substrate to provide a structure for optical coupling with the outside.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 25, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shigeru Nakagawa, Hidetoshi Numata, Kuniaki Sueoka, Yoichi Taira
  • Publication number: 20120248598
    Abstract: An apparatus includes a tool head configured for bonding to establish 100 or more electrical and mechanical connections between a silicon chip having a thickness of about 50 microns (?m) or smaller and a substrate, wherein 100 or more solder bumps set on a plurality of contacts on the silicon chip or a plurality of contacts on the substrate are melted by heating between the plurality of contacts of the silicon chip and the substrate, and wherein the melted solder bumps are solidified by cooling using forced convection of air flowing from around the silicon chip. The tool head includes a pyrolytic graphite sheet configured to be used in direct contact with the silicon chip, and having a thickness between about 75 ?m and 125 ?m.
    Type: Application
    Filed: March 19, 2012
    Publication date: October 4, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Kuniaki Sueoka
  • Publication number: 20120031553
    Abstract: A method for making a thermal interface structure which includes a carbon nanotube layer, in which the carbon nanotubes are oriented parallel to the direction of thermal transmission and metal layers provided on two edge surfaces of the carbon nanotube layer, the edge surfaces being perpendicular to the direction of the thermal transmission and located substantially parallel to the orientation direction at which edges of the carbon nanotubes are oriented.
    Type: Application
    Filed: October 19, 2011
    Publication date: February 9, 2012
    Applicant: International Business Machines Corporation
    Inventors: Kuniaki Sueoka, Yoichi Taira
  • Publication number: 20110198067
    Abstract: [Problem] To reduce thermal resistance between a heating body and a radiating body. [Solving Means] Provided is a sheet having a high thermal conductivity and flexibility, in which graphite layers and elastic layers are stacked alternately, and each of ends of the graphite layer in its surface direction or each of ends of a graphene protrudes from an end of the elastic layer and bends so as to cover at least a part of the end of the elastic layer. By placing a sheet of the present invention in a space (gap) between a heating body and a radiating body, thermal resistance at the gap, especially contact thermal resistance on a joint surface, can be reduced even in the case where flatness of a surface of the heating body or a surface of the radiating body is small.
    Type: Application
    Filed: June 6, 2007
    Publication date: August 18, 2011
    Applicant: International Business Machines Corporation
    Inventors: Sayuri Hada, Kuniaki Sueoka, Yoichi Taira
  • Publication number: 20100278485
    Abstract: An optical coupling structure that interfaces between optical devices mounted on a substrate and optical waveguides formed in the substrate. A manufacturing method includes preparing a wafer formed on an inorganic solid material on a dicing tape and cutting the back surface of the wafer to form substantially angled portions using a dicing blade having a point angle. The dicing tape is stripped from the wafer and the wafer is separated at the valleys between the substantially angled portions to obtain an optical coupling element. The obtained optical coupling element is a three-dimensional polyhedral light-reflecting member having a mirror surface corresponding to a surface of the wafer. The obtained optical coupling element is inserted into a trench that opens, substantially perpendicular to an optical waveguide of an optical transmission substrate, in the main surface of the optical transmission substrate to provide a structure for optical coupling with the outside.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 4, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shigeru Nakagawa, Hidetoshi Numata, Kuniaki Sueoka, Yoichi Taira
  • Patent number: 7514290
    Abstract: This embodiment addresses a novel Chip-to-wafer chip lamination technique that provides low cost and high throughput. In the Chip-to-Chip process, using the temperature rise and utilizing deformation caused by thermal expansion of a metal shim inserted between the inner wall of a cavity, in which multiple chips are laminated and accommodated, multiple chips in the cavity are pressed against a reference surface on a side wall of the cavity to automatically perform positioning.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: April 7, 2009
    Assignee: International Business Machines Corporation
    Inventors: Katsuyuki Sakuma, Paul Stephen Andry, Kuniaki Sueoka, John Ulrich Knickerbocker
  • Patent number: 7510762
    Abstract: Disclosed herein is a composite film comprising a layer of an organic polymer, wherein the organic polymer is an elastomer; the organic polymer having an elastic modulus of less than or equal to about 105 Pascals when measured at room temperature; and a bundle of carbon fibers disposed in the layer of organic polymer; each bundle comprising a column and an end face; each bundle also having a longitudinal axis that is substantially parallel to the column and passes through the center of the column; the end face of the carbon fiber bundle intercalated with nitrate ions and fibrillated so as to have a surface area measured perpendicular to the longitudinal axis that is about 110% to about 250% greater than the surface area of a cross-section of the carbon fiber bundle measured at the column.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: March 31, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kuniaki Sueoka, Yoichi Taira
  • Patent number: 7396494
    Abstract: Disclosed herein is a composite film comprising an organic polymer film; the organic polymer film having an elastic modulus of less than or equal to about 105 gigapascals when measured at room temperature; and a bundle of carbon fibers disposed in the organic polymer film; each bundle comprising a column and an end face; each bundle also having a longitudinal axis that is substantially parallel to the column and passes through the center of the column; the end face being fibrillated so as to have a surface area measured perpendicular to the longitudinal axis that is about 110 to about 250% greater than the surface area of a cross-section of the carbon fiber measured at the column.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: July 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Kuniaki Sueoka, Yoichi Taira
  • Publication number: 20080074847
    Abstract: A thermal interface structure includes a carbon nanotube layer, in which the carbon nanotubes are oriented parallel to the direction of thermal transmission and metal layers provided on two edge surfaces of the carbon nanotube layer, the edge surfaces being perpendicular to the direction of the thermal transmission and located substantially parallel to the orientation direction at which edges of the carbon nanotubes are oriented.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 27, 2008
    Applicant: International Business Machines Corporation
    Inventors: Kuniaki Sueoka, Yoichi Taira