Abstract: A semiconductor memory device includes a first ferromagnetic layer magnetically pinned and positioned within a first region of a substrate; a second ferromagnetic layer approximate the first ferromagnetic layer; and a barrier layer interposed between the first ferromagnetic layer and the first portion of the second ferromagnetic layer. The second ferromagnetic layer includes a first portion being magnetically free and positioned within the first region; a second portion magnetically pinned to a first direction and positioned within a second region of the substrate, the second region contacting the first region from a first side; and a third portion magnetically pinned to a second direction and positioned within a third region of the substrate, the third region contacting the first region from a second side.

Abstract: A semiconductor light-emitting device includes a substrate, a first cladding layer over the substrate, an active region on the first cladding layer, and a second cladding layer on the active region, wherein the active region includes a first type barrier layer that is doped and a second type barrier layer that is undoped, the first type barrier layer being closer to the first cladding layer than the second type barrier layer.

Abstract: A semiconductor light-emitting device includes a substrate, a first cladding layer over the substrate, an active region on the first cladding layer, and a second cladding layer on the active region, wherein the active region includes a first type barrier layer that is doped and a second type barrier layer that is undoped, the first type barrier layer being closer to the first cladding layer than the second type barrier layer.

Abstract: An electronic device and power switching unit thereof includes a shaft, a rotating member and a moving member. The rotating member, connected with the shaft, includes a first tooth portion and a second tooth portion. The moving member includes a rack an arm and a stopper. The rack interlocks with the first tooth portion. The shaft rotates the rotating member in a first direction, allowing the first tooth portion to separate from the rack, and the second tooth portion pushes the arm to rotate in a second direction. When the shaft rotates the rotating member in the second direction, the second tooth portion pushes the arm to rotate in the first direction toward the stopper, and the stopper limits the rotation of the arm, allowing the arm to move in a third direction.

Abstract: A rotatable connection apparatus is disclosed including: a roller coupled to an object to be rotated, wherein the roller rotates with the rotation of the object; a frictional component for contacting a surface of the roller to provide a friction for fixing the object in a first position when the object is rotated to the first position; and an elastic component having a terminal coupled to the frictional component and another terminal coupled to an fixed position, wherein the elastic component is deformed to adjust the friction between the roller and the frictional component when the object is rotated to the first position.

Abstract: A method for electroplated metal annealing process. First, a semiconductor structure is provided, wherein the semiconductor structure has a plurality of semiconductor components, such as a gate electrode, a source region and a drain region, and a field oxide region. Second, a dielectric layer is formed over the semiconductor structure, and a via which exposes a part of the semiconductor structure is formed in the dielectric layer by the use of conventional lithographic and etching processes and an electroplated metal layer is formed over the dielectric layer; meanwhile, the via is filled with the electroplated metal layer. The electroplated metal layer is then annealed by a NH3 plasma process performed by plasma enhanced chemical vapor deposition (PECVD).

Abstract: A method for electroplated metal annealing process. First, a semiconductor structure is provided, wherein the semiconductor structure have a plurality semiconductor components, such as a gate electrode, a source region and a drain region, and a field oxide region. Second, a dielectric layer is formed over the semiconductor structure, and a via which exposes a part of the semiconductor structure is formed in the dielectric layer by the use of the conventional lithographic and etching process, and an electroplated metal layer is formed over the dielectric layer; meanwhile, the via is filled with the electroplated metal layer. The electroplated metal layer then is annealed by a NH3 plasma process performed by plasma enhanced chemical vapor deposition (PECVD).