Abstract: A nonvolatile memory device may include a stair-shaped structure including a first interlayer dielectric layer and a memory cell repeatedly stacked. The nonvolatile memory device may include an etch stop layer and a second interlayer dielectric layer formed over the stair-shaped structure. The nonvolatile memory device may include an isolation layer passing through the stair-shaped structure, the etch stop layer, and the second interlayer dielectric layer. The nonvolatile memory device may include protective layer interposed between the isolation layer and the etch stop layer, and the protective layer interposed between the isolation layer and the second interlayer dielectric layer. The nonvolatile memory device may include contact plugs coupled to each memory cell, respectively, by passing through the second interlayer dielectric layer and the etch stop layer.

Abstract: A method of manufacturing a semiconductor device that can be transferred to a circuit board with improved product reliability, and a semiconductor device manufactured according to the method, are described. A non-limiting example of the manufacturing method includes preparing a wafer having multiple semiconductor die portions formed on the semiconductor wafer, performing a sawing operation to separate the multiple semiconductor die portions into multiple discrete semiconductor die, arranging the multiple discrete semiconductor die on an adhesive member, encapsulating the multiple semiconductor die using an encapsulant, and performing a second sawing operation upon the encapsulated multiple semiconductor die to produce multiple individual encapsulated semiconductor devices.

Abstract: A method of manufacturing a semiconductor device that can be transferred to a circuit board with improved product reliability, and a semiconductor device manufactured according to the method, are described. A non-limiting example of the manufacturing method includes preparing a wafer having multiple semiconductor die portions formed on the semiconductor wafer, performing a sawing operation to separate the multiple semiconductor die portions into multiple discrete semiconductor die, arranging the multiple discrete semiconductor die on an adhesive member, encapsulating the multiple semiconductor die using an encapsulant, and performing a second sawing operation upon the encapsulated multiple semiconductor die to produce multiple individual encapsulated semiconductor devices.

Abstract: Provided are a flooring material and a rotational body used therewith which are adapted to improve quality reliability in flooring materials by stably providing not only a fastening force in the horizontal direction but also a fastening force in the vertical direction when flooring panels are assembled with each other, thereby facilitating assembly of the flooring panels and strengthening the joining force due to assembly.

Abstract: Disclosed is a floorboard to provide simplified assembly of flooring panels without damage and achieve enhanced horizontal coupling force. The floorboard includes a tongue part provided at a first flooring panel and a recessed part provided at a second flooring panel. The tongue part includes a tongue protrusion, a tongue bottom portion, and a raised retaining portion protruding downward from the tongue bottom portion. The recessed part includes an upper lip caught by the tongue protrusion when the tongue part is inserted into the recessed part, a lower lip, a raised portion protruding upward from an end of the lower lip, and a guide wall defining an inner wall of the recessed part and having the same contour as an arc drawn by an end of the tongue protrusion as the tongue part introduced between the upper and lower lips is pivotally rotated.

Abstract: Provided are a flooring material and a rotational body used therewith which are adapted to improve quality reliability in flooring materials by stably providing not only a fastening force in the horizontal direction but also a fastening force in the vertical direction when flooring panels are assembled with each other, thereby facilitating assembly of the flooring panels and strengthening the joining force due to assembly.

Abstract: The present invention is directed to a novel imidazole derivative having an aryl piperidine substituent of formula (I) and a method for preparation thereof, and a pharmaceutical composition containing said imidazole derivative as an active ingredient for preventing or treating a MCH (melanine-concentrating hormone)-related disease.

Abstract: A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is coupled to the second surface of the first semiconductor chip. A second semiconductor chip having first and second surfaces which are substantially flat in nature is further provided. An insulator is coupled to the first surface of the second semiconductor chip for preventing shorting of wirebonds. The second semiconductor chip is coupled to the adhesive layer by the insulator coupled to the first surface thereof.

Abstract: Disclosed is a floorboard to provide simplified assembly of flooring panels without damage and achieve enhanced horizontal coupling force. The floorboard includes a tongue part provided at a first flooring panel and a recessed part provided at a second flooring panel. The tongue part includes a tongue protrusion, a tongue bottom portion, and a raised retaining portion protruding downward from the tongue bottom portion. The recessed part includes an upper lip caught by the tongue protrusion when the tongue part is inserted into the recessed part, a lower lip, a raised portion protruding upward from an end of the lower lip, and a guide wall defining an inner wall of the recessed part and having the same contour as an arc drawn by an end of the tongue protrusion as the tongue part introduced between the upper and lower lips is pivotally rotated.

Abstract: A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is coupled to the second surface of the first semiconductor chip. A second semiconductor chip having first and second surfaces which are substantially flat in nature is further provided. An insulator is coupled to the first surface of the second semiconductor chip for preventing shorting of wirebonds. The second semiconductor chip is coupled to the adhesive layer by the insulator coupled to the first surface thereof.

Abstract: A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is coupled to the second surface of the first semiconductor chip. A second semiconductor chip having first and second surfaces which are substantially flat in nature is further provided. An insulator is coupled to the first surface of the second semiconductor chip for preventing shorting of wirebonds. The second semiconductor chip is coupled to the adhesive layer by the insulator coupled to the first surface thereof.

Abstract: The present invention is directed to a novel imidazole derivative having an aryl piperidine substituent of formula (I) and a method for preparation thereof, and a pharmaceutical composition containing said imidazole derivative as an active ingredient for preventing or treating a MCH (melanine-concentrating hormone)-related disease.

Abstract: A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is coupled to the second surface of the first semiconductor chip. A second semiconductor chip having first and second surfaces which are substantially flat in nature is further provided. An insulator is coupled to the first surface of the second semiconductor chip for preventing shorting of wirebonds. The second semiconductor chip is coupled to the adhesive layer by the insulator coupled to the first surface thereof.

Abstract: The present invention relates to a method of forming isolation layers of a semiconductor device. According to a method of forming isolation layers of a semiconductor device in accordance with an aspect of the present invention, a tunnel insulating layer, a charge trap layer, and a hard mask layer are sequentially formed over a semiconductor substrate. First trenches are formed by etching the hard mask layer, the charge trap layer, the tunnel insulating layer, and the semiconductor substrate. A spacer layer is formed on the entire surface including the first trenches. Second trenches are formed by etching the spacer layer, which is formed at a bottom of the first trenches, and the semiconductor substrate. An insulating layer for isolation is formed on the entire surface including the second trenches.

Abstract: Disclosed is a stacking structure of semiconductor chips and semiconductor package using it, capable of achieving an electric insulation even if a conductive wire makes contact with a lower surface of an upper semiconductor chip, while reducing a total thickness thereof and preventing damage.

Abstract: A stackable semiconductor package is disclosed that includes a semiconductor die coupled to a metal leadframe. The semiconductor die is coupled to a die pad and is electrically coupled to leads of the leadframe. The semiconductor die, the die pad, and an inner lead portion of each of the leads is embedded in an encapsulant, and an outer lead portion of each of the leads is free of the encapsulant. A surface of the die pad and of the inner lead portion of each of the leads is exposed in a plane with an exterior first surface of the encapsulant. The outer lead portion is vertically such that a mounting surface of the outer lead portion is provided below an opposite second surface of the encapsulant. Other semiconductor packages or electronic devices may be stacked on and electrically coupled to the exposed surface of the inner lead portions.

Abstract: A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is coupled to the second surface of the first semiconductor chip. A second semiconductor chip having first and second surfaces which are substantially flat in nature is further provided. An insulator is coupled to the first surface of the second semiconductor chip for preventing shorting of wirebonds. The second semiconductor chip is coupled to the adhesive layer by the insulator coupled to the first surface thereof.