Abstract: A device to selectively activate memory chips includes a memory unit including n memory chips activated in response to n memory chip activation signals (n is a natural number), a controller to generate m control signals (m is a natural number), and a memory chip activation signal generator to combine m chip enable (CE) signals to generate the n memory chip activation signals.

Abstract: A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link.

Abstract: A probe card to connect a semiconductor device to test equipment includes a Printed Circuit Board (PCB) in which an electrical wiring pattern is formed, a first connector fixed on an upper surface of the PCB to connect the test equipment to the PCB, probe needles connected to electrode pads of the semiconductor device, and a Flexible PCB (FPCB) to connect the PCB to the probe needles. Accordingly, a signal transmission characteristic can be enhanced, test expenses can be reduced, and ground noise can be reduced.

Abstract: A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.

Abstract: A transmission system and method may be provided. The transmission system may transmit 2-bit data for each transmission line set and each transmission line set may include first, second and/or third transmission lines arranged in order. The first, second and/or third transmission lines may respectively transmit first, second and/or third signals each having one of first, second and/or third values such that a combination of a first electric field between the first and second transmission lines and a second electric field between the second and third transmission lines may be made depending on a logic state of the 2-bit data. The transmission system may transmit differential signals using a smaller number of transmission lines and the transmission system may transmit a larger number of signals in the same circuit area.

Abstract: A printed circuit board and a method of manufacturing a printed circuit board are disclosed. Using a method of manufacturing a printed circuit board, which includes: forming a multilayer board by alternately stacking circuit pattern layers and insulation layers such that a predetermined thickness of a partial area has only insulation layers stacked therein; and removing insulation layers from the partial area of the multilayer board, a printed circuit board can be manufactured that is suitable for a slim module.

Abstract: A signal transmission circuit and method thereof are provided. The signal transmission circuit may include a plurality of signal transmission lines, each of the plurality of signal transmission lines configured to transfer data via signal currents and a reference transmission plane configured to transfer return currents corresponding to the signal currents, the reference transmission plane separated from each of the plurality of signal transmission lines by an insulating layer, the reference transmission plane including at least one separation slot.

Abstract: The present invention relates to an embedded printed circuit board and a manufacturing method thereof. The present invention provides an embedded printed circuit board including a substrate in which a cavity is formed in a predetermined portion and a wiring layer is formed in a portion without the cavity; a chip inserted into the cavity and including a plurality of pads; a filler filled between the chip and the cavity to fix the chip; and a connection layer formed between the wiring layer and the pads to connect the wiring layer and the pads to each other. Further, the present invention provides a manufacturing method of the embedded printed circuit board.

Abstract: A substrate includes a power plane and a ground plane that are placed apart from and are substantially parallel to each other, and at least one signal line that is placed between the power plane and the ground plane. The ground plane includes a first conductive layer having a first conductivity. The power plane includes a second conductive layer having the first conductivity, and the power plane or the ground plane includes a third conductive layer having a second conductivity lower than the first conductivity. The third conductive layer faces the at least one signal line across a dielectric substance.

Abstract: A memory system is disclosed with first, second, and third connectors located on a system board, the third connector including pins connected to the pins of the first and second connectors through channels, and a memory controller connected to the pins of the third connector through channels. The memory system, as configured in a first memory capacity, comprises; dummy memory modules and a first memory module connected to the memory controller by installing the dummy memory modules in the first and second connectors and installing the first memory module in the third connector. The memory system, as alternately configured in a second memory capacity larger than the first memory capacity, comprises second memory modules connected to the memory controller by installing the second memory modules in only the first and second connectors.

Abstract: Provided is a memory system with an inductor. In the memory system, the inductor is connected to an on-die termination unit of a memory chip, thereby realizing constant gain characteristics without respect to a variation in an operating frequency. The inductor of the on-die termination unit may be embodied by connecting a wire bonding, a package line pattern, a PCB line pattern, a wire line, and/or an inductor device to pads of the memory chip.

Abstract: A printed circuit board (PCB) includes a substrate having a first group of at least two via holes and a second group of at least two via holes formed therein, a first pad set of terminal pads and a second pad set of terminal pads formed on the substrate, and a first group of conductive connection members and a second group of conductive connection members formed in the substrate. The first group of the via holes are surrounded by the first pad set of the terminal pads and the second group of the via holes are surrounded by the second pad set of the terminal pads. The first and the second groups of conductive connection members fill up the first and second groups of the via holes. The first group of the conductive connection members are connected to the first pad set of the terminal pads and the second group of the conductive connection members are connected to the second pad set of the terminal pads.

Abstract: A printed circuit board and a method of manufacturing a printed circuit board are disclosed. Using a method of manufacturing a printed circuit board, which includes: forming a multilayer board by alternately stacking circuit pattern layers and insulation layers such that a predetermined thickness of a partial area has only insulation layers stacked therein; and removing insulation layers from the partial area of the multilayer board, a printed circuit board can be manufactured that is suitable for a slim module.

Abstract: A printed circuit board, a method of manufacturing the printed circuit board, and an apparatus for perforating via holes. By use of a method of manufacturing a printed circuit board that includes forming a first circuit pattern, which includes a reference mark and a via land, on one surface of an insulation substrate; stacking a metal layer on the insulation layer; opening a first window in the metal layer in correspondence with the reference mark; and forming a via which electrically connects the via land with the metal layer, by irradiating light towards the other surface of the insulation substrate and identifying the reference mark through the first window, the occurrence of short-circuiting is prevented in forming vias for electrical interconnection between circuit patterns in a printed circuit board, and as the defect rate caused by eccentricity between insulation layers may be reduced, aspects of the invention may contribute to reducing costs.

Abstract: A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link.

Abstract: A memory module includes: one or more semiconductor memory devices; a plurality of module tabs configured to transmit and receive signals between the one or more semiconductor memory devices and external devices; a data bus configured to transfer signals between data input/output pins of the one or more semiconductor memory devices and the plurality of module tabs; and impedance-matching capacitive elements, each coupled between a line of the data bus and a reference voltage. Accordingly, the memory module and a memory system employing such a module can achieve improved impedance matching, thereby also improving signal integrity.

Abstract: A probe card to connect a semiconductor device to test equipment includes a Printed Circuit Board (PCB) in which an electrical wiring pattern is formed, a first connector fixed on an upper surface of the PCB to connect the test equipment to the PCB, probe needles connected to electrode pads of the semiconductor device, and a Flexible PCB (FPCB) to connect the PCB to the probe needles. Accordingly, a signal transmission characteristic can be enhanced, test expenses can be reduced, and ground noise can be reduced.

Abstract: A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link.

Abstract: A signal transmission circuit and method thereof are provided. The signal transmission circuit may include a plurality of signal transmission lines, each of the plurality of signal transmission lines configured to transfer data via signal currents and a reference transmission plane configured to transfer return currents corresponding to the signal currents, the reference transmission plane separated from each of the plurality of signal transmission lines by an insulating layer, the reference transmission plane including at least one separation slot.

Abstract: Data transmission system and method are provided. The transmission system includes a data converter and data restoring unit. The data converter converts N-bit first data to be transmitted into M-bit second data, where M is greater than N and the second data is arranged in a minimum unit greater than 1, each minimum unit including at least successive data bits having the same phase. The transmitter compresses the second data prior to transmission via a channel having performance characteristics defining a minimum pulse width, and a receiver receives and de-compresses the transmitted second data. The data restoring unit then restores the first data from the second.