Abstract: A method and a graphics processing apparatus for processing texture in a graphics pipeline determine a rendering level of a dynamic texture based on usage information of a target object and render the target object by texturing the target object with the dynamic texture rendered based on the rendering level. The graphics processing apparatus includes at least one cache memory, and at least one processor configured to: perform geometry processing of a dynamic texture to be mapped onto a target object, determine a rendering level of the dynamic texture based on usage information of the target object obtained by the geometry processing of the target object, render the dynamic texture based on the determined rendering level, and render the target object by texturing the target object with the rendered dynamic texture.

Abstract: An image processing method includes: determining whether a draw command that is identical to a previous draw command is input; obtaining information about a transparency of a previous frame that is performed with the previous draw command; and performing image processing on a current frame based on the information about the transparency.

Abstract: An external intrinsic interface. A processor may include a core including a plurality of functional units, an intrinsic module located outside the core, and an interface module to perform relaying between the intrinsic module and a functional unit, among the plurality of functional units.

Abstract: A method and a graphics processing apparatus for processing texture in a graphics pipeline determine a rendering level of a dynamic texture based on usage information of a target object and render the target object by texturing the target object with the dynamic texture rendered based on the rendering level. The graphics processing apparatus includes at least one cache memory, and at least one processor configured to: perform geometry processing of a dynamic texture to be mapped onto a target object, determine a rendering level of the dynamic texture based on usage information of the target object obtained by the geometry processing of the target object, render the dynamic texture based on the determined rendering level, and render the target object by texturing the target object with the rendered dynamic texture.

Abstract: A method of performing tile-based rendering in a graphics processing apparatus may include: generating a bitstream representing a tile binning result by performing tile binning with initial tiles having initial sizes. A determining as to whether a primitive belonging to an initial tile additionally belongs to other initial tiles bordering the initial tile is made by using the generated bitstream. A determining of a rendering tile is made, in which the rendering tile has a dynamic size and is formed by at least one of the initial tiles that the primitive belongs to, based on a result of the determining of whether the primitive additionally belongs to the other initial tiles. Rendering is performed on the primitive included in the determined rendering tile by using the determined rendering tile.

Abstract: Provided are an image data processing method and apparatus for determining operations to be performed according to components to display a current pixel, determining pixel values according to the determined operations, and displaying the current pixel.

Abstract: A graphics processing apparatus and a method of executing instructions are disclosed where the method of executing an instruction includes receiving instructions, generating an output mask denoting a component that is output as a result of rendering, determining a common component included in an instruction mask and the output mask, and executing an instruction including the common component from among the instructions, wherein the instruction mask denotes a component that is affected by each of the instructions.

Abstract: A data processing method includes determining a variation of each of a plurality of channels corresponding to a plurality of pixels included in an image; determining a number of bits to assign to each of the plurality of channels based on the determined variation of each of the plurality of channels; assigning the determined numbers of bits to each of the plurality of channels; and compressing the plurality of channels based on the numbers of bits assigned to the plurality of channels, respectively.

Abstract: A cache memory system includes a cache memory, which stores cache data corresponding to portions of main data stored in a main memory and priority data respectively corresponding to the cache data; a table storage unit, which stores a priority table including information regarding access frequencies with respect to the main data; and a controller, which, when at least one from among the main data is requested, determines whether cache data corresponding to the request is stored in the cache memory, deletes one from among the cache data based on the priority data, and updates the cache data set with new data, wherein the priority data is determined based on the information regarding access frequencies.

Abstract: A rendering method includes determining, at a geometry processor, if a previous draw command from among previous draw commands is identical to a current draw command; in response to the previous draw command being identical to the current draw command, selecting a primitive list indicating a result of geometry processing performed on the previous draw command; and performing pixel processing using the primitive list.

Abstract: A method and apparatus for rendering graphics data are provided. The graphics data rendering method includes calculating a number of overlapping objects by tile in a first frame. The graphics data rendering method determines a tile size of a second frame based on the calculated number of the overlapping objects, divides the second frame based on the determined tile size, and renders the second frame by divided tile.

Abstract: A non-blocking texture cache memory for a texture mapping pipeline and an operation method of the non-blocking texture cache memory may include: a retry buffer configured to temporarily store result data according to a hit pipeline or a miss pipeline; a retry buffer lookup unit configured to look up the retry buffer in response to a texture request transferred from a processor; a verification unit configured to verify whether result data corresponding to the texture request is stored in the retry buffer as the lookup result; and an output control unit configured to output the stored result data to the processor when the result data corresponding to the texture request is stored as the verification result.

Abstract: An image processing method includes: determining whether a draw command that is identical to a previous draw command is input; obtaining information about a transparency of a previous frame that is performed with the previous draw command; and performing image processing on a current frame based on the information about the transparency.

Abstract: A device for processing image data is disclosed. The device may determine a dominant texture with respect to each of a plurality of regions constituting an image. The device may group in a same group, from among the plurality of regions, regions in which the determined dominant texture is the same, and process allocated image data according to a result of grouping.

Abstract: An image processing method includes: determining whether a draw command that is identical to a previous draw command is input; obtaining information about a transparency of a previous frame that is performed with the previous draw command; and performing image processing on a current frame based on the information about the transparency.

Abstract: An external intrinsic interface. A processor may include a core including a plurality of functional units, an intrinsic module located outside the core, and an interface module to perform relaying between the intrinsic module and a functional unit, among the plurality of functional units.

Abstract: An external intrinsic interface. A processor may include a core including a plurality of functional units, an intrinsic module located outside the core, and an interface module to perform relaying between the intrinsic module and a functional unit, among the plurality of functional units.

Abstract: Provided is a rendering method and apparatuses for rendering image data. The rendering method includes generating a primitive list by performing geometry processing on a current tile to be rendered; determining whether the current tile is identical to a previous tile from among tiles included in a previously rendered frame; and in response to the previous tile being identical to the current tile, generating an image of the current tile by re-using an image of the previous tile.

Abstract: An apparatus and method for non-blocking execution of a static scheduled processor, the apparatus including a processor to process at least one operation using transferred input data, and an input buffer used to transfer the input data to the processor, and store a result of processing the at least one operation, wherein the processor may include at least one functional unit (FU) to execute the at least one operation, and the at least one FU may process the transferred input data using at least one of a regular latency operation and an irregular latency operation.

Abstract: A processor for processing stream data at a high speed is provided. The processor may include a functional unit to perform an operation on the stream data, an input interface module to perform relaying between the functional unit and an external data producer module that is used to input the stream data to the processor, and an output interface module to perform relaying between the functional unit and an external data consumer module that is used to receive an input of result data regarding a result of the operation performed by the functional unit.