Abstract: A processor for processing stream data at a high speed is provided. The processor may include a functional unit to perform an operation on the stream data, an input interface module to perform relaying between the functional unit and an external data producer module that is used to input the stream data to the processor, and an output interface module to perform relaying between the functional unit and an external data consumer module that is used to receive an input of result data regarding a result of the operation performed by the functional unit.

Abstract: A method and apparatus for processing a texture are provided. The method of processing the texture includes acquiring a texture address corresponding to a pixel address and frequency information of the texture, determining a number of texels to be used for texture filtering according to the frequency information of the texture, reading texel values corresponding to the determined number of texels based on the texture address, and performing the texture filtering by using the read texel values.

Abstract: A bus arbitration apparatus and method are provided. A plurality of masters may be classified into master types based on master characteristics, and bus arbitration may be performed. Thus, it is possible to prevent a bus from being distributed to a predetermined master, and it is possible to improve overall performance of a bus system by solving a problem of unbalanced distribution of performance between the plurality of masters.

Abstract: A method and apparatus for rendering graphics data are provided. The graphics data rendering method includes calculating a number of overlapping objects by tile in a first frame. The graphics data rendering method determines a tile size of a second frame based on the calculated number of the overlapping objects, divides the second frame based on the determined tile size, and renders the second frame by divided tile.

Abstract: Methods and apparatuses of rendering graphics data are disclosed to reduce the amount of computation to be performed in rendering the graphics data. The method of rendering graphics data includes extracting, at an extractor for rendering graphics data, an object existing at a first frame and a second frame on the basis of attribute information of the object in the first frame and attribute information the object in the second frame, comparing first viewpoint information of the object in the first frame with second viewpoint information of the object in the second frame, and acquiring geometric data of the object in a second viewpoint on the basis of geometric data of the object in a first viewpoint and the viewpoint comparison information.

Abstract: Provided is a method and apparatus for processing a current command by using previous command information. The rendering method includes receiving first data corresponding to a current command that is to be rendered, determining whether to reuse a second data corresponding to a previous command that has already been processed by comparing the first data with the second data, and processing the current command, at a renderer, based on a result of the determination.

Abstract: Disclosed are a reconfigurable processor and processing method, a reconfiguration control apparatus and method, and a thread modeler and modeling method. A memory area of a reconfigurable processor may be divided into a plurality of areas, and a context enabling a thread process may be stored in respective divided areas, in advance. Accordingly, when a context switching is performed from one thread to another thread, the other thread may be executed by using information stored in an area corresponding to the other thread.

Abstract: A rendering apparatus and method are provided. The rendering method includes: reading a block, corresponding to a fragment, from among compressed blocks stored in a depth buffer, by considering frequency information corresponding to the fragment and prepared in advance; and performing a depth test for the fragment by considering the restored block.

Abstract: Provided is a method of rendering an object. The method includes rendering extracting transparency information, at a object rendering apparatus, from a plurality of fragments, which comprise information representing at least one object in a frame, comparing depth information of at least one fragment, from among the plurality of fragments, located at a position of the frame, and determining a rendering of at least one fragment that is located in the position based on the comparison of the depth information and the transparency information.

Abstract: Provided are graphics data rendering methods. The method includes obtaining, at a graphics data renderer, first space information of at least one object corresponding to graphics data of a first frame, determining a sampling mode of the first frame, based on the graphics data, and rendering graphics data of a second frame based on the first space information and the sampling mode of the first frame. Thus, memory space and time that are used for rendering graphics data may be reduced.

Abstract: An image processing method includes: determining whether a draw command that is identical to a previous draw command is input; obtaining information about a transparency of a previous frame that is performed with the previous draw command; and performing image processing on a current frame based on the information about the transparency.

Abstract: Provided is a rendering method and apparatuses for rendering image data. The rendering method includes generating a primitive list by performing geometry processing on a current tile to be rendered; determining whether the current tile is identical to a previous tile from among tiles included in a previously rendered frame; and in response to the previous tile being identical to the current tile, generating an image of the current tile by re-using an image of the previous tile.

Abstract: A cache memory system includes a cache memory, which stores cache data corresponding to portions of main data stored in a main memory and priority data respectively corresponding to the cache data; a table storage unit, which stores a priority table including information regarding access frequencies with respect to the main data; and a controller, which, when at least one from among the main data is requested, determines whether cache data corresponding to the request is stored in the cache memory, deletes one from among the cache data based on the priority data, and updates the cache data set with new data, wherein the priority data is determined based on the information regarding access frequencies.

Abstract: A rendering method includes determining, at a geometry processor, if a previous draw command from among previous draw commands is identical to a current draw command; in response to the previous draw command being identical to the current draw command, selecting a primitive list indicating a result of geometry processing performed on the previous draw command; and performing pixel processing using the primitive list.

Abstract: A processor and an operating method are described. By diversifying an L1 memory being accessed, based on an execution mode of the processor, an operating performance of the processor may be enhanced. By disposing a local/stack section in a system dynamic random access memory (DRAM) located external to the processor, a size of a scratch pad memory may be reduced without deteriorating a performance. While a core of the processor is performing in a very long instruction word (VLIW) mode, the core may data-access a cache memory and thus, a bottleneck may not occur with respect to the scratch pad memory even though a memory access occurs with respect to the scratch pad memory by an external component.

Abstract: A method and apparatus for controlling a fragment that controls processing of a fragment during a graphic rendering process. The method of controlling the fragment includes determining whether to process a second fragment, based on flag data representing a processing state of a first fragment, and updating the flag data based on a processing state of at least one of the first fragment and the second fragment, wherein the first fragment and the second fragment refer to fragments representing an identical spatial location among fragments included in differing primitives in a frame.

Abstract: An apparatus and method for non-blocking execution of a static scheduled processor, the apparatus including a processor to process at least one operation using transferred input data, and an input buffer used to transfer the input data to the processor, and store a result of processing the at least one operation, wherein the processor may include at least one functional unit (FU) to execute the at least one operation, and the at least one FU may process the transferred input data using at least one of a regular latency operation and an irregular latency operation.

Abstract: A non-blocking texture cache memory for a texture mapping pipeline and an operation method of the non-blocking texture cache memory may include: a retry buffer configured to temporarily store result data according to a hit pipeline or a miss pipeline; a retry buffer lookup unit configured to look up the retry buffer in response to a texture request transferred from a processor; a verification unit configured to verify whether result data corresponding to the texture request is stored in the retry buffer as the lookup result; and an output control unit configured to output the stored result data to the processor when the result data corresponding to the texture request is stored as the verification result.

Abstract: An apparatus and method of reading texture data for texture mapping. Each of a plurality of blocks included in a cache memory may have any one of an even numbered index or odd numbered index. In this instance, the cache memory may be embodied with an odd numbered index cache memory including odd numbered index blocks and an even numbered index cache memory including even numbered index blocks. Also, address indexes of requested texture data may be analyzed to appropriately access to at least one of the odd numbered index cache memory and even numbered index cache memory, thereby improving an accessing speed.

Abstract: A tile based rendering apparatus and method is provided. The rendering method may be used to graphically represent a three dimensional (3D) model on a two dimensional (2D) display screen. Also, the rendering method may perform pre-binning with respect to objects included in a frame, and thus all geometry processing results may not be stored in an external memory and use of the external memory may be reduced.