Abstract: A touch display device includes light emitting devices disposed on a substrate, an encapsulation unit disposed on the light emitting devices, a touch buffer film disposed on the encapsulation unit, second bridge electrodes disposed on the touch buffer film, a black matrix disposed on the touch buffer film and including openings, color filters that fill the openings, and a cover layer disposed on the color filters and the black matrix.

Abstract: An electronic device includes a controller and a semiconductor device. The controller outputs a clock signal and a command signal having a first setting combination or a second setting combination and receives a temperature information signal. The semiconductor device compares an input time of a latch signal generated based on the command signal having the first setting combination with an input time of a temperature output control signal generated internally. In addition, the semiconductor device updates a temperature code according a comparison result of the input times of the temperature output control signal and the latch signal to generate the temperature information signal.

Abstract: A touch display device includes light emitting devices disposed on a substrate, an encapsulation unit disposed on the light emitting devices, a touch buffer film disposed on the encapsulation unit, second bridge electrodes disposed on the touch buffer film, a black matrix disposed on the touch buffer film and including openings, color filters that fill the openings, and a cover layer disposed on the color filters and the black matrix.

Abstract: An electronic device includes a controller and a semiconductor device. The controller outputs a clock signal and a command signal having a first setting combination or a second setting combination and receives a temperature information signal. The semiconductor device compares an input time of a latch signal generated based on the command signal having the first setting combination with an input time of a temperature output control signal generated internally. In addition, the semiconductor device updates a temperature code according a comparison result of the input times of the temperature output control signal and the latch signal to generate the temperature information signal.

Abstract: An apparatus and method for verifying broadcast content object identification based on web data. The apparatus includes: a web data processor configured to collect and process web data related to broadcast content and create content knowledge information by tagging the web data to the broadcast content; a content knowledge information storage portion configured to store the content knowledge information; and an object identification verifier configured to verify a result of identifying an object contained in the broadcast content, using the content knowledge information.

Abstract: A semiconductor memory may include: a storage unit suitable for storing a minimum operation interval between row command operations, a detection unit suitable for detecting whether row command signals inputted for the row command operations are activated at the minimum operation interval, a latching unit suitable for generating flag signals by latching the row command signals, and a shifting unit suitable for shifting the flag signals based on the minimum operation interval in response to an output signal of the detection unit, and generating an internal row command signals.

Abstract: A semiconductor device may include: a command decoder configured to decode a clock signal, a chip selection signal, and a command address, and output an active write signal, an active read signal, and a precharge signal indicating a write operation or a read operation after completion of an active operation; a row controller configured to output a bank active signal for controlling an active operation of a bank in response to the active write signal, the active read signal, and the precharge signal, and output an active write flag signal or an active read flag signal for performing the write operation or the read operation; and a column controller configured to output a control signal for controlling a column active operation to the bank in response to the active write flag signal, the active read flag signal, a write command signal, a read command signal, and the precharge signal.

Abstract: Provided is a system for conducting the fast inspection of Android malwares, the system including a processor configured to compute the similarity between the signature for a given target application and one of signatures stored in a database, and a determiner configured to determine whether the target application is a malware based on the computed similarity, wherein the system relates to the technology for examining whether a certain Android application, which can be downloaded via a uniform resource locator (URL), is malicious by examining how similar the application is with the malwares and normal applications verified earlier.

Abstract: A driving circuit includes a write operation controller configured to generate a write control signal according to a write command and a column address; a row controller configured to generate an auto refresh flag according to an auto refresh command and a row address; and a sense amplifier controller configured to enable the write control signal or the auto refresh flag according to a temperature flag, and generate an overdriving signal according to the enabled write control signal or the enabled auto refresh flag.

Abstract: Provided is an object detecting method and apparatus, the apparatus configured to extract a frame image and a motion vector from a video, generate an integrated feature vector based on the frame image and the motion vector, and detect an object included in the video based on the integrated feature vector.

Abstract: A driving circuit includes a write operation controller configured to generate a write control signal according to a write command and a column address; a row controller configured to generate an auto refresh flag according to an auto refresh command and a row address; and a sense amplifier controller configured to enable the write control signal or the auto refresh flag according to a temperature flag, and generate an overdriving signal according to the enabled write control signal or the enabled auto refresh flag.

Abstract: A semiconductor memory may include: a storage unit suitable for storing a minimum operation interval between row command operations, a detection unit suitable for detecting whether row command signals inputted for the row command operations are activated at the minimum operation interval, a latching unit suitable for generating flag signals by latching the row command signals, and a shifting unit suitable for shifting the flag signals based on the minimum operation interval in response to an output signal of the detection unit, and generating an internal row command signals.

Abstract: An apparatus and method for verifying broadcast content object identification based on web data. The apparatus includes: a web data processor configured to collect and process web data related to broadcast content and create content knowledge information by tagging the web data to the broadcast content; a content knowledge information storage portion configured to store the content knowledge information; and an object identification verifier configured to verify a result of identifying an object contained in the broadcast content, using the content knowledge information.

Abstract: The present invention provides a malicious application detecting apparatus based on a visualization similarity, including: a first storing unit which classifies malicious applications for every group in accordance with characteristics and stores the malicious applications; a second storing unit which stores a target application; an image generating unit which analyzes the malicious applications to generate first visualization images and analyzes the target application to generate a second visualization image; a representative image selecting unit which selects representative images for every group using a similarity of the first visualization images; and a determining unit which compares the representative images with the second visualization image to determine whether the target application is a malicious application.

Abstract: The semiconductor integrated circuit includes a command decoder, a shift register unit and a command address latch unit. The command decoder is responsive to an external command defining write and read modes and configured to provide a write command or a read command according to the external command using a rising or falling clock. The shift register unit is configured to shift an external address and the write command by a write latency in response to the write command. The column address latch unit is configured to latch and provide the external address as a column address in the read mode, and to latch a write address, which is provided from the shift register unit, and provide the write address as the column address in the write mode.

Abstract: A semiconductor memory may include: a storage unit suitable for storing a minimum operation interval between row command operations, a detection unit suitable for detecting whether row command signals inputted for the row command operations are activated at the minimum operation interval, a latching unit suitable for generating flag signals by latching the row command signals, and a shifting unit suitable for shifting the flag signals based on the minimum operation interval in response to an output signal of the detection unit, and generating an internal row command signals.

Abstract: A semiconductor memory may include: a storage unit suitable for storing a minimum operation interval between row command operations, a detection unit suitable for detecting whether row command signals inputted for the row command operations are activated at the minimum operation interval, a latching unit suitable for generating flag signals by latching the row command signals, and a shifting unit suitable for shifting the flag signals based on the minimum operation interval in response to an output signal of the detection unit, and generating an internal row command signals.

Abstract: The semiconductor integrated circuit includes a command decoder, a shift register unit and a command address latch unit. The command decoder is responsive to an external command defining write and read modes and configured to provide a write command or a read command according to the external command using a rising or falling clock. The shift register unit is configured to shift an external address and the write command by a write latency in response to the write command. The column address latch unit is configured to latch and provide the external address as a column address in the read mode, and to latch a write address, which is provided from the shift register unit, and provide the write address as the column address in the write mode.

Abstract: A semiconductor device includes a command combination circuit suitable for generating a combined level signal driven in synchronization with a write command and an internal write command; and a column selection circuit suitable for generating a pulse signal which includes a pulse generated at a level transition time of the combined level signal, and a column select signal.

Abstract: A parallel tree labeling apparatus and method for processing an eXtensible Markup Language document (XML). The parallel tree labeling apparatus for processing an XML document includes a data distributor configured to divide the XML document into a plurality of data blocks; and a labeling component configured to receive elements of each of the plurality of data blocks, perform a labeling procedure on the plurality of data blocks in parallel, and generate a final label by combining partial labels.