Patents by Inventor Kyoung-ho Ha

Kyoung-ho Ha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130346678
    Abstract: A memory expanding device includes an input and output part coupleable to an external optical interface, a controller coupled to the input and output part through a first internal optical interface, a main memory module coupled to the controller through a second internal optical interface, and a sub-memory module coupled to the controller through a first internal electrical interface.
    Type: Application
    Filed: March 14, 2013
    Publication date: December 26, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ein-Sung JO, Sei-Jin KIM, Ha-Ryong YOON, Kyoung-Ho HA
  • Publication number: 20130343696
    Abstract: An optical integrated circuit may include a substrate including a single crystalline semiconductor material, a passive element extending in a <100> crystal orientation of the substrate and including the single crystalline semiconductor material, and an active element extending in a <110> crystal orientation of the substrate and including the single crystalline semiconductor material.
    Type: Application
    Filed: March 14, 2013
    Publication date: December 26, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seong-Gu KIM, Dong-Jae SHIN, Yong-Hwack SHIN, Young CHOI, Kyoung-Ho HA
  • Publication number: 20130330035
    Abstract: A semiconductor package and a semiconductor device including the same.
    Type: Application
    Filed: March 7, 2013
    Publication date: December 12, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong-Jae Shin, Hyun-il Byun, Kwang-hyun Lee, Kwan-sik Cho, Ho-chul Ji, Jung-hyung Pyo, Kyoung-ho Ha
  • Patent number: 8593826
    Abstract: Provided is a memory module, a system using the memory module, and a method of fabricating the memory module. The memory module may include a printed circuit board and a memory package on the printed circuit board. The printed circuit board may include an embedded optical waveguide and a first optical window extending from the optical waveguide to a first surface of the printed circuit board. The memory package may also include a memory die having an optical input/output section and a second optical window. The optical input/output section, the second optical window, and the first optical window may be arranged in a line and the first optical window and the second optical window may be configured to at least one of transmit an optical signal from the optical waveguide to the optical input/output section and transmit an optical signal from the optical input/output section to the optical waveguide.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In Sung Joe, Yoon Dong Park, Kyoung Won Na, Sung Dong Suh, Kyoung Ho Ha, Seong Gu Kim, Dong Jae Shin, Ho-Chul Ji
  • Publication number: 20130308942
    Abstract: An optical memory system according to example embodiments includes a plurality of memory modules, each memory module including a plurality of memory devices; a light source; a light distribution unit connected to the light source through a first optical transmission line; a plurality of second optical transmission lines connected between the light distribution unit and the plurality of memory modules; a plurality of electrical to optical converters, each connected to at least one of the second optical transmission lines; and a plurality of output optical transmission lines connected to the plurality of electrical to optical converters, each output optical transmission line for outputting an electrical to optical converted signal.
    Type: Application
    Filed: November 21, 2012
    Publication date: November 21, 2013
    Inventors: Ho-Chul JI, Kyoung-Ho HA
  • Publication number: 20130279916
    Abstract: Embodiments disclose a server system including a first circuit board which includes a first socket connected to a memory controller via an electrical channel; and a second circuit board which is combined with the first socket such that signals are exchanged with the memory controller via at least one of the electrical channel and an optical channel. The optical channel is combined with the electrical channel via an electrical-to-optical conversion device, the electrical-to-optical conversion device converts an electrical signal into an optical signal or converts an optical signal into an electrical signal.
    Type: Application
    Filed: February 14, 2013
    Publication date: October 24, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-hyeon CHO, You-keun HAN, Seung-jin SEO, Jung-joon LEE, Kyoung-ho HA
  • Publication number: 20130064496
    Abstract: An optical link may include a main optical waveguide; N sub-optical waveguides, where N is a natural number; N mode couplers, each configured to perform a mode coupling operation between the main optical waveguide and a respective one of the N sub-optical waveguide; and an optical wavelength filter connected to an output terminal of the main optical waveguide and an output terminal of each of the N sub-optical waveguides. A memory system may include a memory device, a memory controller, and the optical link. A data processing system may include the memory system and a central processing unit connected to the memory system through a bus.
    Type: Application
    Filed: July 16, 2012
    Publication date: March 14, 2013
    Inventors: Sung Dong Suh, In Sung Joe, Seong Gu Kim, Kyoung Won Na, Kyoung Ho Ha, Yong Hwack Shin
  • Patent number: 8379470
    Abstract: A semiconductor memory system includes a controller and a memory device that are optical-interconnected. The controller includes a control logic configured to generate a control signal for controlling the memory device and a transmitter configured to convert the control signal into an optical signal, and output the optical signal. The memory device includes a receiving unit filter configured to convert the optical signal into an electric signal, and the electric signal based on a supply voltage corresponding to a period of the optical signal or the electric signal.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: February 19, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-dong Suh, Kyoung-ho Ha, Seong-gu Kim, Soo-haeng Cho, In-sung Joe
  • Publication number: 20130015546
    Abstract: An integrated circuit device includes a plurality of device layers disposed on a substrate. A first one of the device layers includes at least one photo device and/or at least one electronic device and a second one of the device layers includes at least one photo device overlying the at least one photo device and/or the at least one electronic device of the first one of the device layers.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 17, 2013
    Inventors: In-sung Joe, Sung-dong Suh, Kyoung-won Na, Kyoung-ho Ha, Seong-gu Kim, Young-hwack Shin
  • Publication number: 20120249740
    Abstract: A three-dimensional image sensor may include a light source module configured to emit at least one light to an object, a sensing circuit configured to polarize a received light that represents the at least one light reflected from the object and configured to convert the polarized light to electrical signals, and a control unit configured to control the light source module and sensing circuit. A camera may include a receiving lens; a sensor module configured to generate depth data, the depth data including depth information of objects based on a received light from the objects; an engine unit configured to generate a depth map of the objects based on the depth data, configured to segment the objects in the depth map, and configured to generate a control signal for controlling the receiving lens based on the segmented objects; and a motor unit configured to control focusing of the receiving lens.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 4, 2012
    Inventors: Tae-Yon LEE, Joon-Ho LEE, Yoon-Dong PARK, Kyoung-Ho HA, Yong-Jei LEE, Kwang-Hyuk BAE, Kyu-Min KYUNG, Tae-Chan KIM
  • Publication number: 20120155888
    Abstract: An optical modulator includes a light input/output unit receiving an incident optical signal which has not been modulated, splitting the incident optical signal into a first optical signal and a second optical signal, and transmitting the first and second optical signals to a first path and a second path, respectively, of an optical waveguide. A phase shifter is positioned in at least one of the first and second paths and modulates a phase of at least one of the first and second optical signals, which have been received through the first and second paths, respectively, in response to an electrical signal. A phase-modulated signal is output. A reflective grating coupler reflects signals respectively received through the first and second paths back along the first and second paths respectively.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 21, 2012
    Inventors: Ho-Chul Ji, Kyoung Ho Ha, Dong Jae Shin, Jung Hyung Pyo, Kwang Hyun Lee
  • Publication number: 20120099813
    Abstract: A phase shifter includes an optical waveguide, a plurality of impurity regions and a plurality of electrodes. The optical waveguide receives an optical input signal and outputs an optical output signal. The impurity regions include respective charge carriers. The impurity regions are disposed in contact with the optical waveguide at respective contact surface, where at least one of the contact surfaces has a zigzag pattern. The electrodes are connected to the respective impurity regions. Application of an electrical signal to at least one of the electrodes phase-shifts the optical output signal with respect to the optical input signal. Therefore, the phase shifter may efficiently vary a magnitude of the phase shift of the optical output signal.
    Type: Application
    Filed: September 22, 2011
    Publication date: April 26, 2012
    Inventors: Kwang-Hyun Lee, Dong-Jae Shin, Kyoung-Ho Ha
  • Publication number: 20120087673
    Abstract: Provided is an optical interconnection system that transmits and receives a three-level signal. The optical interconnection system includes a first and a second optical interconnection device that transmits and receives a two-level signal, and a synthesizer that outputs a three-level signal by synthesizing signals from the first and second optical interconnection devices. The optical interconnection system may transmit and receive a three-level signal while using an optical interconnection device that interconnects a two-level signal.
    Type: Application
    Filed: December 12, 2011
    Publication date: April 12, 2012
    Inventors: Han-youl Ryu, Sung-dong Suh, Kyoung-ho Ha, Seong-gu Kim
  • Publication number: 20120070151
    Abstract: A de-emphasis format signal generator can be configured to combine first and second electrical non-de-emphasis formatted signals provided to first and second optical modulators, coupled in parallel with one another, to provide a combined optical signal having a de-emphasis format. Accordingly, three aspects of a de-emphasis formatted signal, including a de-emphasis delay aspect, a de-emphasis attenuation aspect, and a de-emphasis combining aspect, can provided separately and in different domains (such as in the electrical domain and in the optical domain) which can be combined with one another to provide an output de-emphasis formatted optical signal.
    Type: Application
    Filed: July 7, 2011
    Publication date: March 22, 2012
    Inventors: Dong Jae Shin, Kwang Hyun Lee, Jung Hyung Pyo, Kyoung Ho Ha, Ho-Chul Ji
  • Publication number: 20120070111
    Abstract: An optical modulator structure can include a core region that comprises an optical transmission path having a refractive index that is modulated via electric charge introduced into the core region. A plurality of first vertical slabs comes into contact with and is spaced along a first side of the core region to provide a first path for the electric charge to/from the core region. A plurality of second vertical slabs come into contact with and is spaced along a second side of the core region, that is opposite to the first side, to provide a second path for the electric charge to/from the core region. Other structures and methods are disclosed.
    Type: Application
    Filed: September 14, 2011
    Publication date: March 22, 2012
    Inventors: Dong Jae SHIN, Jung Hyung Pyo, Kwang Hyun Lee, Kyoung Ho Ha, Ho-Chul Ji
  • Patent number: 8129260
    Abstract: A semiconductor substrate includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is formed of II-VI-group semiconductor material, III-V-group semiconductor material, or II-VI-group semiconductor material and III-V-group semiconductor material. At least one amorphous region and at least one crystalloid region are formed in the first semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer and is crystal-grown from the at least one crystalloid region. A method of manufacturing a semiconductor substrate includes preparing a growth substrate; crystal-growing the first semiconductor layer on the growth substrate; forming the at least one amorphous region and the at least one crystalloid region in the first semiconductor layer; and forming a second semiconductor layer on the first semiconductor layer using the at least one amorphous region as a mask and the at least one crystalloid region as a seed.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: March 6, 2012
    Assignee: Samsung LED Co., Ltd.
    Inventors: Ho-sun Paek, Youn-joon Sung, Kyoung-ho Ha, Joong-kon Son, Sung-nam Lee
  • Patent number: 8120044
    Abstract: A multi-chip having an optical interconnection unit is provided. The multi-chip having an optical interconnection unit includes a plurality of silicon chips sequentially stacked, a plurality of optical device arrays on a side of each of the plurality of the silicon chips such that the optical device arrays correspond to each other and a wiring electrically connecting the silicon chip and the optical device array attached to a side of the silicon chip, wherein the corresponding optical device arrays forms an optical connection unit by transmitting and receiving an optical signal between the corresponding optical device arrays in different layers. Each of the optical device arrays includes at least one of a light emitting device and a light receiving device.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: February 21, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-haeng Cho, Kyoung-ho Ha, Han-youl Ryu, Sung-dong Suh, Seong-gu Kim, Bok-ki Min
  • Publication number: 20120025265
    Abstract: A method of manufacturing a photodetector structure is provided. The method includes forming a structural layer by making a trench in a bulk silicon substrate and filling the trench with a cladding material, forming a single-crystallized silicon layer on the structural layer, and forming a germanium layer on the single-crystallized silicon layer.
    Type: Application
    Filed: July 27, 2011
    Publication date: February 2, 2012
    Inventors: Ho-Chul JI, Kyoung Won NA, Kyoung Ho HA, Pil-Kyu KANG
  • Patent number: 8098994
    Abstract: Provided is an optical interconnection system that transmits and receives a three-level signal. The optical interconnection system includes a first and a second optical interconnection device that transmits and receives a two-level signal, and a synthesizer that outputs a three-level signal by synthesizing signals from the first and second optical interconnection devices. The optical interconnection system may transmit and receive a three-level signal while using an optical interconnection device that interconnects a two-level signal.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: January 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-youl Ryu, Sung-dong Suh, Kyoung-ho Ha, Seong-gu Kim
  • Publication number: 20120002495
    Abstract: A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device.
    Type: Application
    Filed: September 16, 2011
    Publication date: January 5, 2012
    Inventors: Soo-Haeng Cho, Ki-jae Song, Sung-dong Suh, Kyoung-ho Ha, Seong-gu Kim, Yeoung-kum Kim, In-sung Joe