Patents by Inventor Kyoung Woo
Kyoung Woo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240034801Abstract: Provided are an anti-PD-L1/anti-4-1BB natural antibody structure-like heterodimeric form bispecific antibody and a preparation thereof. Specifically, provided are an anti-PD-L1/anti-4-1BB bispecific antibody that has natural IgG features, that has no mismatch between heavy and light chains and that is in the form of a highly stable heterodimer, as well as a preparation method therefor. The bispecific antibody can simultaneously bind two target molecules and is more effective in treating complex diseases and has fewer side effects.Type: ApplicationFiled: January 7, 2022Publication date: February 1, 2024Inventors: Jiawang LIU, Yaping YANG, Siqi ZHAO, Yang LIU, Nanmeng SONG, Fei FAN, Kaixuan SU, Lanxin ZHANG, Jing WANG, Jiangcheng XU, Kyoung Woo LEE
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Publication number: 20230402382Abstract: A semiconductor device includes: a base substrate; a first interlayer insulating layer disposed on the base substrate; a power rail disposed inside the first interlayer insulating layer; an active pattern extended in a first horizontal direction and disposed on the first interlayer insulating layer; a gate electrode extended in a second horizontal direction different from the first horizontal direction and disposed on the active pattern; a gate cut extended in the first horizontal direction and disposed on the power rail, wherein the gate cut separates the gate electrode; and a power rail via disposed inside the gate cut, wherein the power rail via is overlapped by the power rail.Type: ApplicationFiled: February 24, 2023Publication date: December 14, 2023Inventors: Jin Kyu KIM, Yun Suk NAM, Kyoung Woo LEE, Ho-Jun KIM, Da Rong OH, Sung Moon LEE, Hag Ju CHO, Seung Min CHA
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Patent number: 11790008Abstract: A system includes reception of a user request for a set of data visualizations, execution, in response to the user request, of a main thread to request metadata associated with the set of data visualizations from a remote system, execution of a worker thread to request a set of persisted queries associated with the set of data visualizations from the remote system, to issue the set of persisted queries to the remote system, to receive query results associated with the set of persisted queries from the remote system, and to initiate storage of the query results in a local memory, and execution of the main thread to retrieve the query results stored in the local memory and render the set of data visualizations based on the retrieved query results.Type: GrantFiled: September 12, 2019Date of Patent: October 17, 2023Assignee: BUSINESS OBJECTS SOFTWARE LTD.Inventors: Justin Wong, JianHong Tan, Kyoung Woo Nam, Patrick Wang, Ruoxin Zhou, Veljko Jovanovic
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Publication number: 20230326831Abstract: A semiconductor device is provided. The semiconductor device includes: a first substrate; an active pattern extending on the first substrate; a gate electrode extending on the active pattern; a source/drain region on the active pattern; a first interlayer insulating layer on the source/drain region; a sacrificial layer on the first substrate; a lower wiring layer on a lower surface of the sacrificial layer; a through via trench extending to the lower wiring layer by passing through the first interlayer insulating layer and the sacrificial layer in a vertical direction; a through via inside the through via trench and connected to the lower wiring layer; a recess inside the sacrificial layer and protruding from a sidewall of the through via trench in the second horizontal direction; and a through via insulating layer extending along the sidewall of the through via trench and into the recess.Type: ApplicationFiled: March 29, 2023Publication date: October 12, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang Cheol NA, Kyoung Woo LEE, Min Chan GWAK, Guk Hee KIM, Young Woo KIM, Anthony Dongick LEE
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Patent number: 11728545Abstract: Lithium ion batteries, electrodes, nanofibers, and methods for producing same are disclosed herein. Provided herein are batteries having (a) increased energy density; (b) decreased pulverization (structural disruption due to volume expansion during lithiation/de-lithiation processes); and/or (c) increased lifetime. In some embodiments described herein, using high throughput, water-based electrospinning process produces nanofibers of high energy capacity materials (e.g., ceramic) with nanostructures such as discrete crystal domains, mesopores, hollow cores, and the like; and such nanofibers providing reduced pulverization and increased charging rates when they are used in anodic or cathodic materials.Type: GrantFiled: June 28, 2021Date of Patent: August 15, 2023Assignee: Cornell UniversityInventors: Yong Lak Joo, Nathaniel S. Hansen, Daehwan Cho, Kyoung Woo Kim
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Publication number: 20230093669Abstract: An AM/AV material, comprising a topsheet layer comprising fibers comprising a topsheet polymer composition, a backsheet layer comprising fibers comprising a backsheet polymer composition; and an absorbent core configured therebetween, wherein the fibers of at least one of the layers, e.g., the topsheet layer, comprise an AM/AV compound, and wherein the fibers of the topsheet layer demonstrate a rewet value less than 5 g after a first water application and/or a Staph aureus efficacy log reduction greater than 2.6, as measured in accordance with ISO 20743:2013.Type: ApplicationFiled: September 16, 2022Publication date: March 23, 2023Applicant: Ascend Performance Materials Operations LLCInventors: Kevin Urman, Scott McCormick, Joseph L. Menner, Kyoung Woo Kim, Gregory Kiggins
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Publication number: 20220380424Abstract: The present invention relates to a human Lefty A protein variant with improved productivity and stability, a fusion protein comprising the protein variant, and a composition for preventing and/or treating neuromuscular disease comprising the protein variant or the fusion protein. According to the present invention, a human Lefty A protein variant and a fusion protein comprising the variant are constructed, which have better stability than naturally occurring human Lefty A protein, and thus are expressed at high levels and produced in high yield in animal cells. In addition, administration of the constructed human Lefty A protein variant or fusion protein can restore the nerve and motor functions of nerve disease model animals. Accordingly, the use of the human Lefty A protein variant or fusion protein can effectively prevent or treat various nerve diseases and muscle diseases.Type: ApplicationFiled: December 17, 2019Publication date: December 1, 2022Inventors: Sun-Young JEONG, Kyoung Woo LEE, Seung Kee MOON, Sung Jun KANG, Byung-OK CHOI, Geon KWAK, Jong Wook CHANG, Jong Hyun KIM
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Patent number: 11301500Abstract: Some embodiments provide a program that receives a set of clusters generated from a set of geo-enriched data. The program further identifies a subset of the set of clusters that intersect a map extent of a map. Upon determining that a number of geo-enriched data represented by the subset of the set of clusters is greater than a threshold number, the program renders the map extent of the map to include the subset of the set of clusters. Upon determining that the number of geo-enriched data represented by the subset of the set of clusters is not greater than the threshold number, the program further sends a query for a subset of the set of geo-enriched data that is within the map extent, receives the subset of the set of geo-enriched data and renders the map extent of the map to include the subset of the set of geo-enriched data.Type: GrantFiled: December 29, 2016Date of Patent: April 12, 2022Assignee: SAP SEInventors: Xing Jin, Jonathan Tiu, Kyoung Woo Nam, Sae-Won Om
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Publication number: 20220098759Abstract: Provided herein are electrospinning systems, apparatuses, components, and processes for the preparation of nanofibers, including high throughput systems, apparatuses, and processes for producing high performance nanofibers.Type: ApplicationFiled: December 13, 2021Publication date: March 31, 2022Applicant: CORNELL UNIVERSITYInventors: Yong Lak Joo, Kyoung Woo Kim
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Publication number: 20210399384Abstract: Lithium ion batteries, electrodes, nanofibers, and methods for producing same are disclosed herein. Provided herein are batteries having (a) increased energy density; (b) decreased pulverization (structural disruption due to volume expansion during lithiation/de-lithiation processes); and/or (c) increased lifetime. In some embodiments described herein, using high throughput, water-based electrospinning process produces nanofibers of high energy capacity materials (e.g., ceramic) with nanostructures such as discrete crystal domains, mesopores, hollow cores, and the like; and such nanofibers providing reduced pulverization and increased charging rates when they are used in anodic or cathodic materials.Type: ApplicationFiled: June 28, 2021Publication date: December 23, 2021Applicant: CORNELL UNIVERSITYInventors: Yong Lak Joo, Nathaniel S. Hansen, Daehwan Cho, Kyoung Woo Kim
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Patent number: 11078616Abstract: Disclosed is a washing machine including a drying function. Here, a height of a bottom end of a dryer disposed above a tub is lower than a height of a top end of the tub to have a space for integrating other devices having additional functions above the tub.Type: GrantFiled: November 9, 2017Date of Patent: August 3, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Myung-Hee Ryu, Kyoung Woo Lee, Dong-Won Kim, Yongjie Jin, Jun Hong Park
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Patent number: 11050118Abstract: Lithium ion batteries, electrodes, nanofibers, and methods for producing same are disclosed herein. Provided herein are batteries having (a) increased energy density; (b) decreased pulverization (structural disruption due to volume expansion during lithiation/de-lithiation processes); and/or (c) increased lifetime. In some embodiments described herein, using high throughput, water-based electrospinning process produces nanofibers of high energy capacity materials (e.g., ceramic) with nanostructures such as discrete crystal domains, mesopores, hollow cores, and the like; and such nanofibers providing reduced pulverization and increased charging rates when they are used in anodic or cathodic materials.Type: GrantFiled: July 16, 2018Date of Patent: June 29, 2021Assignee: Cornell UniversityInventors: Yong Lak Joo, Nathaniel S. Hansen, Daehwan Cho, Kyoung Woo Kim
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Publication number: 20210167463Abstract: Provided herein are polymer-ceramic hybrid membranes, as well as processes for manufacturing such membranes. In particular, polymer-ceramic hybrid membranes are non-flammable and thermally stable and may be used in batteries, such as lithium ion batteries.Type: ApplicationFiled: April 11, 2019Publication date: June 3, 2021Inventors: Soshana SMITH, Joseph M. CARLIN, Kyoung Woo KIM, Yong Lak JOO
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Publication number: 20210081451Abstract: A system includes reception of a user request for a set of data visualizations, execution, in response to the user request, of a main thread to request metadata associated with the set of data visualizations from a remote system, execution of a worker thread to request a set of persisted queries associated with the set of data visualizations from the remote system, to issue the set of persisted queries to the remote system, to receive query results associated with the set of persisted queries from the remote system, and to initiate storage of the query results in a local memory, and execution of the main thread to retrieve the query results stored in the local memory and render the set of data visualizations based on the retrieved query results.Type: ApplicationFiled: September 12, 2019Publication date: March 18, 2021Inventors: Justin Wong, JianHong Tan, Kyoung Woo Nam, Patrick Wang, Ruoxin Zhou, Veljko Jovanovic
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Patent number: 10950541Abstract: A semiconductor device includes a substrate, a first lower wiring line on the substrate, a first insulation layer on the first lower wiring line, a first dielectric barrier layer and a first etch stop layer sequentially stacked on the first insulation layer, a second insulation layer on the first etch stop layer, a first upper wiring line extending through the second insulation layer, the first etch stop layer, and the first dielectric barrier layer, and a first conductive via in the first insulation layer and electrically connecting the first lower wiring line and the first upper wiring line. An upper surface of the first conductive via protrudes above a lower surface of the first upper wiring line.Type: GrantFiled: June 14, 2019Date of Patent: March 16, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Soon Gyu Hwang, Kyoung Woo Lee, YoungWoo Cho, Il Sup Kim, Su Hyun Bark, Young-Ju Park, Jong Min Baek, Min Huh
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Patent number: 10903482Abstract: Lithium-containing nanofibers, as well as processes for making the same, are disclosed herein. In some embodiments described herein, using high throughput (e.g., gas assisted and/or water based) electrospinning processes produce nanofibers of high energy capacity materials with continuous lithium-containing matrices or discrete crystal domains.Type: GrantFiled: January 11, 2018Date of Patent: January 26, 2021Assignee: CORNELL UNIVERSITYInventors: Yong Lak Joo, Nathaniel S. Hansen, Daehwan Cho, Kyoung Woo Kim
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Patent number: 10825766Abstract: A semiconductor device includes a lower wiring, an interlayer insulation film above the lower wiring and including a first portion having a first density, and a second portion on the first portion, the first portion and the second portion having a same material, and the second portion having a second density smaller than the first density, an upper wiring in the second portion of the interlayer insulating film, and a via in the first portion of the interlayer insulating film, the via connecting the upper wiring and the lower wiring.Type: GrantFiled: February 26, 2019Date of Patent: November 3, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ji Young Kim, Kyu Hee Han, Sung Bin Park, Yeong Gil Kim, Jong Min Baek, Kyoung Woo Lee, Deok Young Jung
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Publication number: 20200219808Abstract: A semiconductor device includes a substrate, a first lower wiring line on the substrate, a first insulation layer on the first lower wiring line, a first dielectric barrier layer and a first etch stop layer sequentially stacked on the first insulation layer, a second insulation layer on the first etch stop layer, a first upper wiring line extending through the second insulation layer, the first etch stop layer, and the first dielectric barrier layer, and a first conductive via in the first insulation layer and electrically connecting the first lower wiring line and the first upper wiring line. An upper surface of the first conductive via protrudes above a lower surface of the first upper wiring line.Type: ApplicationFiled: June 14, 2019Publication date: July 9, 2020Inventors: Soon Gyu HWANG, Kyoung Woo LEE, YoungWoo CHO, IL SUP KIM, Su Hyun BARK, Young-Ju PARK, Jong Min BAEK, Min HUH
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Publication number: 20200083094Abstract: A method of fabricating an interconnection line of a semiconductor device includes forming a via and a lower interconnection trench in a first interlayer insulating layer, an etch stop layer, and a second interlayer insulating layer on a substrate, forming a lower diffusion barrier layer, a lower seed layer, and a lower interconnection layer inside the via and the lower interconnection trench, planarizing the lower interconnection layer using a chemical mechanical polishing (CMP) process to form a contact plug and a lower interconnection line, depositing a third interlayer insulating layer on top of a second interlayer insulating pattern and the lower interconnection line, forming an upper interconnection trench in the third interlayer insulating layer, forming an upper diffusion barrier layer, an upper seed layer, and an upper interconnection layer inside the upper interconnection trench, and planarizing the upper interconnection layer using a CMP process to form an upper interconnection line.Type: ApplicationFiled: February 27, 2019Publication date: March 12, 2020Inventors: SHAO FENG DING, YOUNG SUK PARK, KYOUNG WOO LEE
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Publication number: 20200051909Abstract: A semiconductor device includes a lower wiring, an interlayer insulation film above the lower wiring and including a first portion having a first density, and a second portion on the first portion, the first portion and the second portion having a same material, and the second portion having a second density smaller than the first density, an upper wiring in the second portion of the interlayer insulating film, and a via in the first portion of the interlayer insulating film, the via connecting the upper wiring and the lower wiring.Type: ApplicationFiled: February 26, 2019Publication date: February 13, 2020Inventors: Ji Young KIM, Kyu Hee HAN, Sung Bin PARK, Yeong Gil KIM, Jong Min BAEK, Kyoung Woo LEE, Deok Young JUNG