Patents by Inventor Kyu-in Han

Kyu-in Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200259269
    Abstract: A chip antenna module includes a substrate, a plurality of chip antennas disposed on a first surface of the substrate, and an electronic element mounted on a second surface of the substrate, wherein each of the plurality of chip antennas includes a first ceramic substrate mounted on the first surface of the substrate, a second ceramic substrate opposing the first ceramic substrate, a first patch disposed on the first ceramic substrate, and a second patch disposed on the second ceramic substrate, and the first ceramic substrate and the second ceramic substrate are spaced apart from each other.
    Type: Application
    Filed: December 23, 2019
    Publication date: August 13, 2020
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Yeong KIM, Sung Nam CHO, Ju Hyoung PARK, Jeong Ki RYOO, Kyu Bum HAN, Sung Yong AN
  • Publication number: 20200251376
    Abstract: A semiconductor device includes a first interlayer dielectric film on a substrate, first and second wires respectively extending in a first direction within the first interlayer dielectric film, the first and second wires being adjacent to each other in a second direction different from the first direction, a hard mask pattern on the first interlayer dielectric film, the hard mask pattern including an opening, and an air gap within the first interlayer dielectric film, the air gap including a first portion overlapping vertically with the opening and a second portion not overlapping with the opening in the first direction.
    Type: Application
    Filed: April 22, 2020
    Publication date: August 6, 2020
    Inventors: Kyu Hee HAN, Jong Min BAEK, Viet Ha NGUYEN, Woo Kyung YOU, Sang Shin JANG, Byung Hee KIM
  • Publication number: 20200239334
    Abstract: A fluid treatment device includes a pipe including an inlet, an outlet, an internal space through which a fluid moves and including a light source part disposed in the internal space and providing a light to the fluid. The light source part includes at least one light source unit having a substrate and a plurality of light sources disposed on the substrate and emitting the light. A ratio of a first distance between two light sources adjacent to each other to a second distance between each light source and an inner circumferential surface of the pipe is 1:1.25 or less when viewed in a longitudinal-section.
    Type: Application
    Filed: February 28, 2020
    Publication date: July 30, 2020
    Applicant: SEOUL VIOSYS CO., LTD.
    Inventors: Jae Young CHOI, Kyu Won HAN, Yeo Jin YOON, Woong Ki JEONG
  • Publication number: 20200230271
    Abstract: A lighting device including at least one first light source emitting a visible light, at least one second light source spaced apart from the first light source and emitting a light having a wavelength for sterilization, and a housing, in which the first light source and the second light source are disposed, in which the first light source is disposed outside an area having an angle corresponding to about 50% of a maximum amount of light emitted from the second light source based on a line extending from a center of the second light source along a direction substantially perpendicular to a light emitting surface of the second light source.
    Type: Application
    Filed: July 20, 2018
    Publication date: July 23, 2020
    Inventors: Jae Young CHOI, Kyu Won HAN, Seong Tae JANG, Sang Wook JUNG, Woong Ki JEONG
  • Publication number: 20200227314
    Abstract: A method of fabricating a semiconductor device is provided. The method may include forming a first interlayer insulating film on a substrate, forming a second interlayer insulating film on the first interlayer insulating film, and forming a third interlayer insulating film on the second interlayer insulating film. Different amounts of carbon may be present in each of the first, second, and third interlayer insulating films. The third interlayer insulating film may be used as a mask pattern to form a via trench that extends at least partially into the first interlayer insulating film and the second interlayer insulating film. Supplying a carbon precursor may be interrupted between the forming of the second and third interlayer insulating films, such that the second interlayer insulating film and the third interlayer insulating film may have a discontinuous boundary therebetween.
    Type: Application
    Filed: August 20, 2019
    Publication date: July 16, 2020
    Inventors: Yeong Gil Kim, Han Seong Kim, Jong Min Baek, Ji Young Kim, Sung Bin Park, Deok Young Jung, Kyu Hee Han
  • Publication number: 20200220268
    Abstract: An antenna apparatus includes: a first dipole antenna pattern; a feed line electrically connected to the first dipole antenna pattern; and a first ground plane disposed rearward of the first dipole antenna pattern and spaced apart from the first dipole antenna pattern; wherein the first ground plane forms a step-type cavity, and width of a rear portion of the step-type cavity is different from a width of a front portion of the step-type cavity.
    Type: Application
    Filed: June 11, 2019
    Publication date: July 9, 2020
    Applicant: Samsung Electro-Mechanics., Ltd.
    Inventors: Nam Ki KIM, Jeong Ki RYOO, Kyu Bum HAN, Young Kyoon IM, Won Cheol LEE
  • Publication number: 20200212147
    Abstract: Disclosed is a display device. In accordance with the display device, before an organic stack of a light-emitting diode is formed, a sticker is attached to a substrate, while a camera hole-forming portion and a margin area around the same are present, to form the organic stack, and the sticker and components on top of the sticker, such as the organic stack, are removed, so that the edge of the organic stack can be aligned without any additional process using separate masks and the reliability of the display device can be improved due to the provision of the organic stack at a location spaced apart from the camera hole by the margin area.
    Type: Application
    Filed: December 23, 2019
    Publication date: July 2, 2020
    Inventors: Kyu-Il HAN, Nam-Seok YOO, Jin-Ho PARK, Mi-Na KIM, Hyung-Won PARK, Jung-Mo CHO, Yu-Ri PARK, Hyoung-Min KIM, Seung-Ho SON
  • Patent number: 10679955
    Abstract: A semiconductor package includes a substrate portion including a core layer having a device accommodating portion formed therein, and a buildup layer stacked on each of opposing sides of the core layer; an electronic device disposed in the device accommodating portion; and heat dissipating conductors disposed in the buildup layer to externally emit heat generated by the electronic device.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: June 9, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Hyun Kim, Thomas A. Kim, Kyu Bum Han
  • Publication number: 20200176877
    Abstract: An antenna apparatus includes first dipole antenna patterns, feed lines, a first ground plane, and a first blocking pattern. The feed lines are connected to corresponding ones of the first dipole antenna patterns. The first ground plane is disposed on a side of the first dipole antenna patterns and spaced apart from each of the first dipole antenna patterns. The first blocking pattern, connected to and extending from the first ground plane, is disposed between adjacent ones of the first dipole antenna patterns.
    Type: Application
    Filed: June 11, 2019
    Publication date: June 4, 2020
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Nam Ki KIM, Jeong Ki RYOO, Kyu Bum HAN, Young Kyoon IM
  • Patent number: 10669631
    Abstract: A gas injection apparatus, which can sequentially supply a substrate with at least two kinds of source gases reacting with each other in a container, and thin film deposition equipment including the gas injection apparatus, are provided. The gas injection apparatus includes a base plate, a first gas supply region protruding from the base plate, a second gas supply region protruding from the base plate and adjacent the first gas supply region, and a trench defined by a sidewall of the first gas supply region and a sidewall of the second gas supply region. The sidewall of the first gas supply region and the sidewall of the second gas supply region face each other and extend in a radial direction on the base plate.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: June 2, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Chul Kim, Jung-Il Ahn, Jung-Hun Seo, Jong-Cheol Lee, Kyu-Hee Han, Seung-Han Lee, Jin-Pil Heo
  • Patent number: 10658231
    Abstract: A semiconductor device includes a first interlayer dielectric film on a substrate, first and second wires respectively extending in a first direction within the first interlayer dielectric film, the first and second wires being adjacent to each other in a second direction different from the first direction, a hard mask pattern on the first interlayer dielectric film, the hard mask pattern including an opening, and an air gap within the first interlayer dielectric film, the air gap including a first portion overlapping vertically with the opening and a second portion not overlapping with the opening in the first direction.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: May 19, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyu Hee Han, Jong Min Baek, Viet Ha Nguyen, Woo Kyung You, Sang Shin Jang, Byung Hee Kim
  • Patent number: 10643847
    Abstract: A method for manufacturing a functionalized graphene structure includes preparing a substrate having a graphene layer, forming an organic linker layer by providing an organic linker on the graphene layer, and forming a dopant layer by providing a dopant material including a metal on the organic linker layer. The organic linker layer and the dopant layer are formed in-situ.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: May 5, 2020
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo Sung, Kyu-Seok Han
  • Publication number: 20200131266
    Abstract: Provided herein are methods for treating cancer using molecules having an antigen binding fragment that immunospecifically binds to BTN1A1, such as anti-BTN1A1 antibodies. These molecules include those having an antigen binding fragment that immunospecifically binds to glycosylated BTN1A1, such as anti-glycosylated BTN1A1 antibodies. Also included are molecules having an antigen binding fragment that immunospecifically bind to BTN1A1 dimers, such as anti-BTN1A1 dimer antibodies. Also provided are methods for treating anti-PD-1 therapy or anti-PD-L1 therapy resistant or refractory cancers.
    Type: Application
    Filed: May 30, 2018
    Publication date: April 30, 2020
    Inventors: Stephen Sunghan Yoo, Yong-Sik Bong, Kyu Lee Han, Michael Joseph Surace
  • Publication number: 20200112081
    Abstract: An antenna module includes an integrated circuit (IC) package, a first antenna package, a second antenna package, and a connection member. The IC package includes an IC and mounting electrical connection structures. The first antenna package includes a first patch antenna pattern, a first feed via connected to the first patch antenna pattern, and a first antenna dielectric layer surrounding at least a portion of the first feed via. The second antenna package includes a second patch antenna pattern, a second feed via connected to the second patch antenna pattern, and a second antenna dielectric layer surrounding at least a portion of the second feed via, and disposed to be spaced apart from the first antenna package. The connection member, connecting the IC to the first feed via and the second feed via, connects to the mounting electrical connection structures, and having a stacked structure.
    Type: Application
    Filed: July 8, 2019
    Publication date: April 9, 2020
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hong In KIM, Hyung Ho SEO, Young Kyoon IM, Kyu Bum HAN, Jeong Ki RYOO
  • Publication number: 20200105664
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a substrate; a first insulating interlayer on the substrate; a first wiring in the first insulating interlayer on the substrate; an insulation pattern on a portion of the first insulating interlayer adjacent to the first wiring, the insulation pattern having a vertical sidewall and including a low dielectric material; an etch stop structure on the first wiring and the insulation pattern; a second insulating interlayer on the etch stop structure; and a via extending through the second insulating interlayer and the etch stop structure to contact an upper surface of the first wiring.
    Type: Application
    Filed: April 4, 2019
    Publication date: April 2, 2020
    Inventors: Kyu-Hee HAN, Jong-Min BAEK, Hoon-Seok SEO, Sang-Hoon AHN, Woo-Jin LEE
  • Publication number: 20200098620
    Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.
    Type: Application
    Filed: May 14, 2019
    Publication date: March 26, 2020
    Inventors: Woojin LEE, Hoon Seok SEO, Sanghoon AHN, Kyu-Hee HAN
  • Publication number: 20200080639
    Abstract: Methods and devices for high-temperature sealing of metallic components to ceramic components. The disclosed methods and devices for sealing enable a first environment containing one or more fluids to be isolated from at least one other environment containing one or more fluids. The seal may operate at least part of the time at an elevated temperature, such as a temperature above 100° C., above 300° C., and, in some embodiments, as high as 1000° C. In a typical embodiment, the elevated temperature may be in the range of 600-800° C. The first and/or second environments may be at elevated pressures for at least some fraction of the time. The elevated pressure may be above 100 psig, above 500 psig, and, in some embodiments, as high as 15,000 psig. In a typical embodiment, the elevated pressure may be in the range of 1,000-5,000 psig, and more specifically 1,500-3,000 psig.
    Type: Application
    Filed: September 9, 2019
    Publication date: March 12, 2020
    Inventors: Jesse Nachlas, Kyu B. Han, Isaac Corn, Brian Jacques, Darryl P. Butt, Balakrishnan Nair, James Steppan
  • Publication number: 20200072874
    Abstract: An RF sensing apparatus configured for use with a plasma processing chamber includes a penetration unit opened in an up/down direction, a main return path unit surrounding all or a portion of the penetration unit, and a secondary return path unit located between the penetration unit and the main return path unit, spaced apart from the main return path unit, and surrounding all or a portion of the penetration unit. The main return path unit and the secondary return path unit include a path through which a current flows in one of the up/down directions.
    Type: Application
    Filed: January 29, 2019
    Publication date: March 5, 2020
    Inventors: YOUNG DO KIM, SUNG YONG LIM, CHAN SOO KANG, DO HOON KWON, MIN JU KIM, SANG KI NAM, JUNG MO YANG, JONG HUN PI, KYU HEE HAN
  • Patent number: 10566284
    Abstract: Provided is a semiconductor device comprising a device region on a substrate, an interlayer dielectric layer on the device region, a first interface layer on a side of the interlayer dielectric layer, a low-k dielectric layer spaced apart from the interlayer dielectric layer across the first interface layer and having a dielectric constant less than that of the interlayer dielectric layer, and a conductive line in the low-k dielectric layer. The first interface layer comprises a first sub-interface layer in contact with the low-k dielectric layer, and a second sub-interface layer in contact with the interlayer dielectric layer. The second sub-interface layer has hydrogen permeability less than that of the first sub-interface layer.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: February 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun Kwan Kim, Sanghoon Ahn, Kyu-Hee Han, JaeWha Park, Heesook Park
  • Publication number: 20200051909
    Abstract: A semiconductor device includes a lower wiring, an interlayer insulation film above the lower wiring and including a first portion having a first density, and a second portion on the first portion, the first portion and the second portion having a same material, and the second portion having a second density smaller than the first density, an upper wiring in the second portion of the interlayer insulating film, and a via in the first portion of the interlayer insulating film, the via connecting the upper wiring and the lower wiring.
    Type: Application
    Filed: February 26, 2019
    Publication date: February 13, 2020
    Inventors: Ji Young KIM, Kyu Hee HAN, Sung Bin PARK, Yeong Gil KIM, Jong Min BAEK, Kyoung Woo LEE, Deok Young JUNG