Abstract: There is provided a bridgeless power factor correction circuit that corrects a power factor by complementarily switching two switches according to phase of input power without using rectifier bridge diodes. A bridgeless power factor correction circuit according to an aspect of the invention may include: a switching unit having a plurality of switches and alternately switching input AC power; a stabilizing unit rectifying and smoothing the power switched by the switching unit; and a control unit controlling an alternate switching operation between the plurality of switches according to phases of the input power.

Abstract: A test mode control circuit is provided to strictly allow entry into a test mode or prevent a boot failure from occurring during a boot operation for a built-in parallel bit test. The test mode control circuit includes a latch, a real entry signal detector, an entry determinator, and a mode control signal generator. When a real entry signal is detected, the entry signal determinator generates an entry determination signal and a test mode control signal is obtained from the mode control signal generator.

Abstract: Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area.

Abstract: An apparatus for performing shade correction for a lens in an image sensor includes a gain profile extractor, a common profile calculator, a gain controller calculator, and a memory device. The gain profile extractor generates a respective channel gain profile for each of a plurality of color channels from image data. The common profile calculator generates a common profile from the channel gain profiles. The gain controller calculator generates a respective gain controller for each of the plurality of color channels from the common profile and the channel gain profiles. A memory device stores the common profile and the gain controllers.

Abstract: Provided is an apparatus and method for detecting a packet of a zero-padded OFDM signal, which are capable of determining if a packet exists in a reception (RX) signal by comparing a cross-correlation value of an OFDM signal delayed by a predetermined sample time, e.g., a zero-padded sample time, with a power value of the RX signal, thereby increasing a packet detection probability and preventing a false alarm. The packet detecting apparatus includes: a cross-correlation calculator for calculating a cross-correlation value of a reception signal received from the outside and delaying the calculated cross-correlation value by a predetermined sample time; a power calculator for calculating a power value of the reception signal; and a packet detector for determining if a packet exists in the reception signal by comparing the delayed cross-correlation value with the calculated power value, and detecting the corresponding packet.

Abstract: A parallel equalizer for a DS-CDMA UWB system and method thereof are provided. The parallel equalizer includes: a filter block for filtering a training input signal in a ‘training mode’, and filtering the plurality of input signals in parallel in a ‘symbol decision mode’; a symbol decision block for obtaining a symbol error based on a output from the filter block and a training symbol in the ‘training mode’, and estimating a transmission symbol for each of the input signals in the ‘symbol decision mode’, obtaining an error of one among the estimated transmission symbols for a symbol error calculating input signal; and an weight update block for updating a filter tap coefficients of the filter block based on the training input signal or the symbol error calculating input signal and the symbol error and transmitting the updated filter tap coefficients into the filter block.

Abstract: There is provided a backlight unit driver capable of driving multi-channel lamps of a backlight unit, especially LED lamps, by supplying a driving power to the lamps using a single transformer and maintaining the current balance of the driving power supplied to each of the lamps.

Abstract: Provided is a method and apparatus for acquiring OFDM synchronization even when it fails to detect a plurality of symbols at an initial stage. In the method, a frequency is adjusted to a first frequency band and a cross correlation value between a received preamble symbol and a preset preamble symbol is calculated. When the calculated cross correlation value is larger than a predetermined reference value and is first detected, frequency hopping is performed to receive subsequent symbols and cross correlation values to the subsequent symbols are reexamined. When the reexamined cross correlation value larger than the predetermined reference value is detected, timing synchronization, frequency offset estimation, and frame detection are performed.

Abstract: Floating gate structures are generally described. In one example, an electronic device includes a semiconductor substrate, a tunnel dielectric coupled with the semiconductor substrate, and a floating gate structure comprising at least a first region having a first electron energy level or electron workfunction or carrier capture efficiency coupled with the tunnel dielectric and a second region having a second electron energy level or electron workfunction or carrier capture efficiency coupled with the first region wherein the first electron energy level or electron workfunction or carrier capture efficiency is less than the second electron energy level or electron workfunction or carrier capture efficiency. Such electronic device may reduce the thickness of the floating gate structure or reduce leakage current through an inter-gate dielectric, or combinations thereof, compared with a floating gate structure that comprises only polysilicon.

Abstract: The present invention provides a method consisting of a step for analyzing a traffic receiving mirroring, a step for judging whether NAT (Network Address Translation) use of a client configuring and using a private network as well as a provided authorized IP (an Internet IP) is allowed or not, for analyzing and detecting the number of sharing terminals, a step for creating a database using data, and a step for formulating a policy by using information in database, so that when the users of a private network connect to Internet at the same time, permission or blocking of Internet use can be executed selectively.

Abstract: The present invention is related to a method for neutralizing a malicious ARP spoofing attack generated in a local network and in particular, the present invention provides a method for neutralizing an ARP spoofing attack comprising a step for detecting an ARP spoofing attack based on an ARP request packet generated for an ARP spoofing attack; a step for generating a plurality of counterfeit MAC addresses and dynamically changing MAC addresses of network devices or servers which are to be protected whenever an ARP spoofing attack is generated; and a step for neutralizing an ARP spoofing attack by using a counterfeit MAC address which is capable of neutralizing an ARP spoofing attack adequately.

Abstract: An apparatus for detecting a signal in a common frequency band includes: a signal processor configured to extract a selected band signal from received wireless signals by filtering the received wireless signal based on a frequency selection control signal, convert the extracted signal to a baseband signal, and detect a predetermined signal; a sensing signal determiner configured to determine existence of the signal, output a determination result, and outputs a frequency selection generating signal when the predetermined signal is absent; and a frequency selection controller configured to output the frequency selection control signal by selecting a target band among a plurality of previously decided bands.

Abstract: Provided are a terminal and a base station, and a frequency sensing method thereof. The terminal or the base station may filter a frequency band needing frequency sensing in the entire frequency band where the terminal or the base station may receive an input signal. It is possible to enhance a detection performance and rate of signals by applying frequency sensing to the filtered frequency band.

Abstract: Provided is a synchronization error tracking device and method. The method and system estimates and corrects the synchronization error generated by time and frequency offsets during the data transmission interval and uses a module designed for initial synchronization or channel estimation without adding a new correlation operator. Further, a combining mark value and a synchronization position value acquired during the synchronization process are used.

Abstract: Provided is an apparatus and method for controlling a voltage gain in an ultra wideband receiving apparatus. The apparatus includes a register for storing an Automatic Gain Control (AGC) value detected in a section where an AGC operation control signal is “ON”; and a voltage gain controller for generating a voltage gain control value by reading the AGC stored in the register during a section where a reception enable signal is “ON”, and transferring the generated voltage gain control value to a voltage gain amplifier.

Abstract: Provided is an apparatus and method for detecting a time-frequency code in an MB-OFDM UWB system. The apparatus includes a controller for providing a band selection signal to the RF receiver and outputting a preamble selection signal at regular symbol periods to calculate a cross correlation value for a predetermined time period more than a beacon frame interval when a time-frequency code search start signal is received; and a cross correlator for storing information on preamble patterns, selecting a preamble stored depending on the preamble selection signal, and calculating a cross correlation value for a digital signal transferred through the RF receiver, wherein the controller determines a time-frequency code using a preamble where a peak occurs as a time-frequency code that is currently in use when a peak signal is inputted based on the calculated cross correlation value, and transmits the determined time-frequency code to the MAC receiver.

Abstract: Provided are a high speed and low power fixed-point multiplier and method thereof. The multiplier includes: a partial product calculation unit for dividing input data into a plurality of bit groups, each bit group having a predetermined number of bits, generating partial products by independently multiplying a fixed coefficient for each bit group, and summing partial products included in a corresponding bit group, to thereby generate a summed partial products; and an adding unit for adding the summed partial products of each bit group generated from the partial product calculation unit.

Abstract: Provided is an optical guide bar including: a light exit portion; light incident portions, on which light is incident, formed on both sides of the light exit portion; and a reflective portion facing the light exit portion and including a prism pattern that reflects light transmitted through the light incident portions towards the light exit portion. A shape of the reflective portion is determined in consideration of an effective light emission width of the light incident portion so that the intensity of light at any portion of the reflective portion is uniform.

Abstract: A process for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern is described. The process includes forming a hard mask layer over a target layer that is desired to be etched. A sacrificial layer pattern is subsequently formed over the hard mask layer. Spacers are formed on the sidewalls of the sacrificial layer pattern. The protective layer is formed on the hard mask layer portions between the sacrificial patterns formed with the spacer. The sacrificial layer pattern and the protective layer are then later removed, respectively. The hard mask layer is etched using the spacer as an etching mask. After etching, the spacer is removed. Finally, the target layer is etched using the etched hard mask as an etching mask.

Abstract: A semiconductor device is manufactured by forming a low dielectric constant layer on a semiconductor substrate which is formed with metal lines; implementing primary ultraviolet treatment of the low dielectric constant layer; forming a capping layer on the low dielectric constant layer having undergone the primary ultraviolet treatment; and implementing secondary ultraviolet treatment of the low dielectric constant layer including the capping layer.