Patents by Inventor Laertis Economikos

Laertis Economikos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6099935
    Abstract: An apparatus for use in manufacturing a semiconductor device having input-output (IO) lands arranged in an IO array on an IO face includes a body having a plurality of cavities extending from an operating face into the body; the cavities are arranged in a cavity loci array which is in registeration with the IO lands when the apparatus is in a manufacturing position with the operating face generally adjacent the IO face. Each cavity has a depth and a lateral expanse which cooperate to establish a volume defined by a cavity bottom and at least one cavity wall. The volume accommodates an appropriate amount of solder material to establish a measure of the solder material on a facing IO land when the apparatus is in the manufacturing position.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: August 8, 2000
    Assignee: International Business Machines Corporation
    Inventors: William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur Gilman Merryman, Eric Daniel Perfecto, Chandrika Prasad, James Patrick Wood, Roy Yu
  • Patent number: 6057216
    Abstract: Doped semiconductor with high dopant concentrations in small semiconductor regions without excess spreading of the doped region are formed by:(a) applying a dopant-containing oxide glass layer on the semiconductor surface,(b) capping the dopant-containing oxide glass layer with a conformal silicon oxide layer,(c) heating the substrate from step (b) in a non-oxidizing atmosphere whereby at least a portion of the dopant in the glass diffuses into the substrate at the semiconductor surface, and(d) heating the glass-coated substrate from step (c) in an oxidizing atmosphere whereby at least a portion of the dopant in the glass near the semiconductor surface is forced into the substrate at the semiconductor surface by diffusion of oxygen through the glass.The method is especially useful for making buried plates in semiconductor substrates which may be used in trench capacitor structures. The preferred semiconductor substrate material is monocrystalline silicon. The preferred dopant is arsenic.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: May 2, 2000
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Cheruvu S. Murthy, Hua Shen
  • Patent number: 6037193
    Abstract: The present invention relates generally to a new process for hermetically sealing of a high thermally conductive substrate, such as, an aluminum nitride substrate, using a low thermally conductive interposer and structure thereof. More particularly, the invention encompasses a hermetic cap which is secured to an aluminum nitride substrate using the novel thermal interposer. The novel thermal interposer basically comprises of layers of relatively high thermal conductive metallic materials sandwiching a core layer of low thermal conductive metallic material.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: March 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mario J. Interrante, Laertis Economikos, Lester Wynn Herron
  • Patent number: 6030881
    Abstract: A method is provided for filling high aspect ratio gaps without void formation by using a high density plasma (HDP) deposition process with a sequence of deposition and etch steps having varying etch rate-to-deposition rate (etch/dep) ratios. The first step uses an etch/dep ratio less than one to quickly fill the gap. The first step is interrupted before the opening to the gap is closed. The second step uses an etch/dep ratio greater than one to widen the gap. The second step is stopped before corners of the elements forming the gaps are exposed. These steps can be repeated until the aspect ratio of the gap is reduced so that void-free gap-fill is possible. The etch/dep ratio and duration of each step can be optimized for high throughput and high aspect ratio gap-fill capacity.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: February 29, 2000
    Assignees: Novellus Systems, Inc., International Business Machines Corporation
    Inventors: George D. Papasouliotis, Ashima B. Chakravarti, Richard A. Conti, Laertis Economikos, Patrick A. Van Cleemput
  • Patent number: 6003418
    Abstract: A punched slug removal system for punching a slug from a workpiece and removing the punched slug. The system includes a punch having a reciprocating travel path with a transition point where the punch changes direction. A die plate has an aperture into which a die bushing may be disposed. The die bushing provides support for the workpiece and has an opening through which the punch and a slug pass. A manifold supports the die plate and (if present) the die bushing and has a distribution channel and an orifice which direct a gas flow onto a slug attached to the punch in a direction perpendicular to the reciprocating travel path of the punch to remove the slug from the punch. The distribution channel is tapered to increase the velocity of the gas flow. The orifice is positioned at the top of the manifold adjacent the transition point of the reciprocating travel path of the punch.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: December 21, 1999
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Laertis Economikos, Mark J. LaPlante, David C. Long, Keith C. O'Neil
  • Patent number: 5945735
    Abstract: The present invention relates generally to a new process for hermetically sealing of a high thermally conductive substrate, such as, an aluminum nitride substrate, using a low thermally conductive interposer and structure thereof. More particularly, the invention encompasses a hermetic cap which is secured to an aluminum nitride substrate using the novel thermal interposer. The novel thermal interposer basically comprises of layers of relatively high thermal conductive metallic materials sandwiching a core layer of low thermal conductive metallic material.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: August 31, 1999
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Lester Wynn Herron, Mario J. Interrante
  • Patent number: 5939335
    Abstract: The stresses commonly induced in the dielectrics of integrated circuits manufactured using metal patterning methods, such as reactive ion etching (RIE) and damascene techniques, can be reduced by rounding the lower corners associated with the features which are formed as part of the integrated circuit (e.g., the interconnects) before applying the outer (i.e., passivation) layer. In connection with the formation of metal lines patterned by a metal RIE process, such corner rounding can be achieved using a two-step metal etching process including a first step which produces a vertical sidewall and a second step which tapers lower portions of the vertical sidewall or which produces a tapered spacer along the lower portions of the vertical sidewall. This results in a rounded bottom corner which improves the step coverage of the overlying dielectric, in turn eliminating the potential for cracks.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: August 17, 1999
    Assignee: International Business Machines Corporation
    Inventors: Kenneth C. Arndt, Richard A. Conti, David M. Dobuzinsky, Laertis Economikos, Jeffrey P. Gambino, Peter D. Hoh, Chandrasekhar Narayan
  • Patent number: 5907985
    Abstract: A punch tool for punching a slug from a workpiece. The punch of the punch tool has a reciprocating travel path with a transition region where the punch changes direction. A die plate of the punch tool has an aperture. A support bushing disposed in the aperture of the die plate provides support for the workpiece and has an underside and an opening through which the punch and the slug pass. A nozzle disposed in the aperture of the die plate provides an internal passage for the removal of punch slugs from the tool. The nozzle has a top and a side wall with a hole disposed in the side wall adjacent the transition region of the reciprocating travel path of the punch. The nozzle, the support bushing, and the die plate are integrated to form a flow path delivering a gas flow to the hole in the nozzle. The flow path and the hole direct the gas flow on a slug attached to the punch in the transition region of the reciprocating travel path of the punch to remove the slug from the punch.
    Type: Grant
    Filed: July 22, 1997
    Date of Patent: June 1, 1999
    Assignee: International Business Machines Corporation
    Inventors: Raschid Jose Bezama, Laertis Economikos, Keith Colin O'Neil
  • Patent number: 5904868
    Abstract: A laser tool for securing or removing a component from a semiconductor substrate includes a light-transmissive bonding tip having an opening to accommodate a central portion of the component inner and outer walls of the tip being coated with a light reflective material, a portion of the end of the tip being coated with a light absorptive material, so that peripheral areas of the component are locally heated by the tip to mount or remove the component.
    Type: Grant
    Filed: September 11, 1997
    Date of Patent: May 18, 1999
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Robert Hannon, Charles Joseph Hendricks, Richard Philip Surprenant
  • Patent number: 5742021
    Abstract: Temperature gradients between a ceramic substrate of high thermal conductivity and the braze materials used to attach a metallic device such as a cap are reduced by using an embedded internal heat source in the substrate to minimize the thermal gradient, thereby minimizing the stresses that can result in substrate cracking when a cap is brazed onto the substrate.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: April 21, 1998
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Robert Hannon, Richard P. Surprenant, Thomas VanDuynhoven
  • Patent number: 5536605
    Abstract: A repaired laser ablation mask is disclosed capable of withstanding laser fluences in the range from about 200 mJ/cm.sup.2 to at least 500 mJ/cm.sup.2. The repaired mask comprises a single or multiple layers of apertured metal, such as, aluminum, on a quartz substrate. The laser mask repair technique and structure are also disclosed. The thickness of the metal layer, such as, aluminum layer, is in the range from about 2 microns to about 6 microns. A laser projection etching technique is also disclosed for using the repaired ablation mask.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: July 16, 1996
    Assignee: International Business Machines Corporation
    Inventors: Rajesh S. Patel, Laertis Economikos
  • Patent number: 5534371
    Abstract: A repaired laser ablation mask is disclosed capable of withstanding laser fluences in the range from about 200 mJ/cm.sup.2 to at least 500 mJ/cm.sup.2. The repaired mask comprises a single or multiple layers of apertured metal, such as, aluminum, on a quartz substrate. The laser mask repair technique and structure are also disclosed. The thickness of the metal layer, such as, aluminum layer, is in the range from about 2 microns to about 6 microns. A laser projection etching technique is also disclosed for using the repaired ablation mask.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: July 9, 1996
    Assignee: International Business Machines Corporation
    Inventors: Rajesh S. Patel, Laertis Economikos
  • Patent number: 5491319
    Abstract: A laser ablation apparatus and method removes undesired portions of a workpiece. An industrial laser generates a beam of optical energy and directs the beam at the workpiece. A mechanism in the path of the beam for shapes the cross-section of the beam and includes first and second linear actuators on opposite sides of the beam path. Each of the actuators includes a plurality of linear members, with each linear member being adjacent to and in contact with another linear member, and means for individually inserting and retracting each of said members into and out of said beam path a desired distance to thereby shape the beam so as to ablate only undesired portions of the workpiece.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: February 13, 1996
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Robert Hannon, Richard P. Surprenant
  • Patent number: 5481138
    Abstract: The present invention relates generally to a new structure and a method for repairing electrical lines, and more particularly, the invention encompasses a structure and a method for repairing electrical lines on a ceramic or a semiconductor substrate. On a substrate that has an open or an electrical discontinuity, one or more trenches or grooves are made next to the open, or discontinuity and using standard deposition process one or more metals are deposited in the open to provide or restore electrical continuity while the excess deposition material is allowed to drain or propagate into the trench.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: January 2, 1996
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Richard P. Surprenant
  • Patent number: 5478009
    Abstract: A solder ball removal tool uses ultrasonic vibrations to remove specific solder balls from high density chips, substrate solder ball terminal connections, card or board solder ball connections, or other solder ball array for the purpose of customizing the electrical functionality of a module. The tool also allows for the removal of damaged or defective solder balls for the purpose of replacement with defect free solder balls.
    Type: Grant
    Filed: August 10, 1994
    Date of Patent: December 26, 1995
    Assignee: International Business Machines Corporation
    Inventors: Mario J. Interrante, Laertis Economikos
  • Patent number: 5425493
    Abstract: A specially designed tip containing an electron discharge milled cone of specific dimensions is used to transfer a critical solder volume from a solder ball carrier to a specific solder ball site on the base line metal on a high density chip, substrate terminal connection, solder ball connection, or any solder ball array. The critical tip/cone dimensions have a height of the cone and a circumference at the base which generate a specific volume of solder to be transferred.
    Type: Grant
    Filed: August 10, 1994
    Date of Patent: June 20, 1995
    Assignee: International Business Machines Corporation
    Inventors: Mario J. Interrante, Laertis Economikos
  • Patent number: 5384953
    Abstract: The present invention relates generally to a new structure and a method for repairing electrical lines, and more particularly, the invention encompasses a structure and a method for repairing electrical lines on a ceramic or a semiconductor substrate. On a substrate that has an open or an electrical discontinuity, one or more trenches or grooves are made next to the open, or discontinuity and using standard deposition process one or more metals are deposited in the open to provide or restore electrical continuity while the excess deposition material is allowed to drain or propagate into the trench.
    Type: Grant
    Filed: July 21, 1993
    Date of Patent: January 31, 1995
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Richard P. Surprenant
  • Patent number: 5321886
    Abstract: A conductive line is applied to a substrate by aligning the conductive line in juxtaposition with a selected area of the substrate; bonding the conductive line to the substrate; and detaching the conductive line from a carrier in which the conductive line is suspended. The carrier has a carrier opening defined by sidewalls, and conductive material is suspended by the sidewalls of the carrier opening so as to be embedded within the carrier opening, and form the conductive line.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: June 21, 1994
    Assignee: International Business Machines Corporation
    Inventors: Pedro A. Chalco, Matthew F. Cali, Laertis Economikos, James L. Speidell
  • Patent number: 5310967
    Abstract: A conductive line is applied to a substrate by aligning the conductive line in juxtaposition with a selected area of the substrate; bonding the conductive line to the substrate; and detaching the conductive line from a carrier in which the conductive line is suspended. The carrier has a carrier opening defined by sidewalls, and conductive material is suspended by the sidewalls of the carrier opening so as to be embedded within the carrier opening, and form the conductive line.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: May 10, 1994
    Assignee: International Business Machines Corporation
    Inventors: Pedro A. Chalco, Matthew F. Cali, Laertis Economikos, James L. Speidell
  • Patent number: 5289632
    Abstract: A conductive line is applied to a substrate by aligning the conductive line in juxtaposition with a selected area of the substrate; bonding the conductive line to the substrate; and detaching the conductive line from a carrier in which the conductive line is suspended. The carrier has a carrier opening defined by sidewalls, and conductive material is suspended by the sidewalls of the carrier opening so as to be embedded within the carrier opening, and form the conductive line.
    Type: Grant
    Filed: November 25, 1992
    Date of Patent: March 1, 1994
    Assignee: International Business Machines Corporation
    Inventors: Pedro A. Chalco, Matthew F. Cali, Laertis Economikos, James L. Speidell