Patents by Inventor Lakshminarayan Viswanathan

Lakshminarayan Viswanathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10529638
    Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a molded package body having an upper peripheral edge portion, an air cavity around which the upper peripheral edge portion extends, and a cover piece bonded to the upper peripheral edge portion to enclose the air cavity. The cover piece has a lower peripheral edge portion, which cooperates with the upper peripheral edge portion to define a cover-body interface. The cover-body interface includes an annular channel extending around the cover-body interface, as taken about the package centerline, and first and second hardstop features formed on the upper peripheral edge portion of the molded package body and on the lower peripheral edge portion of the cover piece, respectively. The hardstop features contact to determine a vertical height of the annular channel, as taken along the package centerline.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: January 7, 2020
    Assignee: NXP USA, Inc.
    Inventors: Audel Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos, Jaynal A. Molla
  • Patent number: 10506704
    Abstract: Microelectronic packages, modules, systems, and other assemblies containing enhanced electromagnetic (EM) shield structures are provided, as are methods for fabricating electromagnetically-shielded microelectronic assemblies. In an embodiment, the electromagnetically-shielded microelectronic assembly includes first and second signal paths, which carry different electrical signals during operation of the microelectronic assembly. An EM shield structure is positioned between the first and second signal paths. The EM shield structure includes, in turn, a magnetic shield portion adjacent (e.g., in contact with and/or directly or indirectly bonded to) an electrical shield portion. The magnetic shield portion has a first magnetic permeability and a first electrical conductivity, while the electrical shield portion has a second magnetic permeability less than the first magnetic permeability and having a second electrical conductivity greater than the first electrical conductivity.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: December 10, 2019
    Assignee: NXP USA, Inc.
    Inventors: Ramanujam Srinidhi Embar, Vikas Shilimkar, Lakshminarayan Viswanathan
  • Patent number: 10485091
    Abstract: High thermal performance microelectronic modules containing sinter-bonded heat dissipation structures are provided, as are methods for the fabrication thereof. In various embodiments, the method includes the steps or processes of providing a module substrate, such as a circuit board, including a cavity having metallized sidewalls. A sinter-bonded heat dissipation structure is formed within the cavity. The sintered-bonded heat dissipation structure is formed, at least in part, by inserting a prefabricated thermally-conductive body, such as a metallic (e.g., copper) coin into the cavity. A sinter precursor material (e.g., a metal particle-containing paste) is dispensed or otherwise applied into the cavity and onto surfaces of the prefabricated thermally-conductive body before, after, or concurrent with insertion of the prefabricated thermally-conductive body.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: November 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Jaynal A. Molla, Lakshminarayan Viswanathan, Elie A. Maalouf, Geoffrey Tucker
  • Publication number: 20190342988
    Abstract: A packaged microelectronic component includes a substrate and a semiconductor die coupled to a top surface of the substrate. A method of attaching the packaged microelectronic component to a secondary structure entails applying a metal particle-containing material to at least one of a bottom surface of the substrate and a mounting surface of the secondary structure. The packaged microelectronic component and the secondary structure are arranged in a stacked relationship with the metal particle-containing material disposed between the bottom surface and the mounting surface. A low temperature sintering process is performed at a maximum process temperature less than a melt point of the metal particles to transform the metal particle-containing material into a sintered bond layer joining the packaged microelectronic component and the secondary structure. In an embodiment, the substrate may be a heat sink for the packaged microelectronic component and the secondary structure may be a printed circuit board.
    Type: Application
    Filed: July 16, 2019
    Publication date: November 7, 2019
    Inventors: Lakshminarayan Viswanathan, Lu Li, Mahesh K. Shah, Paul Richard Hart
  • Publication number: 20190343005
    Abstract: An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.
    Type: Application
    Filed: July 22, 2019
    Publication date: November 7, 2019
    Inventors: Fernando A. Santos, Audel Sanchez, Lakshminarayan Viswanathan, Jerry Lynn White
  • Patent number: 10440813
    Abstract: High thermal performance microelectronic modules containing thermal extension levels are provided, as are methods for fabricating such microelectronic modules. In various embodiments, the microelectronic module includes a module substrate having a substrate frontside and a substrate backside. At least one a microelectronic device, such as a semiconductor die bearing radio frequency circuitry, is mounted to the substrate frontside. A substrate-embedded heat spreader, which is thermally coupled to the microelectronic device, is at least partially contained within the module substrate, and extends to the substrate backside. A thermal extension level is located adjacent the substrate backside and extends away from the substrate backside to terminate at a module mount plane. The thermal extension level contains a heat spreader extension, which is bonded to and in thermal communication with the substrate-embedded heat spreader.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 8, 2019
    Assignee: NXP USA, Inc.
    Inventors: Lu Li, Elie A. Maalouf, Lakshminarayan Viswanathan, Mahesh K. Shah
  • Patent number: 10431449
    Abstract: Microelectronic systems having embedded heat dissipation structures are disclosed, as are methods for fabricating such microelectronic systems. In various embodiments, the method includes the steps or processes of obtaining a substrate having a tunnel formed therethrough, attaching a microelectronic component to a frontside of the substrate at a location covering the tunnel, and producing an embedded heat dissipation structure at least partially within the tunnel after attaching the microelectronic component to the substrate. The step of producing may include application of a bond layer precursor material into the tunnel and onto the microelectronic component from a backside of the substrate. The bond layer precursor material may then be subjected to sintering process or otherwise cured to form a thermally-conductive component bond layer in contact with the microelectronic component.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: October 1, 2019
    Assignee: NXP USA, Inc.
    Inventors: Jaynal A. Molla, Lakshminarayan Viswanathan, Geoffrey Tucker
  • Patent number: 10405417
    Abstract: A packaged microelectronic component includes a substrate and a semiconductor die coupled to a top surface of the substrate. A method of attaching the packaged microelectronic component to a secondary structure entails applying a metal particle-containing material to at least one of a bottom surface of the substrate and a mounting surface of the secondary structure. The packaged microelectronic component and the secondary structure are arranged in a stacked relationship with the metal particle-containing material disposed between the bottom surface and the mounting surface. A low temperature sintering process is performed at a maximum process temperature less than a melt point of the metal particles to transform the metal particle-containing material into a sintered bond layer joining the packaged microelectronic component and the secondary structure. In an embodiment, the substrate may be a heat sink for the packaged microelectronic component and the secondary structure may be a printed circuit board.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: September 3, 2019
    Assignee: NXP USA, Inc.
    Inventors: Lakshminarayan Viswanathan, Lu Li, Mahesh K. Shah, Paul Richard Hart
  • Patent number: 10396006
    Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: August 27, 2019
    Assignee: NXP USA, Inc.
    Inventors: Audel Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos, Jaynal A. Molla
  • Patent number: 10375833
    Abstract: An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: August 6, 2019
    Assignee: NXP USA, Inc.
    Inventors: Lakshminarayan Viswanathan, Audel A. Sanchez, Fernando A. Santos, Jerry L. White
  • Publication number: 20190206759
    Abstract: Microelectronic systems and components having integrated heat dissipation posts are disclosed, as are methods for fabricating such microelectronic systems and components. In various embodiments, the microelectronic system includes a substrate having a frontside, a socket cavity, and inner cavity sidewalls defining the socket cavity. A microelectronic component is seated on the frontside of the substrate such that a heat dissipation post, which projects from the microelectronic component, is received in the socket cavity and separated from the inner cavity sidewalls by a peripheral clearance. The microelectronic system further includes a bond layer contacting the inner cavity sidewalls, contacting an outer peripheral portion of the heat dissipation post, and at least partially filling the peripheral clearance.
    Type: Application
    Filed: March 7, 2019
    Publication date: July 4, 2019
    Inventors: Lakshminarayan Viswanathan, Mahesh K. Shah, Lu Li, David Abdo, Geoffrey Tucker, Carl Emil D'Acosta, Jaynal A. Molla, Justin Eugene Poarch, Paul Hart
  • Publication number: 20190148138
    Abstract: Microelectronic systems having embedded heat dissipation structures are disclosed, as are methods for fabricating such microelectronic systems. In various embodiments, the method includes the steps or processes of obtaining a substrate having a tunnel formed therethrough, attaching a microelectronic component to a frontside of the substrate at a location covering the tunnel, and producing an embedded heat dissipation structure at least partially within the tunnel after attaching the microelectronic component to the substrate. The step of producing may include application of a bond layer precursor material into the tunnel and onto the microelectronic component from a backside of the substrate. The bond layer precursor material may then be subjected to sintering process or otherwise cured to form a thermally-conductive component bond layer in contact with the microelectronic component.
    Type: Application
    Filed: November 6, 2018
    Publication date: May 16, 2019
    Applicant: NXP USA, INC.
    Inventors: JAYNAL A. MOLLA, LAKSHMINARAYAN VISWANATHAN, GEOFFREY TUCKER
  • Patent number: 10269678
    Abstract: Microelectronic systems having integrated heat dissipation posts are disclosed, as are methods for fabricating such microelectronic systems. In various embodiments, the method includes the step or process of obtaining a microelectronic component from which a heat dissipation post projects. The microelectronic component is placed or seated on a substrate, such as a multilayer printed circuit board, having a socket cavity therein. The heat dissipation post is received in the socket cavity as the microelectronic component is seated on the substrate. Concurrent with or after seating the microelectronic component, the microelectronic component and the heat dissipation post are bonded to the substrate. In certain embodiments, the heat dissipation post may be dimensioned or sized such that, when the microelectronic component is seated on the substrate, the heat dissipation post occupies a volumetric majority of the socket cavity.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: April 23, 2019
    Assignee: NXP USA, Inc.
    Inventors: Lakshminarayan Viswanathan, Mahesh K. Shah, Lu Li, David Abdo, Geoffrey Tucker, Carl Emil D'Acosta, Jaynal A. Molla, Justin Eugene Poarch, Paul Hart
  • Publication number: 20190109060
    Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a molded package body having an upper peripheral edge portion, an air cavity around which the upper peripheral edge portion extends, and a cover piece bonded to the upper peripheral edge portion to enclose the air cavity. The cover piece has a lower peripheral edge portion, which cooperates with the upper peripheral edge portion to define a cover-body interface. The cover-body interface includes an annular channel extending around the cover-body interface, as taken about the package centerline, and first and second hardstop features formed on the upper peripheral edge portion of the molded package body and on the lower peripheral edge portion of the cover piece, respectively. The hardstop features contact to determine a vertical height of the annular channel, as taken along the package centerline.
    Type: Application
    Filed: December 5, 2018
    Publication date: April 11, 2019
    Applicant: NXP USA, INC.
    Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
  • Publication number: 20190098743
    Abstract: High thermal performance microelectronic modules containing sinter-bonded heat dissipation structures are provided, as are methods for the fabrication thereof. In various embodiments, the method includes the steps or processes of providing a module substrate, such as a circuit board, including a cavity having metallized sidewalls. A sinter-bonded heat dissipation structure is formed within the cavity. The sintered-bonded heat dissipation structure is formed, at least in part, by inserting a prefabricated thermally-conductive body, such as a metallic (e.g., copper) coin into the cavity. A sinter precursor material (e.g., a metal particle-containing paste) is dispensed or otherwise applied into the cavity and onto surfaces of the prefabricated thermally-conductive body before, after, or concurrent with insertion of the prefabricated thermally-conductive body.
    Type: Application
    Filed: November 28, 2018
    Publication date: March 28, 2019
    Applicant: NXP USA, INC.
    Inventors: JAYNAL A. MOLLA, LAKSHMINARAYAN VISWANATHAN, ELIE A. MAALOUF, GEOFFREY TUCKER
  • Patent number: 10211177
    Abstract: A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal “coins” having high thermal conductivity into package substrates, or printed circuit boards, and coupling the power device dies onto the metal coins is provided. In one embodiment, the power device die can be attached to an already embedded metal coin in the package substrate or PCB. The power device die can be directly coupled to the embedded metal coin or the power device die can be attached to a metallic interposer which is then bonded to the embedded metal coin. In another embodiment, the die can be attached to the metal coin and then the PCB or package substrate can be assembled to incorporate the copper coin. Active dies are coupled to each other either through wire bonds or other passive components, or using a built-up interconnect.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Scott M. Hayes, Scott D. Marshall, Mahesh K. Shah
  • Publication number: 20190051571
    Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.
    Type: Application
    Filed: October 18, 2018
    Publication date: February 14, 2019
    Applicant: NXP USA, INC.
    Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
  • Publication number: 20190043774
    Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.
    Type: Application
    Filed: August 7, 2017
    Publication date: February 7, 2019
    Applicant: NXP USA, INC.
    Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
  • Publication number: 20190043775
    Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a molded package body having an upper peripheral edge portion, an air cavity around which the upper peripheral edge portion extends, and a cover piece bonded to the upper peripheral edge portion to enclose the air cavity. The cover piece has a lower peripheral edge portion, which cooperates with the upper peripheral edge portion to define a cover-body interface. The cover-body interface includes an annular channel extending around the cover-body interface, as taken about the package centerline, and first and second hardstop features formed on the upper peripheral edge portion of the molded package body and on the lower peripheral edge portion of the cover piece, respectively. The hardstop features contact to determine a vertical height of the annular channel, as taken along the package centerline.
    Type: Application
    Filed: August 7, 2017
    Publication date: February 7, 2019
    Applicant: NXP USA, INC.
    Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
  • Patent number: 10199302
    Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: February 5, 2019
    Assignee: NXP USA, INC.
    Inventors: Audel Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos, Jaynal A. Molla