Patents by Inventor Lakshminarayan Viswanathan

Lakshminarayan Viswanathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9837327
    Abstract: A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: December 5, 2017
    Assignee: NXP USA, INC.
    Inventor: Lakshminarayan Viswanathan
  • Patent number: 9837328
    Abstract: A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: December 5, 2017
    Assignee: NXP USA, INC.
    Inventor: Lakshminarayan Viswanathan
  • Patent number: 9824995
    Abstract: A packaged RF device is provided that utilizes flexible circuit leads. The RF device includes at least one integrated circuit (IC) die configured to implement the RF device. The IC die is contained inside a package. In accordance with the embodiments described herein, a flexible circuit is implemented as a lead. Specifically, the flexible circuit lead is coupled to the at least one IC die inside the package and extends to outside the package, the flexible circuit lead thus providing an electrical connection to the at least one IC die inside the package.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: November 21, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Michael E. Watts
  • Patent number: 9800208
    Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: October 24, 2017
    Assignee: NXP USA, INC.
    Inventors: Mahesh K. Shah, Jerry L. White, Li Li, Hussain H. Ladhani, Audel A. Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos
  • Patent number: 9799580
    Abstract: A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: October 24, 2017
    Assignee: NXP USA, INC.
    Inventors: Li Li, Jaynal A. Molla, Lakshminarayan Viswanathan
  • Publication number: 20170278763
    Abstract: A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 28, 2017
    Inventors: Li LI, Jaynal A. MOLLA, Lakshminarayan VISWANATHAN
  • Publication number: 20170271292
    Abstract: A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal “coins” having high thermal conductivity into package substrates, or printed circuit boards, and coupling the power device dies onto the metal coins is provided. In one embodiment, the power device die can be attached to an already embedded metal coin in the package substrate or PCB. The power device die can be directly coupled to the embedded metal coin or the power device die can be attached to a metallic interposer which is then bonded to the embedded metal coin. In another embodiment, the die can be attached to the metal coin and then the PCB or package substrate can be assembled to incorporate the copper coin. Active dies are coupled to each other either through wire bonds or other passive components, or using a built-up interconnect.
    Type: Application
    Filed: June 5, 2017
    Publication date: September 21, 2017
    Inventors: Lakshminarayan Viswanathan, Scott M. Hayes, Scott D. Marshall, Mahesh K. Shah
  • Publication number: 20170263529
    Abstract: A semiconductor device and a method of manufacturing the same include a die and a planar thermal layer, and a thick-silver layer having a thickness of at least four (4) micrometers disposed directly onto a first planar side of the planar thermal layer, as well as a metallurgical die-attach disposed between the thick-silver layer and the die, the metallurgical die-attach directly contacting the thick-silver layer.
    Type: Application
    Filed: May 30, 2017
    Publication date: September 14, 2017
    Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla
  • Patent number: 9748185
    Abstract: Embodiments of semiconductor devices (e.g., RF devices) include a substrate, an isolation structure, an active device, a lead, and a circuit. The isolation structure is coupled to the substrate, and includes an opening. An active device area is defined by a portion of the substrate surface that is exposed through the opening. The active device is coupled to the substrate surface within the active device area. The circuit is electrically coupled between the active device and the lead. The circuit includes one or more elements positioned outside the active device area (e.g., physically coupled to the isolation structure and/or under the lead). The elements positioned outside the active device area may include elements of an envelope termination circuit and/or an impedance matching circuit. Embodiments also include method of manufacturing such semiconductor devices.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: August 29, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Jeffrey K. Jones, Scott D. Marshall
  • Publication number: 20170207142
    Abstract: An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.
    Type: Application
    Filed: April 3, 2017
    Publication date: July 20, 2017
    Inventors: Lakshminarayan Viswanathan, Bruce M. Green, Darrell G. Hill, L. M. Mahalingam
  • Patent number: 9698116
    Abstract: A semiconductor device and a method of manufacturing the same include a die and a planar thermal layer, and a thick-silver layer having a thickness of at least four (4) micrometers disposed directly onto a first planar side of the planar thermal layer, as well as a metallurgical die-attach disposed between the thick-silver layer and the die, the metallurgical die-attach directly contacting the thick-silver layer.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: July 4, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla
  • Patent number: 9673162
    Abstract: A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal “coins” having high thermal conductivity into package substrates, or printed circuit boards, and coupling the power device dies onto the metal coins is provided. In one embodiment, the power device die can be attached to an already embedded metal coin in the package substrate or PCB. The power device die can be directly coupled to the embedded metal coin or the power device die can be attached to a metallic interposer which is then bonded to the embedded metal coin. In another embodiment, the die can be attached to the metal coin and then the PCB or package substrate can be assembled to incorporate the copper coin. Active dies are coupled to each other either through wire bonds or other passive components, or using a built-up interconnect.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: June 6, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Scott M. Hayes, Scott D. Marshall, Mahesh K. Shah
  • Patent number: 9614046
    Abstract: An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: April 4, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Bruce M. Green, Darrell G. Hill, L. M. Mahalingam
  • Patent number: 9589860
    Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a thermally conductive flow layer underlying the sintered metallic layer, and a thermally conductive substrate underlying the thermally conductive flow layer.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: March 7, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla
  • Patent number: 9538659
    Abstract: An embodiment of a solder wettable flange includes a flange body formed from a conductive material. The flange body has a bottom surface, a top surface, sidewalls extending between the top surface and the bottom surface, and one or more depressions extending into the flange body from the bottom surface. Each depression is defined by a depression surface that may or may not be solder wettable. During solder attachment of the flange to a substrate, the depressions may function as reservoirs for excess solder. Embodiments also include devices and systems that include such solder wettable flanges, and methods for forming the solder wettable flanges, devices, and systems.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: January 3, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla, Mahesh K. Shah
  • Publication number: 20160365323
    Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a conductive layer underlying the sintered metallic layer, and a conductive substrate underlying the conductive layer.
    Type: Application
    Filed: August 25, 2016
    Publication date: December 15, 2016
    Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla
  • Patent number: 9518555
    Abstract: A radiation device and related method are presented. The radiation device includes a body. The body includes a threaded portion configured to engage with a threaded opening in an engine and an open interior volume. The radiation device includes a ground electrode coupled to the body, a substrate disposed within the open interior volume in the body, and a radio frequency generator on the substrate. The radio frequency generator is configured to receive an input signal and, in response to the input signal, generate plasma energy between the body and the ground electrode.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: December 13, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Mario M. Bokatius, Lakshminarayan Viswanathan, David P. Lester, Basim H. Noori, Pierre Marie J. Piel
  • Patent number: 9484222
    Abstract: A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (RF) power amplifier transistor having a first port, a second port, and a third port. The semiconductor device also includes an output lead, a first output impedance matching circuit between the second port and the output lead, and a first additional circuit coupled between the output lead and a ground terminal. At least one component of the first additional circuit is formed at least in part by way of one or more of a plurality of castellations and a plurality of vias.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: November 1, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Hussain H. Ladhani, Lu Li, Mahesh K. Shah, Lakshminarayan Viswanathan, Michael E. Watts
  • Publication number: 20160308010
    Abstract: An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.
    Type: Application
    Filed: June 3, 2016
    Publication date: October 20, 2016
    Inventors: Lakshminarayan Viswanathan, Bruce M. Green, Darrell G. Hill, L. M. Mahalingam
  • Patent number: 9466588
    Abstract: A packaged semiconductor device may include a leadframe and a die carrier mounted to the leadframe. The die carrier is formed from an electrically and thermally conductive material. A die is mounted to a surface of the die carrier with die attach material having a melting point in excess of 240° C. A method may include providing the die carrier, melting the die attach material at a temperature in excess of 240° C. to attach the die to the surface of the die carrier to form a sub-assembly, attaching the sub-assembly to a leadframe, electrically interconnecting the die and the leadframe, and enclosing at least portions of the die and the leadframe to form a packaged device.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: October 11, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Fernando A. Santos, Audel A. Sanchez, Lakshminarayan Viswanathan