Abstract: A device includes a substrate and a metal-oxide-semiconductor (MOS) device. The MOS device includes a gate dielectric over the substrate, a gate electrode over the gate dielectric, a source/drain region adjacent the gate dielectric, and a source/drain silicide over and contacting the source/drain region. The source/drain silicide comprises silicon, nickel, and a secondary metal. A ratio of a volume percentage of the secondary metal to a volume percentage of the silicon in the source/drain silicide is between about 0.005 and about 0.1. The secondary metal has a density between about 5,000 kg/m3 and about 15,000 kg/m3.

Abstract: A semiconductor structure and method for forming the same provide a high mobility stressor material suitable for use as source/drain regions or other active devices. The structure is formed in a substrate opening and is doped with an impurity such as boron in upper portions but is void of the impurity in regions that contact the surfaces of the opening. The structure is therefore resistant to out-diffusion of the dopant impurity during high temperature operations and may be formed through selective deposition using reduced pressure chemical vapor deposition or reduced pressure epitaxial deposition.

Abstract: A method includes forming top metal lines over a semiconductor substrate, wherein the semiconductor substrate is a portion of a wafer having a bevel. When the top metal lines are exposed, an etchant is supplied on the bevel, wherein regions of the wafer sprayed with the etchant has an inner defining line forming a first ring having a first diameter. A trimming step is performed to trim an edge portion of the wafer, wherein an edge of a remaining portion of the wafer has a second diameter substantially equal to or smaller than the first diameter.

Abstract: A semiconductor wafer includes a substrate, an integrated circuit and a die seal ring structure. The substrate is with a die region, a die seal ring region surrounding the die region and a scribe line region surrounding the die seal ring region. The substrate includes a first surface and a second surface opposite to the first surface, and periodic recesses within the first surface of the die seal ring region, the scribe line region or both the die seal ring region and the scribe line region. The integrated circuit is located on the first surface and the second surface of the die region. The die seal ring structure is located on the second surface of the die seal ring region. A semiconductor die is also provided.

Abstract: A semiconductor device includes a p-type metal oxide semiconductor device (PMOS) and an n-type metal oxide semiconductor device (NMOS) disposed over a substrate. The PMOS has a first gate structure located on the substrate, a carbon doped n-type well disposed under the first gate structure, a first channel region disposed in the carbon doped n-type well, and activated first source/drain regions disposed on opposite sides of the first channel region. The NMOS has a second gate structure located on the substrate, a carbon doped p-type well disposed under the second gate structure, a second channel region disposed in the carbon doped p-type well, and activated second source/drain regions disposed on opposite sides of the second channel region.

Abstract: A backside illumination image sensor structure comprises an image sensor formed adjacent to a first side of a semiconductor substrate, wherein an interconnect layer is formed over the first side of the semiconductor substrate, a backside illumination film formed over a second side of the semiconductor substrate, a metal shielding layer formed over the backside illumination film and a via embedded in the backside illumination film and coupled between the metal shielding layer and the semiconductor substrate.

Abstract: A method for performing a programming operation to a first memory bit and a second memory bit of a device is described. The method includes applying a pulse train voltage to a metal gate of the device and grounding a substrate of the device. By floating/grounding a drain of the device and/or by floating/grounding the source of the device, the first memory and the second memory bit are programmed. The pulse train voltage includes 10 to 1000 pulses. One pulse includes a peak voltage and a base voltage. The peak voltage ranges from 0.5 V to 10 V. A duration of the peak voltage ranges from 1 nanosecond to 1 millisecond. The base voltage is 0 V. A duration of the base voltage ranges from 1 nanosecond to 1 millisecond.

Abstract: An improved reflectivity optical grid for image sensors. In an embodiment, a backside illuminated CIS device includes a semiconductor substrate having a pixel array area comprising a plurality of photosensors formed on a front side surface of the semiconductor substrate, each of the photosensors forming a pixel in the pixel array area; an optical grid material disposed over a backside surface of the semiconductor substrate, the optical grid material patterned to form an optical grid that bounds each of the pixels in the pixel array area and extending above the semiconductor substrate, the optical grid having sidewalls and a top portion; and a highly reflective coating formed over the optical grid, comprising a pure metal coating of a metal that is at least 99% pure, and a high-k dielectric coating over the pure metal coating that has a refractive index of greater than about 2.0. Methods are also disclosed.

Abstract: An image sensor includes a substrate having opposite first and second sides, a multilayer structure on the first side of the substrate, and a photo-sensitive element on the second side of the substrate. The photo-sensitive element is configured to receive light that is incident upon the first side and transmitted through the multilayer structure and the substrate. The multilayer structure includes first and second light transmitting layers. The first light transmitting layer is sandwiched between the substrate and the second light transmitting layer. The first light transmitting layer has a refractive index that is from 60% to 90% of a refractive index of the substrate. The second light transmitting layer has a refractive index that is lower than the refractive index of the first light transmitting layer and is from 40% to 70% of the refractive index of the substrate.

Abstract: A semiconductor device includes a source/drain feature in a substrate. The source/drain feature has an upper portion and a lower portion, the upper portion having a lower concentration of Ge than the lower portion. A Si-containing layer over the source/drain feature includes a metal silicide layer.

Abstract: A bonding pad structure for an image sensor device and a method of fabrication thereof. The image sensor device has a radiation-sensor region including a substrate and a radiation detection device, and a bonding pad region including the bonding pad structure. The bonding pad structure includes: an interconnect layer; an interlayer dielectric layer (IDL), both layers extending from under the substrate into the bonding pad region; an isolation layer formed on IDL; a conductive pad having a planar portion and one or more bridging portions extending perpendicularly from the planar portion, through the IDL and isolation layers, and to the interconnect layer; and a plurality of non-conducting stress-releasing structures disposed between the isolation layer and the conductive pad in such a way to adjoin its planar and the bridging portions together for releasing potential pulling stress applied thereon and preventing a conductive pad peeling.

Abstract: An electrical connector includes an insulative housing (10) defining a passageway (11) therein, a power contact (20) received in the passageway and a fastening member (28) for mating with the power contact. The power contact includes a pair of contacting portions (21) and a connecting portion (22) connecting the pair of contacting portions. The pair of contacting portions is essentially parallel to each other and a spacing (210) is defined therebetween. The connecting portion includes a fastening portion (23) essentially perpendicular to the pair of contacting portions. The fastening member (28) is separately made from the power contact to fasten securely to the fastening portion (23). Thus, the power contact can be reliably fixed in the insulative housing.

Abstract: Methods and apparatus for a backside illuminated (BSI) image sensor device are disclosed. A BSI sensor device is formed on a substrate comprising a photosensitive diode. The substrate may be thinned at the backside, then a B doped Epi-Si(Ge) layer may be formed on the backside surface of the substrate. Additional layers may be formed on the B doped Epi-Si(Ge) layer, such as a metal shield layer, a dielectric layer, a micro-lens, and a color filter.

Abstract: The present invention is to provide a loudspeaker enclosure structure which includes a hollow housing being a barrel-shaped housing whose outer surface is concavely provided with a plurality of directional grooves each evenly arranged along the circumferential direction of the hollow housing and extending from the front end to rear end of the hollow housing, and a reflective cover having a front side fixed to a rear opening of the hollow housing and concavely provided with an annular reflective groove adjacent to the periphery of the reflective cover. The hollow housing has a receiving space therein which is in communication with each directional groove through the reflective groove. Therefore, the sound generated by a loudspeaker fixed in the receiving space will not only propagate out of the front end of the hollow housing, but also be transmitted to the space surrounding the hollow housing by way of the directional grooves.

Abstract: A backside illumination image sensor structure comprises an image sensor formed adjacent to a first side of a semiconductor substrate, wherein an interconnect layer is formed over the first side of the semiconductor substrate, a backside illumination film formed over a second side of the semiconductor substrate, a metal shielding layer formed over the backside illumination film and a via embedded in the backside illumination film and coupled between the metal shielding layer and the semiconductor substrate.

Abstract: A semiconductor wafer having a plurality of chip die areas arranged on a wafer in an array, each chip die area including a seal ring area with one or more first sets of polygonal structures. The wafer further comprises scribe line areas between the chip die areas, the scribe line areas including one or more second sets of polygonal structures. The presence of proximate polygonal structures between the scribe line and seal ring areas balance stresses between the chip die areas during wafer dicing operation.

Abstract: In a method of manufacturing a semiconductor device, a source/drain feature is formed over a substrate. A Si-containing layer is formed over the source/drain feature. A metal layer is formed over the Si-containing layer. A metal silicide layer is formed from the metal layer and Si in the Si-containing layer.

Abstract: An electrical connector (100) includes an insulative housing (10) defining a passageway (12), a contact (30) received in the passageway and a transfer contact (40) with one end connected to a cable and the other end connected to the contact. The contact includes a retaining portion (31) fixed in the passageway, a contact portion (32) extending forwardly from the retaining portion and a tail portion (33) extending backwardly from the retaining portion. The transfer contact includes a U-shaped portion (41) for receiving the tail portion (33) and a cable connection portion (42) extending from the U-shaped portion for receiving the cable. The U-shaped portion includes a pair of side walls (412). At least one of the side walls (412) includes an elastic arm (413) engaging with the tail portion (33) of the contact for improving fixation force therebetween.

Abstract: The present invention is to provide a light-permeable housing, which includes a metal layer evenly formed with a plurality of apertures and a bonding layer made from a mixture of a light-permeable bonding material and a solid material (such as mineral or glass powder) with a particle size smaller than the diameter of each aperture. The bonding layer is formed on the metal layer and bonds tightly thereto through the apertures to form the light-permeable housing, allow passage of light projected from a lamp inside the light-permeable housing, and thereby impart light-permeability to the light-permeable housing. Meanwhile, the portion of the metal layer that is not formed with the apertures provides a light-shielding effect that allows the overlying bonding layer to show the texture and saturated colors of the solid material, and make the light-permeable housing suitable for use in outdoor landscaping and capable of blending perfectly into natural scenery.

Abstract: The present invention is to provide a high-pressure fire-retardant material, which includes at least one metal layer each being a plate made of a metal material, having a thickness less than 2 mm, and evenly formed with a plurality of mesh holes by stamping; at least one fiber layer each being a board composed of a fibrous material and having a thickness less than 2 mm; and at least one bonding layer each located between one metal layer and one fiber layer. The bonding layer is formed by curing a composite material made of an even mixture of an adhesive and a fire-resistant material, wherein the fire-resistant material is in a form of powder or particles and makes up 45% to 65% by weight of the composite material. Once cured, the composite material forms the bonding layer and is embedded in the mesh holes and pores of the fiber layer.