Patents by Inventor Lei Wan

Lei Wan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220021849
    Abstract: The invention relates to a smart photo-microscope system, including a microscope and a camera attached to the microscope to photograph a microscope sample. In an exemplary configuration, the camera includes a built-in processor and is connected with the microscope to receive and process information from the microscope. In another exemplary configuration, the smart photo-microscope system further includes a single board computer (SBC), which includes a built-in processor and is connected with the microscope and camera to receive and process information from the microscope and/or camera.
    Type: Application
    Filed: November 22, 2019
    Publication date: January 20, 2022
    Inventors: Shukuan XU, Luying QIANG, Weiqiang GUO, Lei CAI, Zheng WAN, Hexin WANG, Michael GOEGLER
  • Publication number: 20220005867
    Abstract: A memory device includes a cross-point array of spin-torque transfer MRAM cells. First rail structures laterally extend along a first horizontal direction. Each of the first rail structures includes a vertical stack including, from bottom to top, a first electrically conductive line, a reference layer having a fixed magnetization direction, and a tunnel barrier layer. Second rail structures laterally extend along a second horizontal direction. Each of the second rail structures includes a second electrically conductive line that overlies the first rail structures. A two-dimensional array of pillar structures is located between a respective one of the first rail structures and a respective one of the second rail structures. Each of the pillar structures includes a free layer having energetically stable magnetization orientations that are parallel or antiparallel to the fixed magnetization direction.
    Type: Application
    Filed: September 17, 2021
    Publication date: January 6, 2022
    Inventors: Lei WAN, Jordan KATINE, Tsai-Wei WU
  • Publication number: 20210396787
    Abstract: A digital input and output signal test platform includes a digital input signal circuit, a digital output signal circuit, and a digital signal interface circuit. The digital input signal circuit generates a plurality of digital input signals and displays the generated digital input signals. The digital output signal circuit receives a plurality of digital output signals and displays the received digital output signals. The digital signal interface circuit transmits the generated digital input signals to digital input ports of an electronic product under test, and transmits the digital output signals output from digital output ports of the electronic product to the digital output signal circuit.
    Type: Application
    Filed: June 14, 2021
    Publication date: December 23, 2021
    Applicants: Tyco Electronics (Shanghai) Co. Ltd., TE Connectivity Services GmbH, Kunshan League Automechanism Co., Ltd.
    Inventors: Lei Zhou, Huabin Du, Dandan Zhang, Roberto Francisco-Yi Lu, Lvhai Hu, Du Wen, Sonny O. Osunkwo, Haidong Wu, Zhirong Wan, Cheng Wang
  • Publication number: 20210373970
    Abstract: A data processing method applied to a data processing apparatus is provided. The data processing apparatus includes a central processing unit and a sensor processing unit set, and the sensor processing unit set includes at least one sensor processing unit. This solution resolves problems such as high costs and high function requirements, or overload and frequent system breakdown caused by massive data processing tasks in an existing data processing architecture. A data processing apparatus and a computer-readable storage medium are also provided.
    Type: Application
    Filed: August 13, 2021
    Publication date: December 2, 2021
    Inventors: Zheng ZHOU, Hui NI, Lei WAN, Yongqiang GAO
  • Patent number: 11191107
    Abstract: Embodiments of the present disclosure provide a backoff window adjustment method, and an apparatus. In downlink transmission, a base station obtains a trigger condition for adjusting a length of a backoff window on a first channel, and adjusts the length of the backoff window of the base station on the first channel according to the obtained trigger condition for adjusting the length of the backoff window on the first channel. In uplink transmission, a user equipment (UE) obtains a trigger condition for adjusting a length of a backoff window on a first channel, and adjusts the length of the backoff window of the UE on the first channel according to the obtained trigger condition for adjusting the length of the backoff window on the first channel.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: November 30, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Meiying Yang, Zuomin Wu, Sha Ma, Qiang Li, Lei Wan
  • Patent number: 11178275
    Abstract: A method and an apparatus for detecting an abnormality of a caller are provided. The method includes at the beginning of a call, acquiring, by a terminal device, real voice/video data of a call object who needs abnormality detection and a corresponding pre-trained multi-stage neural network detection model, during the call, collecting, by the terminal device, call data according to a preset data collection policy, for each call object, inputting the currently collected call data and the real voice/video data of the call object into the model of the call object, and determining whether the call object is abnormal according to a detection result output by the model, in which the call data includes image data and/or voice data, and an identification manner adopted by the model includes face identification, voiceprint identification, limb movement identification, and/or lip language identification.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: November 16, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chengjun Wang, Xin Liu, Feng Tang, Suxia Li, Bo Peng, Lei Wan
  • Patent number: 11152425
    Abstract: A memory device includes a cross-point array of spin-torque transfer MRAM cells. First rail structures laterally extend along a first horizontal direction. Each of the first rail structures includes a vertical stack including, from bottom to top, a first electrically conductive line, a reference layer having a fixed magnetization direction, and a tunnel barrier layer. Second rail structures laterally extend along a second horizontal direction. Each of the second rail structures includes a second electrically conductive line that overlies the first rail structures. A two-dimensional array of pillar structures is located between a respective one of the first rail structures and a respective one of the second rail structures. Each of the pillar structures includes a free layer having energetically stable magnetization orientations that are parallel or antiparallel to the fixed magnetization direction.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: October 19, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Lei Wan, Jordan Katine, Tsai-Wei Wu
  • Publication number: 20210313392
    Abstract: A memory array is provided that includes a plurality of word lines and a plurality of bit lines, and a plurality of memory cells each including a corresponding magnetic memory element coupled in series with a corresponding selector element. Each memory cell is coupled between one of the word lines and one of the bit lines. Each memory cell has a half-pitch F, and comprises an area between 2F2 and 4F2.
    Type: Application
    Filed: June 22, 2021
    Publication date: October 7, 2021
    Applicant: SanDisk Technologies LLC
    Inventors: Lei Wan, Tsai-Wei Wu, Jordan A. Katine
  • Publication number: 20210298022
    Abstract: The available transmission resources on a downlink-shared channel are divided into resource blocks, each resource block comprising a predetermined number of sub-carriers during a predetermined time period. The resource blocks are subdivided into localized resource blocks and distributed resource blocks. A user requiring sufficient resources can be allocated a plurality of said localized resource blocks. A user who would require only a small number of said localized resource blocks can instead be allocated subunits of a plurality of said distributed resource blocks.
    Type: Application
    Filed: June 1, 2021
    Publication date: September 23, 2021
    Inventors: Stefan Parkvall, Lei Wan, Erik Dahlman
  • Publication number: 20210283087
    Abstract: The present invention provides a pharmaceutical composition for treating and/or relieving myopia, the pharmaceutical composition comprises a therapeutically effective amount of an anti-inflammatory agent and a pharmaceutically acceptable carrier; the pharmaceutical composition of the present invention is safe, and can treat and/or relieve myopia by the anti-inflammatory agent. The pharmaceutically acceptable carrier can effectively encapsulate the anti-inflammatory agent at a specific ratio, and the stability and solubility of the pharmaceutical composition can be enhanced.
    Type: Application
    Filed: March 24, 2020
    Publication date: September 16, 2021
    Applicants: China Medical University, Sundragon Biomedical Electronics Co., LTD.
    Inventors: Lei WAN, Hui-Ju LIN
  • Publication number: 20210267292
    Abstract: The present disclosure discloses a cutting structure and a sewing process for back wearing protective clothing. An eye gap is formed in the top of a cap cutting piece. An upper neck interface is formed in the bottom of the cap cutting piece. Cap top seams which are in left-right symmetry are formed in the two sides of the eye gap. Cap openings are formed in the two sides of the lower part of the cap cutting piece. An upper right sleeve seam is formed in the upper end of one side of an upper section cutting piece. A lower right sleeve seam is formed in the lower end of one side of the upper section cutting piece. An upper left sleeve seam is formed in the upper end of the other side of the upper section cutting piece. A lower left sleeve seam is formed in the lower end of the other side of the upper section cutting piece.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 2, 2021
    Inventors: Xianbo Wang, Weili Song, Jie Shen, Lei Wan
  • Publication number: 20210239824
    Abstract: This application provides a radar signal processing method and apparatus, which are applicable to the waveform design of a millimeter-wave radar. The radar signal processing method is applicable to an apparatus, for example, a millimeter-wave radar or a chip system inside the millimeter-wave radar, and the method includes: transmitting a first radar signal on a first frequency band; transmitting a second radar signal on a second frequency band; receiving a first reflected signal and a second reflected signal, where the first reflected signal is an electromagnetic wave reflected by a target object in response to the first radar signal, and the second reflected signal is an electromagnetic wave reflected by the target object in response to the second radar signal; and obtaining at least one of range information, velocity information, and angle information of the target object.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 5, 2021
    Inventors: Lutao GAO, Lei WAN, Sha MA, Sida SONG
  • Publication number: 20210218191
    Abstract: An electrical connector includes an insulating body accommodating multiple first terminals. The first terminals include first and second differential signal pairs. No ground terminal is provided at one side of the first differential signal pair. Both sides of the second differential signal pair have ground terminals. The impedance of the first differential signal pair is adjusted by having a distance between the first differential signal pair and the first ground terminal less than a distance between the second differential signal pair and the first ground terminal, or by having a width of a portion of the first differential signal pair exposed out of the insulating body greater than a width of a portion of the second differential signal pair exposed out of the insulating body, or by having a distance between terminals of the first differential signal pair less than a distance between terminals of the second differential signal pair.
    Type: Application
    Filed: August 13, 2020
    Publication date: July 15, 2021
    Inventors: Jie Liao, Lei Wan, Chang Wei Ke, Jun Kang Zhong
  • Patent number: 11056534
    Abstract: A memory array is provided that includes a first memory level having a plurality of memory cells each including a corresponding magnetic memory element coupled in series with a corresponding selector element, and a plurality of vias, each of the vias coupled in series with a corresponding one of the memory cells.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: July 6, 2021
    Assignee: SanDisk Technologies LLC
    Inventors: Lei Wan, Tsai-Wei Wu, Jordan A. Katine
  • Patent number: 11025379
    Abstract: The available transmission resources on a downlink-shared channel are divided into resource blocks, each resource block comprising a predetermined number of sub-carriers during a predetermined time period. The resource blocks are subdivided into localized resource blocks and distributed resource blocks. A user requiring sufficient resources can be allocated a plurality of said localized resource blocks. A user who would require only a small number of said localized resource blocks can instead be allocated subunits of a plurality of said distributed resource blocks.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: June 1, 2021
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Stefan Parkvall, Lei Wan, Erik Dahlman
  • Publication number: 20210126052
    Abstract: A memory device includes a cross-point array of spin-torque transfer MRAM cells. First rail structures laterally extend along a first horizontal direction. Each of the first rail structures includes a vertical stack including, from bottom to top, a first electrically conductive line, a reference layer having a fixed magnetization direction, and a tunnel barrier layer. Second rail structures laterally extend along a second horizontal direction. Each of the second rail structures includes a second electrically conductive line that overlies the first rail structures. A two-dimensional array of pillar structures is located between a respective one of the first rail structures and a respective one of the second rail structures. Each of the pillar structures includes a free layer having energetically stable magnetization orientations that are parallel or antiparallel to the fixed magnetization direction.
    Type: Application
    Filed: October 29, 2019
    Publication date: April 29, 2021
    Inventors: Lei WAN, Jordan KATINE, Tsai-Wei WU
  • Patent number: 10991879
    Abstract: A phase change memory cell includes a first electrode, a second electrode located over the first electrode, a vertical pillar structure located between the first and second electrodes, the pillar structure containing a first phase change memory (PCM) material portion, a second PCM material portion and an intermediate electrode located between the first PCM material portion and the second PCM material portion, and a resistive liner containing a first segment electrically connected in parallel to the first PCM material portion between the first electrode and the intermediate electrode, and a second segment electrically connected in parallel to the second PCM material portion between the intermediate electrode and the second electrode. The first PCM material portion has a different electrical resistance than the second PCM material portion, and the first segment of the resistive liner has a different electrical resistance than the second segment of the resistive liner.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: April 27, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ricardo Ruiz, Lei Wan, John Read, Zhaoqiang Bai, Mac Apodaca
  • Patent number: 10904051
    Abstract: Embodiments of this application provide a method for sending carrier information, and the method includes: performing, by a base station, subcarrier mapping on a first carrier in a first subcarrier mapping manner, where subcarriers corresponding to the first subcarrier mapping manner have frequency offset of a first offset value relative to subcarriers corresponding to a second subcarrier mapping manner, and the subcarriers corresponding to the second subcarrier mapping manner are symmetric with respect to a carrier center frequency of the first carrier, and include no subcarrier on the carrier center frequency of the first carrier; and sending, by the base station, indication information to a terminal, where the indication information carries information about the first offset value.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: January 26, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wei Sun, Zhiheng Guo, Xinqian Xie, Xingqing Cheng, Lei Wan, Lei Guan
  • Publication number: 20200411589
    Abstract: A memory array is provided that includes a first memory level having a plurality of memory cells each including a corresponding magnetic memory element coupled in series with a corresponding selector element, and a plurality of vias, each of the vias coupled in series with a corresponding one of the memory cells.
    Type: Application
    Filed: July 2, 2019
    Publication date: December 31, 2020
    Applicant: SanDisk Technologies LLC
    Inventors: Lei Wan, Tsai-Wei Wu, Jordan A. Katine
  • Publication number: 20200411754
    Abstract: A phase change memory cell includes a first electrode, a second electrode located over the first electrode, a vertical pillar structure located between the first and second electrodes, the pillar structure containing a first phase change memory (PCM) material portion, a second PCM material portion and an intermediate electrode located between the first PCM material portion and the second PCM material portion, and a resistive liner containing a first segment electrically connected in parallel to the first PCM material portion between the first electrode and the intermediate electrode, and a second segment electrically connected in parallel to the second PCM material portion between the intermediate electrode and the second electrode. The first PCM material portion has a different electrical resistance than the second PCM material portion, and the first segment of the resistive liner has a different electrical resistance than the second segment of the resistive liner.
    Type: Application
    Filed: June 26, 2019
    Publication date: December 31, 2020
    Inventors: Ricardo RUIZ, Lei WAN, John READ, Zhaoqiang BAI, Mac APODACA