Abstract: A method of fabricating an integrated circuit having active components, conductors and isolation regions on a substrate is disclosed, including forming a portion of at least one of the isolation regions to expose a first area of the substrate, depositing a mask layer over the integrated circuit including the first area, forming the mask layer to expose a second area of the substrate within the first area, converting a portion of the substrate to a selectively etchable material, where the selectively etchable material lies in an area subjacent to the second area and extends only partially to the bottom surface of the substrate, selectively etching the selectively etchable material to form a void, removing the mask layer to expose the isolation region, depositing a conductive layer over all exposed surfaces of the substrate comprising the void and the isolation region, depositing a dielectric layer over the conductive layer extending at least to the height of the isolation region, polishing the surface of the d

Abstract: Silicon carbide (SiC) is used as the stop layer for the chemical-mechanical polishing used to planarize the surface of interlevel dielectrics, making the resistance of the vias more uniform. Alternatively, silicon carbonitride or silicon carboxide can be used in place of silicon carbide.

Abstract: A method of anodizing a lightly doped wafer wherein there is provided a lightly p-typed doped silicon wafer having a frontside and a backside. A p-type region is formed on the backside doped sufficiently to avoid inversion to n-type when a later applied current density of predetermined maximum value is applied to the backside. The wafer is placed in the electrolyte of a chamber having an electrolyte and having a pair of electrodes, preferably platinum, on opposite sides of the wafer and in the electrolyte. The current of predetermined value is passed between the electrodes and through the wafer, the current being sufficient to cause pores to form on the frontside of the wafer. The chamber preferably has first and second regions, one of the electrodes being disposed in one of the regions and the other electrode being disposed in the other regions with the wafer hermetically sealing the first region from the second region.

Abstract: A method of selectively forming porous silicon regions (106) in a silicon substrate (100). A masking layer (104) of SiC is deposited by PECVD over the substrate (100) using an organosilicon precursor gas such as trimethylsilane, silane/methane, or tetramethylsilane at a temperature between 200-500.degree. C. The masking layer (104) of SiC is then patterned and etched to expose the region of the substrate (100) where porous silicon is desired. An anodization process is performed to convert a region of the substrate to porous silicon (106). The SiC masking layer (104) withstands the HF electrolyte of the anodization process with little to no degradation.

Abstract: Acetylene containing poly(p-phenyleneacetylene) (PPA) - based light-emitting diodes (LEDs) are provided. The LEDs are fabricated by coating a hole-injecting electrode, preferably an indium tin oxide (ITO) coated glass substrate, with a PPA polymer, such as a 2,5-dibutoxy or a 2,5-dihexoxy derivative of PPA, dissolved in an organic solvent. This is then followed by evaporating a layer of material capable of injecting electrons, such as Al or Al/Ca, onto the polymer to form a base electrode. This composition is then annealed to form efficient EL diodes.

Abstract: Acetylene containing poly(p-phenyleneacetylene) (PPA) - based light-emitting diodes (LEDs) are provided. The LEDs are fabricated by coating a hole-injecting electrode, preferably an indium tin oxide (ITO) coated glass substrate, with a PPA polymer, such as a 2,5-dibutoxy or a 2,5-dihexoxy derivative of PPA, dissolved in an organic solvent. This is then followed by evaporating a layer of material capable of injecting electrons, such as A1 or A1/Ca, onto the polymer to form a base electrode. This composition is then annealed to form efficient EL diodes.