Patents by Inventor Leo M. Higgins

Leo M. Higgins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5343074
    Abstract: A semiconductor device (10) includes a voltage distribution ring (20) attached to a plurality of leads (16). The ring is made up of an insulating layer (24), preferably polyimide, and a metal layer (22), preferably gold-plated copper foil. The ring may also include intervening adhesive layers (not illustrated). The ring surrounds a semiconductor die (12) and is electrically coupled to bond pads (14) of the die by wire bond (18). In various embodiment of the invention, the ring may be segmented to distribute two different voltages, such as power and ground; the ring may include slots to expose underlying portions of the leads; and the ring may be attached to either the top surface or bottom surface of the leads.
    Type: Grant
    Filed: October 4, 1993
    Date of Patent: August 30, 1994
    Assignee: Motorola, Inc.
    Inventors: Leo M. Higgins, III, Aubrey K. Sparkman
  • Patent number: 5291062
    Abstract: An area array semiconductor device (10) having a lid with functional I/O contacts can be manufactured. In one embodiment, a semiconductor die (12) is mounted in a die cavity (16) of a substrate (14). A plurality of wire bonds (20) connect the die to conductive traces (18) on a surface of the substrate. A lid (22) having conductive traces (26) on an inner surface, which are electrically interconnected to an area array of contact pads (28) on an outer surface by a plurality of plated through-holes (30), is attached to the substrate with an anisotropic conductive adhesive (32). The adhesive electrically connects the conductive traces on the substrate to the conductive traces on the lid. A plurality of conductive pins (34) are attached to the area array of contact pads to provide one method of mounting the device to a board.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: March 1, 1994
    Assignee: Motorola, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5289032
    Abstract: Deformation of TAB tapes due to temperature changes is prevented by thermo-mechanical leads. In one embodiment of the invention, a semiconductor device (30) includes an electronic component (31) and a TAB tape. The tape includes a carrier film (12) and electrical leads (20) formed on the carrier film. The electrical leads are electrically coupled to the electronic component. Also included on the carrier film are thermo-mechanical leads (32) which are formed in opposing regions of the carrier film, regions which are typically void of leads. The thermo-mechanical leads have approximately the same lead pitch as the electrical leads in order to provide a uniform distribution of stresses across the TAB tape upon exposure to varying temperatures.
    Type: Grant
    Filed: August 16, 1991
    Date of Patent: February 22, 1994
    Assignee: Motorola, Inc.
    Inventors: Leo M. Higgins, III, Maurice S. Karpman
  • Patent number: 5221858
    Abstract: A TAB semiconductor device (10) has a ground plane which is electrically coupled to ground leads without traditional conductive vias. Instead of using vias, a ground plane (34) has a plurality of ground leads (36) embossed on a surface of the ground plane in a first TAB leadframe (14), thereby forming one monolithic ground plane assembly. The ground leads are shaped to form inner lead portions (46) and outer lead portions (48) which are bonded to a semiconductor die (38) and a substrate (not illustrated), respectively. A second TAB leadframe (12) forms signal leads (16). The two leadframes are superimposed with each other to form a composite, multilayered TAB leadframe structure. Improved electrical and physical continuity between the ground leads and the ground plane help to lower lead inductance.
    Type: Grant
    Filed: February 14, 1992
    Date of Patent: June 22, 1993
    Assignee: Motorola, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5212402
    Abstract: A semiconductor device (10) has a decoupling capacitor (55) which is formed of a ground paddle (37), a dielectric element (57), and a power paddle (23). The power paddle is formed as a conductive element of a first TAB leadframe (12) and is contiguous with power leads (19). The first TAB leadframe also includes signal leads (16). The ground paddle is formed as a conductive element of a second TAB leadframe (14) and is contiguous with ground leads (36). The two leadframes are superimposed with one another to form the decoupling capacitor and to intersperse the ground leads with the power and signal leads. In one embodiment of the invention, power paddle (23) is raised above the leads to accommodate the dielectric element. The invention permits all power and all ground leads to be electrically coupled to the decoupling capacitor while keeping the decoupling capacitor very close to a semiconductor die (38).
    Type: Grant
    Filed: February 14, 1992
    Date of Patent: May 18, 1993
    Assignee: Motorola, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5173764
    Abstract: A semiconductor device (20) has reduced die stress by incorporating a lid (30) which constrains the expansion and contraction of an encapsulant. In one embodiment, a semiconductor die (22) having an active surface (23) is coupled to a plurality of leads (24). An encapsulant (28) is disposed on the active surface. The lid (30) overlies the active surface (23) and is adhesively coupled to the semiconductor die (22) by the encapsulant (28). The lid is of a material which has a coefficient of thermal expansion which closely approximates that of the semiconductor die in order to prevent stress build-up in the die which is normally caused by higher rates of expansion and contraction of the encapsulant in comparison to the those of the semiconductor die.
    Type: Grant
    Filed: April 8, 1991
    Date of Patent: December 22, 1992
    Assignee: Motorola, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5134364
    Abstract: A test probe for testing electronic circuits is provided with a flexible conductive pad disposed at the end of the test probe. The flexible conductive pad is resilient so that when it makes physical and electrical contact with an electronic circuit, it compresses and does not damage either the electrical circuit or the probe itself.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: July 28, 1992
    Assignee: Prime Computer, Inc.
    Inventors: Maurice S. Karpman, Leo M. Higgins, III
  • Patent number: 5132780
    Abstract: A heat sink apparatus for convective cooling of circuit packages or components by direct impinging fluid operation employing a housing having an inlet port and a plurality of radially fluid flow passages communicating with the inlet port with each passage also having an outlet port. A fluid deflection member is supported with the housing in line with the inlet port and is provided with a deflection surface adapted to redirect the fluid flow from the inlet port to the air flow passages.
    Type: Grant
    Filed: April 3, 1991
    Date of Patent: July 21, 1992
    Assignee: Prime Computer, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5117069
    Abstract: A high density multi-level printed wiring board having inter-level electrical connections made by via interconnect holes which are drilled or punched through only those layers of the wiring board that separate the two layers containing the conductors which are to be connected and said holes being filled with a low-resistance silver-filled conductive epoxy.
    Type: Grant
    Filed: September 28, 1990
    Date of Patent: May 26, 1992
    Assignee: Prime Computer, Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 5029325
    Abstract: A first plurality of contacts are disposed on a first surface of a flexible tape in a pattern matching the pattern of the contacts of a semiconductor die. A second plurality of contacts are disposed on a second surface of the flexible tape in a pattern matching the pattern of the contacts of a substrate. The first and second plurality of contacts are then coupled by conductive lines disposed on the surfaces of the flexible tape and extending through the conductive tape.
    Type: Grant
    Filed: August 31, 1990
    Date of Patent: July 2, 1991
    Assignee: Motorola, Inc.
    Inventors: Leo M. Higgins, III, Michael B. McShane
  • Patent number: 5019880
    Abstract: A heat sink apparatus for convective cooling of circuit packages or components by direct impinging fluid operation employing a housing having an inlet port and a plurality of radially fluid flow passages communicating with the inlet port with each passage also having an outlet port. A fluid deflection member is supported with the housing in line with the inlet port and is provided with a deflection surface adapted to redirect the fluid flow from the inlet port to the air flow passages.
    Type: Grant
    Filed: January 7, 1988
    Date of Patent: May 28, 1991
    Assignee: Prime Computer, Inc.
    Inventor: Leo M. Higgins, III.
  • Patent number: 4967314
    Abstract: A high density multi-level printed wiring board having inter-level electrical connections made by via interconnect holes which are drilled or punched through only those layers of the wiring board that separate the two layers containing the conductors which are to be connected and said holes being filled with a low-resistance silver-filled conductive epoxy.
    Type: Grant
    Filed: November 1, 1989
    Date of Patent: October 30, 1990
    Assignee: Prime Computer Inc.
    Inventor: Leo M. Higgins, III
  • Patent number: 4727410
    Abstract: A multifaceted package is disclosed that permits VLSI and VHSIC integrated circuits in the form of integrated circuit die or chip carries to be mounted on the faces of the package to form a high-density circuit package. The package comprises a plurality of ceramic layers which are cofired and fused together to form a monolithic body having a plurality of planar faces. The body may have a cubic, pyramidal, pentagonal, or other solid geometric form and may have integrated circuit elements disposed on one or more faces of the body. Integrated circuit die or dies discrete electrical components such as chip carriers, resistors, etc. may be mounted to faces of the body and a lid may be provided for hermetic encapsulation of integrated circuit die between lids and respective faces of the body.
    Type: Grant
    Filed: November 23, 1983
    Date of Patent: February 23, 1988
    Assignee: Cabot Technical Ceramics, Inc.
    Inventor: Leo M. Higgins, III