Patents by Inventor Li Cheng

Li Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190281480
    Abstract: A user equipment (UE) is configured with at least one bandwidth part (BWP) specific configuration information. The UE receives a configuration information specific to the bandwidth part (BWP). The configuration information configures an initial value of a beam failure detection (BFD) timer and a beam failure indication (BFI) count threshold. The UE starts or re-starts the BFD timer from the initial value when receiving a beam failure indication (BFI) from a lower sublayer, and counts a number of the received BFIs using a BFI counter. The UE resets the BFI counter to zero when receiving a reconfiguration information. The reconfiguration information, that is specific to the BWP, re-configures at least one of the initial value of the BFD timer and the BFI count threshold.
    Type: Application
    Filed: March 9, 2019
    Publication date: September 12, 2019
    Inventors: CHIA-HUNG WEI, CHIE-MING CHOU, CHIEN-CHUN CHENG, YU-HSIN CHENG, HUNG-CHEN CHEN, HENG-LI CHIN
  • Publication number: 20190281242
    Abstract: An active pixel sensor, a driving method thereof, an imager and an electronic device are disclosed. The active pixel sensor includes: a photosensitive element, configured to convert a received light signal into an electrical signal; a follower circuit, connected with the photosensitive element and configured to convert the electrical signal into an output voltage, the follower circuit including a source follower transistor; and an adjustment circuit, connected with the follower circuit and configured to collect the output voltage of the follower circuit and to adjust a bias current of the source follower transistor according to the output voltage, so as to adjust the output voltage to a preset range.
    Type: Application
    Filed: January 30, 2018
    Publication date: September 12, 2019
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chih Jen CHENG, Pengpeng WANG, Wei LIU, Xiaoliang DING, Rui XU, Changfeng LI
  • Patent number: 10411352
    Abstract: The present invention discloses an antenna tuning system and method thereof. The method comprises the following steps: choosing a parasitic antenna that combined with a main antenna, the strongest received signal strength indicator of a target station is detected; controlling the selected parasitic antenna that combined with a main antenna, to generate a scattering resonance through turning on or off a switch unit; and controlling a diffraction radiation pattern between the main antenna and the selected parasitic antenna through adjusting a load of a designed circuit.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: September 10, 2019
    Assignee: ACCTON TECHNOLOGY CORPORATION
    Inventors: I-Ru Liu, Wen-Pin Lo, Hsin-Hsiung Kang, Yang-Te Fu, Chang-Cheng Liu, Yen-Lin Liao, Yi-Chang Chen, Li-Hua Chou
  • Patent number: 10407673
    Abstract: A mutant of EndoS2 includes one or more mutations in the sequence of a wild-type EndoS2 (SEQ ID NO:1), wherein the one or more mutations are in a peptide region located within residues 133-143, residues 177-182, residues 184-189, residues 221-231, and/or residues 227-237, wherein the mutant of EndoS2 has a low hydrolyzing activity and a high tranglycosylation activity, as compared to those of the wild-type EndoS2. A method for preparing an engineered glycoprotein using the mutant of EndoS2 includes coupling an activated oligosaccharide to a glycoprotein acceptor. The activated oligosaccharide is a glycan oxazoline.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: September 10, 2019
    Assignees: CHO Pharma Inc., Academia Sinica
    Inventors: Nan-Horng Lin, Lin-Ya Huang, Sachin S Shivatare, Li-Tzu Chen, Chi-Huey Wong, Chung-Yi Wu, Ting Cheng
  • Patent number: 10403550
    Abstract: In a method, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers are etched at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a first source/drain space in which the second semiconductor layers are exposed. A dielectric layer is formed at the first source/drain space, thereby covering the exposed second semiconductor layers. The dielectric layer and part of the second semiconductor layers are etched, thereby forming a second source/drain space. A source/drain epitaxial layer is formed in the second source/drain space. At least one of the second semiconductor layers is in contact with the source/drain epitaxial layer, and at least one of the second semiconductor layers is separated from the source/drain epitaxial layer.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: September 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Li Chiang, Chao-Ching Cheng, Chih-Liang Chen, Tzu-Chiang Chen, Ta-Pen Guo, Yu-Lin Yang, I-Sheng Chen, Szu-Wei Huang
  • Patent number: 10401815
    Abstract: A method includes determining a scan rate associated with each of a plurality of input/output (I/O) modules. The method also includes transmitting a read request message to at least one expansion controller that controls the plurality of I/O modules, the read request message having an align index field. The method further includes receiving a reply message from the at least one expansion controller for each of the I/O modules for which a value of the align index field of the read request message is an even multiple of the associated scan rate. The method also includes incrementing the value of the align index field. In addition, the method includes repeating the transmitting, receiving, and incrementing until the value of the align index field is greater than a threshold, wherein the threshold is a least common multiple of the scan rates of the plurality of I/O modules.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: September 3, 2019
    Assignee: Honeywell International Inc.
    Inventors: Yanqiu Wang, Chengtao Zhang, Fei Cheng, Yi Cheng, Li Chen, Mei Fa Chen
  • Patent number: 10396063
    Abstract: In some embodiments, a first cell layout and a second cell layout are provided and combined into a third cell layout. Each of the first cell layout and the second cell layout includes a higher power line, a lower power line, an output pin, at least one up transistor and at least one down transistor formed to electrically couple the output pin to the higher power line and the output pin to the lower power line, respectively. The at least one up transistor and the at least one down transistor of the second cell layout include a gate line. For the combining, the gate line is non-selectively electrically coupled to the output pin of the first cell layout to form a first node. A design layout in which the third cell layout is used at different locations is generated.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: August 27, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fong-Yuan Chang, Lee-Chung Lu, Yi-Kan Cheng, Sheng-Hsiung Chen, Po-Hsiang Huang, Shun Li Chen, Jeo-Yen Lee, Jyun-Hao Chang, Shao-Huan Wang, Chien-Ying Chen
  • Publication number: 20190257786
    Abstract: A printed flexible PH sensor is provided. The printed flexible PH sensor includes a flexible substrate. A working electrode is disposed on the flexible substrate, and the working electrode includes a first silver layer formed on the flexible substrate by an ink-jet printing process, a second silver layer formed on the first silver layer by a silver mirror reaction, and a metal oxide layer disposed on the second silver layer of an end portion of the working electrode. A reference electrode is disposed on the flexible substrate, and the reference electrode includes the first silver layer and the second silver layer formed on the first silver layer, and a silver chloride layer totally covering the second silver layer. A method for fabricating the printed flexible PH sensor is also provided.
    Type: Application
    Filed: May 1, 2019
    Publication date: August 22, 2019
    Inventors: Jia-Chyi PAN, Zi-Li KUO, Yu-Ting CHENG, Yu-Min FU
  • Publication number: 20190260963
    Abstract: A display panel, a display device and an image pickup method therefor are provided. The display panel includes a display region and an image pickup apparatus, wherein in a plan view of the display panel, at least a portion of the image pickup apparatus is located in the display region.
    Type: Application
    Filed: October 10, 2017
    Publication date: August 22, 2019
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuzhen GUO, Xue DONG, Haisheng WANG, Yingming LIU, Xiaoliang DING, Chun Wei WU, Chih-Jen CHENG, Yanling HAN, Rui XU, Changfeng LI, Yunke QIN, Pinchao GU
  • Patent number: 10390244
    Abstract: A method of measuring radio link quality in a D2D user equipment in a wireless communication system including an eNB and at least two D2D user equipments, UEs: a first D2D UE receives a discovery packet from a second D2D UE; and the first D2D UE measures the radio link quality based on the reception of the discovery packet and generates a wireless link quality indication, which indicates sidelink quality between the first D2D UE and the second D2D UE; wherein the at least two D2D user equipments include an alternative UE-to-network relay D2D UE and a remote D2D UE; and the first D2D UE is the remote D2D UE, and the second D2D UE is the alternative UE-to-network relay D2D UE; or the first D2D UE is the alternative UE-to-network relay D2D UE, and the second D2D UE is the remote D2D UE.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: August 20, 2019
    Assignee: Alcatel Lucent
    Inventors: Fang-Chen Cheng, Dong Li, Yong Liu
  • Patent number: 10386522
    Abstract: An apparatus and a method for measuring a speed of sound in a fluid in a well bore may include a frame adapted to receive the fluid there through are provided. The apparatus includes an acoustic source mounted on the frame; an acoustic detector to measure a signal propagating through the fluid, the acoustic detector disposed proximate the frame at a known distance from the acoustic source; and a test circuit adapted to synchronize the acoustic detector with a signal propagating through the frame. A method to determine physical properties of a fluid in a geological formation including a shear wave anisotropy in the geological formation and the formation composition using the fluid density and the fluid speed of sound is also provided.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: August 20, 2019
    Assignee: Halliburton Energy Services, Inc.
    Inventors: Li Gao, Michael T. Pelletier, Thurairajasingam Rajasingam, Arthur Cheng, Paul Cooper
  • Patent number: 10385061
    Abstract: A compound and use thereof are provided. The compound of the invention has formula I shown below. Each variable in formula I, is defined in the specification. The invention also provides a method for treating renal and cardiac dysfunction. The method includes administering to a subject in need thereof an effective amount of the compound of the invention and a pharmaceutical acceptable salt and carrier.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: August 20, 2019
    Assignee: Phytohealth Corporation
    Inventors: Kuo-Hsiung Lee, Rong-Tsun Wu, Xiao-Ming Yang, Yu Zhao, Lin-Yea Horng, Hui-Ching Sung, Pei-Lun Hsu, Chien-Hsin Cheng, Yi-Li Lee
  • Publication number: 20190252200
    Abstract: A method of fabricating an integrated circuit (IC) uses a first lithography technique having a first resolution and a second lithography technique having a second resolution lower than the first resolution. The method includes deriving a graph from an IC layout, the graph having vertices and edges that connect some of the vertices, the vertices representing IC patterns in the IC layout, the edges representing spacing between the IC patterns that are smaller than the second resolution. The method further includes classifying the edges into at least two types, a first type of edges representing spacing that is smaller than the first resolution, a second type of edges representing spacing that is equal to or greater than the first resolution but smaller than the second resolution.
    Type: Application
    Filed: April 24, 2019
    Publication date: August 15, 2019
    Inventors: Ken-Hsien Hsieh, Wen-Li Cheng, Dong-Yo Jheng, Chih-Ming Lai, Ru-Gun Liu
  • Patent number: 10381296
    Abstract: At least some embodiments of the present disclosure relate to a substrate for packaging a semiconductor device. The substrate includes a first dielectric layer having a first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer, and a conductive post. The first patterned conductive layer includes a first conductive pad and a second conductive pad. The conductive post is disposed on the first conductive pad. The conductive post includes a first portion and a second portion. The first portion and the second portion of the conductive post are exposed by the first dielectric layer. The first portion of the conductive post has a first width corresponding to a top line width of the first portion and the second portion of the conductive post has a width. The width of the second portion of the conductive post is greater than the first width of the first portion of the conductive post.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: August 13, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Li Chuan Tsai, Chih-Cheng Lee
  • Publication number: 20190245031
    Abstract: A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional trench array with a plurality of segments defined therein. Each of the plurality of segments has an array of a plurality of recesses extending along the substrate, where the plurality of segments are rotationally symmetric about a center of the two-dimensional trench array. A first conducting layer is presented over the surface and a bottom and sidewalls of the recesses and is insulated from the substrate by a first dielectric layer. A second conducting layer is presented over the first conducting layer and is insulated by a second dielectric layer. First and second contacts respectively connect to an exposed top surface of the first conducting layer and second conducting layer. A third contact connects to the substrate within a local region to the capacitor structure.
    Type: Application
    Filed: April 18, 2019
    Publication date: August 8, 2019
    Inventors: Jyun-Ying Lin, Hsin-Li Cheng, Jing-Hwang Yang, Felix Ying-Kit Tsui, Chien-Li Kuo
  • Patent number: 10369674
    Abstract: Vibratory treatment apparatus including a first receptacle arranged to receive media for vibratory treatment of the article, the first receptacle defining a first aperture; and a first valve positioned at the first aperture of the first receptacle, the first valve being arranged to allow passage of the article there through and to prevent the flow of media through the first aperture.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: August 6, 2019
    Assignees: ROLLS-ROYCE plc, ROLLS-ROYCE DEUTSCHLAND LTD & CO KG, ROLLS-ROYCE MARINE AS
    Inventors: João Paulo Siqueira Cezario, Chow Cher Wong, Dennis Tan Cheng Cheh, Wei Chuen Wallace Ong, Goetz G Feldmann, Ampara Aramcharoen, Kok Li Tan, Chao Yen Liew
  • Patent number: 10371896
    Abstract: An eyepiece for projecting an image to an eye of a viewer includes a first planar waveguide positioned in a first lateral plane, a second planar waveguide positioned in a second lateral plane adjacent the first lateral plane, and a third planar waveguide positioned in a third lateral plane adjacent the second lateral plane. The first waveguide includes a first diffractive optical element (DOE) coupled thereto and disposed at a lateral position. The second waveguide includes a second DOE coupled thereto and disposed at the lateral position. The third waveguide includes a third DOE coupled thereto and disposed at the lateral position. The eyepiece further includes a first optical filter disposed between the first waveguide and the second waveguide at the lateral position, and a second optical filter positioned between the second waveguide and the third waveguide at the lateral position.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: August 6, 2019
    Assignee: MAGIC LEAP, INC.
    Inventors: Ivan Li Chuen Yeoh, Lionel Ernest Edwin, Hui-Chuan Cheng
  • Publication number: 20190233441
    Abstract: Compounds of Formula 0, Formula I and Formula II and methods of use as Janus kinase inhibitors are described herein.
    Type: Application
    Filed: April 2, 2019
    Publication date: August 1, 2019
    Applicant: Genentech, Inc.
    Inventors: Nicholas C. Ray, Yun-Xing Cheng, Christine Edwards, Simon C. Goodacre, Wei Li, Snahel Patel, Matthew W. Cartwright, Mohammed Sajad, Po-wai Yuen, Mark E. Zak
  • Patent number: 10364165
    Abstract: The present invention provides a method for generating hydroxyl radicals and removing organic pollutants in water by utilizing an organic membrane. The inventive method generates hydroxyl radicals by adopting a nitrocellulose membrane as a photocatalytic material, placing the nitrocellulose membrane in water, illuminating with the sun or a sunlamp having a wavelength above 280 nm as a light source, and causing the nitrocellulose membrane to undergo a photochemical reaction at the membrane surface, and the generation rate of hydroxyl radicals can be achieved by adjusting the surface area of the membrane and a light intensity. The generated hydroxyl radicals can remove phenol, bisphenol A, thiamphenicol and other typical organic pollutants in water very well.
    Type: Grant
    Filed: June 25, 2016
    Date of Patent: July 30, 2019
    Assignee: HENAN POLYTECHNIC UNIVERSITY
    Inventors: Chao Tai, Jiaping She, Shao Dong Zhang, Tong Qian Zhao, Dang Yu Song, Lei Feng, Yu Xiang Mao, Yong An Qi, Guo Cheng Zhang, Li Jun Zhang, Juan Wang
  • Publication number: 20190229124
    Abstract: A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate disposed on the dielectric layer, a control gate. A second dielectric layer is disposed between the floating gate and the control gate, having one of a silicon nitride layer, a silicon oxide layer and multilayers thereof. A third dielectric layer is disposed between the second dielectric layer and the control gate, and includes a dielectric material having a dielectric constant higher than silicon nitride.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 25, 2019
    Inventors: Wei Cheng WU, Li-Feng TENG