Patents by Inventor Li Cheng

Li Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240101873
    Abstract: The present disclosure discloses a high-temperature fast-curing starch-based adhesive for particleboards and a preparation method thereof, belonging to the technical field of adhesive preparation. The low viscosity of the starch-based adhesive is ensured by selecting a crosslinking monomer which does not self-crosslink in a reaction process in the present disclosure, and a binary crosslinking agent matched with the crosslinking monomer is added before use to be quickly crosslinked with the crosslinking monomer at high temperature so as to ensure better thermosetting property and water resistance as well as faster curing speed of the starch-based adhesive at the same time, which meets the requirements of the particleboards for the adhesive, solves the problem of long curing time of the existing starch-based adhesives at high temperatures, further shortens the curing time of the starch-based adhesives to about 60 s, and improves the production efficiency of the particleboards.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Inventors: Li CHENG, Zhengbiao GU, Yan HONG, Zhaofeng LI, Caiming LI, Xiaofeng BAN, Junnan JIN, Dongdong WU, Mengwei ZHANG, Jian YIN
  • Publication number: 20240086087
    Abstract: Systems, methods, circuits, and apparatuses for managing integrated circuits in memory devices are provided. In one aspect, a system includes a semiconductor device configured to store data, and a controller communicatively coupled to the semiconductor device. The controller is configured to send, to the semiconductor device, an instruction requesting transmission of the data; in response to determining that a predetermined time duration has elapsed after sending the instruction, initiate transmission of a read enable signal to the semiconductor device; receive, from the semiconductor device, a data strobe signal; and, in response to determining that the data strobe signal has a frequency matching a frequency of the read enable signal, read the data from the semiconductor device.
    Type: Application
    Filed: September 8, 2022
    Publication date: March 14, 2024
    Applicant: Macronix International Co., Ltd.
    Inventors: Shun-Li Cheng, Shih-Chou Juan
  • Publication number: 20240078732
    Abstract: A device includes a memory and one or more processors configured to process sensor data to determine a semantical context associated with the sensor data. The one or more processors are also configured to generate adjusted face data based on the determined semantical context and face data. The adjusted face data includes an avatar facial expression that corresponds to the semantical context.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Scott BEITH, Suzana ARELLANO, Michel Adib SARKIS, Matthew FISCHLER, Ke-Li CHENG, Stephane VILLETTE
  • Publication number: 20240078731
    Abstract: A device includes a memory and one or more processors configured to process image data corresponding to a user's face to generate face data. The one or more processors are configured to process sensor data to generate feature data and to generate a representation of an avatar based on the face data and the feature data. The one or more processors are also configured to generate an audio output for the avatar based on the sensor data.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Scott BEITH, Suzana ARELLANO, Michel Adib SARKIS, Matthew FISCHLER, Ke-Li CHENG, Stephane VILLETTE
  • Patent number: 11923352
    Abstract: A semiconductor device is provided. The semiconductor device comprises a first semiconductor die comprising a first capacitor, and a second semiconductor die in contact with the first semiconductor die and comprises a diode. The first semiconductor die and the second semiconductor die are arranged along a first direction, and a diode is configured to direct electrons accumulated at the first capacitor to a ground.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsin-Li Cheng, Shu-Hui Su, Yu-Chi Chang, Yingkit Felix Tsui, Shih-Fen Huang
  • Publication number: 20240070650
    Abstract: A system of generating, inheriting and destroying avatar attribute of real-name identity in metaverse and a method thereof are disclosed. In the system, a fungible token with an avatar attribute is generated, and the fungible token and real-name identity information are bound through the avatar attribute, so that the fungible token can represent the valid avatar in the metaverse; when the user triggers an event, one of operations of splitting, inheriting and destroying the fungible token can be selected based on the triggered event, so as to achieve the technical effect of improving the availability of real-name identity in the metaverse.
    Type: Application
    Filed: September 15, 2022
    Publication date: February 29, 2024
    Inventors: Tom-Hwar Cho, Li-Cheng Yeh, Chuan-Cheng Chiu
  • Publication number: 20240062467
    Abstract: Systems and techniques are described for establishing one or more virtual sessions between users. For instance, a first device can transmit, to a second device, a call establishment request for a virtual representation call for a virtual session and can receive, from the second device, a call acceptance indicating acceptance of the call establishment request. The first device can transmit, to the second device, first mesh information for a first virtual representation of a first user of the first device and first mesh animation parameters for the first virtual representation. The first device can receive, from the second device, second mesh information for a second virtual representation of a second user of the second device and second mesh animation parameters for the second virtual representation. The first device can generate, based on the second mesh information and the second mesh animation parameters, the second virtual representation of the second user.
    Type: Application
    Filed: July 3, 2023
    Publication date: February 22, 2024
    Inventors: Michel Adib SARKIS, Chiranjib CHOUDHURI, Ke-Li CHENG, Ajit Deepak GUPTE, Ning BI, Cristina DOBRIN, Ramesh CHANDRASEKHAR, Imed BOUAZIZI, Liangping MA, Thomas STOCKHAMMER, Nikolai Konrad LEUNG
  • Publication number: 20240056676
    Abstract: An electronic device plays, by using a first application, audio corresponding to a first media file, and displays a video recording interface of a second application; in response to an operation on a background music setting option, the electronic device sets background music as audio corresponding to a second audio file; in response to a first operation on a virtual button, the electronic device starts video recording, and processes the second audio file to obtain audio data of the second audio file; and in response to a second operation on the virtual button, the electronic device ends video recording, and generates a video file, where the video file includes the audio data of the second audio file and image data of an image captured by a camera, but does not include audio data of the first media file.
    Type: Application
    Filed: December 23, 2021
    Publication date: February 15, 2024
    Inventors: Haochen Zhang, Yanhui Yu, Qingliang Wu, Zhetao Zhang, Xin Zheng, Fan Yang, Qiuming Peng, Li Cheng
  • Publication number: 20240055371
    Abstract: Embodiments include a crack stopper structure surrounding an embedded integrated circuit die, and the formation thereof. The crack stopper structure may include multiple layers separated by a fill layer. The layers of the crack stopper may include multiple sublayers, some of the sublayers providing adhesion, hardness buffering, and material gradients for transitioning from one layer of the crack stopper structure to another layer of the crack stopper structure.
    Type: Application
    Filed: January 9, 2023
    Publication date: February 15, 2024
    Inventors: Der-Chyang Yeh, Kuo-Chiang Ting, Yu-Hsiung Wang, Chao-Wen Shih, Sung-Feng Yeh, Ta Hao Sung, Cheng-Wei Huang, Yen-Ping Wang, Chang-Wen Huang, Sheng-Ta Lin, Li-Cheng Hu, Gao-Long Wu
  • Patent number: 11901885
    Abstract: A PWM-based (pulse width modulation-based) overcurrent protection circuit and an operating method for the same are provided. The PWM-based overcurrent protection circuit includes a pulse-width-modulation circuit that is connected to a charge pump and a load detection circuit of a power-switch circuit. The charge pump outputs a voltage to the power-switch circuit according to a clock-voltage signal. The load detection circuit is used to detect an overcurrent flowing through the power-switch circuit according to a load at an output end of the power-switch circuit. Thus, when the load detection circuit detects the overcurrent, the pulse-width-modulation circuit controls a duty-cycle width of the charge pump, so as to suppress the voltage outputted by the charge pump. Therefore, an output voltage from the power-switch circuit can be corrected for preventing or reducing the overcurrent.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Li-Cheng Chu
  • Publication number: 20240047552
    Abstract: The present disclosure provides an embodiment of a method. The method includes patterning a substrate to form trenches; etching the substrate, thereby modifying the trenches with round tips; forming a stack including conductive layers and dielectric layers in the trenches, wherein the conductive layers and the dielectric layers alternate with one another within the stack; forming an insulating compressive film in the first trenches, thereby sealing voids in the trenches; and forming conductive plugs connected to the conductive layers, respectively.
    Type: Application
    Filed: May 17, 2023
    Publication date: February 8, 2024
    Inventors: Fu-Chiang Kuo, Hsin-Liang Chen, Hsin-Li Cheng, Ting-Chen Hsu
  • Publication number: 20240047513
    Abstract: Various embodiments of the present disclosure provide a semiconductor device structure.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 8, 2024
    Inventors: Shu-Hui SU, Hsin-Li CHENG, Felix YingKit TSUI, Yu-Chi CHANG
  • Publication number: 20240029354
    Abstract: Systems and techniques are provided for generating a texture for a three-dimensional (3D) facial model. For example, a process can include obtaining a first frame, the first frame including a first portion of a face. In some aspects, the process can include generating a 3D facial model based on the first frame and generating a first facial feature corresponding to the first portion of the face. In some examples, the process includes obtaining a second frame, the second frame including a second portion of the face. In some cases, the second portion of the face at least partially overlaps the first portion of the face. In some examples, the process includes combining the first facial feature with the second facial feature to generate an enhanced facial feature, wherein the combining is performed to enhance an appearance of select areas of the enhanced facial feature.
    Type: Application
    Filed: July 19, 2022
    Publication date: January 25, 2024
    Inventors: Ke-Li CHENG, Anupama S, Kuang-Man HUANG, Chieh-Ming KUO, Avani RAO, Chiranjib CHOUDHURI, Michel Adib SARKIS, Ning BI, Ajit Deepak GUPTE
  • Publication number: 20240030359
    Abstract: The present disclosure provides a semiconductor device, including a first semiconductor structure and a second semiconductor structure. Each of the first semiconductor structure and the second semiconductor structure includes a substrate; a through silicon via, penetrating the substrate; and a deep trench capacitor, disposed in the substrate, separated from the TSV by a distance. The deep trench capacitor includes a stack, including a dielectric layer between a pair of conductive layers in a trench; and an insulating layer, covering the stack and the trench. The insulating layer surround a plurality of voids in the trench.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Inventors: SHU-HUI SU, HSIN-LI CHENG, YINGKIT FELIX TSUI, YU-CHI CHANG, HSUAN-NING SHIH
  • Patent number: 11879071
    Abstract: The present disclosure discloses a low-viscosity thermosetting starch adhesive for particleboards, and a preparation method therefore, belonging to the technical field of adhesive preparation. The adhesive of the present invention selects N-hydroxyethyl acrylamide or acetoxyethyl methacrylate as the crosslinking monomer, which has a low degree of crosslinking in the process of adhesive preparation to avoid the problem of increasing viscosity, but can cross-link quickly during the hot pressing process, forming a network structure, and improving the water resistance of the adhesive; and furthermore, itaconic acid is added to promote the self-crosslinking reaction of the crosslinking monomer in the hot-pressing process, thus further improving the water resistance.
    Type: Grant
    Filed: June 13, 2023
    Date of Patent: January 23, 2024
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Li Cheng, Junnan Jin, Zhengbiao Gu, Zhaofeng Li, Yan Hong, Caiming Li, Xiaofeng Ban
  • Publication number: 20240021431
    Abstract: An apparatus, semiconductor device and method of manufacture are presented, wherein a hard mask layer and one or more etch stop layers are etched in an etching chamber. In an embodiment the semiconductor device is placed on a mounting platform at a first height and an etch process is performed, then the semiconductor device is moved to a second height within the chamber and a second etch process is performed, with the rotational speed of the semiconductor device reduced during movements in order to reduce the chance of cross contamination.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 18, 2024
    Inventors: Wan Hsuan Hsu, Jao Sheng Huang, Yen-Chiu Kuo, Yu-Li Cheng, Ya Tzu Chen, Neng-Jye Yang, Chun-Li Chou
  • Publication number: 20240014254
    Abstract: Various embodiments of the present application are directed towards an integrated chip (IC). The IC comprises a trench capacitor overlying a substrate. The trench capacitor comprises a plurality of capacitor electrode structures, a plurality of warping reduction structures, and a plurality of capacitor dielectric structures. The plurality of capacitor electrode structures, the plurality of warping reduction structures, and the plurality of capacitor dielectric structures are alternatingly stacked and define a trench segment that extends vertically into the substrate. The plurality of capacitor electrode structures comprise a metal component and a nitrogen component. The plurality of warping reduction structures comprise the metal component, the nitrogen component, and an oxygen component.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 11, 2024
    Inventors: Ting-Chen Hsu, Hsin-Li Cheng, Jyun-Ying Lin, Yingkit Felix Tsui, Shu-Hui Su, Shi-Min Wu
  • Publication number: 20240005607
    Abstract: Techniques are provided for generating three-dimensional models of objects from one or more images or frames. For example, at least one frame of an object in a scene can be obtained. A portion of the object is positioned on a plane in the at least one frame. The plane can be detected in the at least one frame and, based on the detected plane, the object can be segmented from the plane in the at least one frame. A three-dimensional (3D) model of the object can be generated based on segmenting the object from the plane. A refined mesh can be generated for a portion of the 3D model corresponding to the portion of the object positioned on the plane.
    Type: Application
    Filed: July 17, 2023
    Publication date: January 4, 2024
    Inventors: Ke-Li CHENG, Kuang-Man HUANG, Michel Adib SARKIS, Gerhard REITMAYR, Ning BI
  • Publication number: 20230410447
    Abstract: Systems and techniques are provided for generating a three-dimensional (3D) facial model. For example, a process can include obtaining at least one input image associated with a face. In some aspects, the process can include obtaining a pose for a 3D facial model associated with the face. In some examples, the process can include generating, by a machine learning model, the 3D facial model associated with the face. In some cases, one or more parameters associated with a shape component of the 3D facial model are conditioned on the pose. In some implementations, the 3D facial model is configured to vary in shape based on the pose for the 3D facial model associated with the face.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 21, 2023
    Inventors: Ke-Li CHENG, Anupama S, Kuang-Man HUANG, Chieh-Ming KUO, Avani RAO, Chiranjib CHOUDHURI, Michel Adib SARKIS, Ajit Deepak GUPTE, Ning BI
  • Patent number: 11834591
    Abstract: The present disclosure discloses a thermosetting starch adhesive for a wood-based panel and a preparation method therefor, and belongs to the technical field of preparation of adhesives. In the present disclosure, starch is used as a main raw material, and after acid hydrolysis thereof, a semi-continuous seed emulsion polymerization method is adopted to improve control of monomer polymerization stability. After grafting is completed, a cross-linking monomer with polymerizable double bonds and condensable methylol functional groups is added for copolymerization. The cross-linking monomer is also added in a semi-continuous manner. After the cross-linking reaction is completed, the reaction mixture is gelatinized and incubated, and finally a thermosetting adhesive which can be used for bonding of hot-pressed wood-based panels is obtained.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: December 5, 2023
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Li Cheng, Zhengbiao Gu, Yong Gu, Zhaofeng Li, Yan Hong, Caiming Li