Abstract: Voltage reference circuits are provided. A voltage reference circuit includes a first transistor, a flipped-gate transistor, a first current mirror unit, a second current mirror unit, and an output note. The first transistor is formed by a plurality of second transistors. A gate and a drain of the flipped-gate transistor are coupled to a gate and a drain of each second transistor. The first current mirror unit is configured to provide a first current to the flipped-gate transistor and a mirroring current in response to a bias current. The second current mirror unit is configured to drain a second current from the first transistor in response to the mirroring current. The output node is coupled to a source of each second transistor and the second current mirror unit, and configured to output a reference voltage. Size of the flipped-gate transistor is less than that of the first transistor.

Abstract: A semiconductor device is provided. The semiconductor device comprises a first semiconductor die comprising a first capacitor, and a second semiconductor die in contact with the first semiconductor die and comprises a diode. The first semiconductor die and the second semiconductor die are arranged along a first direction, and a diode is configured to direct electrons accumulated at the first capacitor to a ground.

Abstract: A switch control circuit includes a power switch, a first protection unit, and a second protection unit. The power switch has a first terminal coupled to a first voltage terminal for receiving a first voltage, a second terminal coupled to a second voltage terminal for receiving a second voltage, and a control terminal receives a control voltage. In a first mode, the control voltage is greater than the first voltage. In a second mode, when a voltage of the second voltage terminal is smaller than a first reference voltage, the first protection unit pulls down the control voltage to reduce a current flowing through the power switch. When the voltage of the second voltage terminal is smaller than the second reference voltage, the second protection unit pulls down the control voltage to a ground voltage.

Abstract: Disclosed is a method for preparing high-load oral paclitaxel capsule for a slow release in colon, belonging to the field of porous starch drug loading. The preparation method of the present disclosure includes the following steps: (1) dripping an ethanol solution of paclitaxel into a water phase and drying the solution to obtain an amorphous paclitaxel microsphere; (2) redissolving the paclitaxel microsphere prepared in step (1) in the ethanol solution, dispersing porous starch in the ethanol solution for adsorption, volatilizing a solvent in an oven, washing the porous starch with the ethanol solution to remove unadsorbed paclitaxel, and centrifuging same to obtain a precipitate, namely the porous starch loaded with paclitaxel; and (3) dispersing the porous starch loaded with paclitaxel prepared in step (2) in a chitosan solution, dropwise adding the solution into a phytic acid solution, and stirring the solution for 4 hours to obtain a coated capsule.

Abstract: A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional trench array with a plurality of segments defined therein. Each of the plurality of segments has an array of a plurality of recesses extending along the substrate, where the plurality of segments are rotationally symmetric about a center of the two-dimensional trench array. A first conducting layer is presented over the surface and a bottom and sidewalls of the recesses and is insulated from the substrate by a first dielectric layer. A second conducting layer is presented over the first conducting layer and is insulated by a second dielectric layer. First and second contacts respectively connect to an exposed top surface of the first conducting layer and second conducting layer. A third contact connects to the substrate within a local region to the capacitor structure.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a source region and a drain region arranged in a semiconductor substrate, where the source region is laterally separated from the drain region. A gate stack is arranged over the semiconductor substrate and between the source region and the drain region. A cap layer is arranged over the gate stack, where a bottom surface of the cap layer contacts a top surface of the gate stack. Sidewall spacers are arranged along sides of the gate stack and the cap layer. A resist protective oxide (RPO) layer is disposed over the cap layer, where the RPO layer extends along sides of the sidewalls spacers to the semiconductor substrate. A contact etch stop layer is arranged over the RPO layer, the source region, and the drain region.

Abstract: A first audio timestamp of first audio is corrected based on a first latency corresponding to the first audio, to correct a correspondence between the first audio timestamp, the first audio, and a first image. In this way, a stored correspondence between the first image and the first audio is consistent with a correspondence between a picture corresponding to the first image and a sound corresponding to the first audio, thereby implementing audio and image synchronization.

Abstract: Systems, apparatuses, and methods may provide for technology for forming a pre-offset platform on top of a substrate. A memory block is formed, where the memory block includes a staircase area and a memory array area located adjacent the staircase area. The memory array area includes a plurality of memory pillars extending into the memory block. The staircase area has a first height, the memory array area has a second height, and a tier expansion height is defined as a difference between the second height and the first height. The pre-offset platform is located between the substrate and the staircase area of the memory block. The pre-offset platform is oriented and arranged to offset the tier expansion height so that an upper surface of the staircase area and an upper surface of the memory array area are located in a same plane.

Abstract: Voltage reference circuits are provided. A voltage reference circuit includes a transistor, a flipped-gate transistor, a first current mirror unit, a second current mirror unit and an output node. The gate and the drain of the flipped-gate transistor are coupled to the gate and the drain of the transistor. The first current mirror unit is configured to provide a first current to the flipped-gate transistor and the mirroring current in response to a bias current. The second current mirror unit is configured to drain a second current from the transistor in response to the mirroring current. The output node is coupled to the source of the transistor and the second current mirror unit, and is configured to output a reference voltage.

Abstract: An electronic ink screen and a method for manufacturing the same are provided. The electronic ink screen includes: a display module including pixel units configured to display by using electronic ink; and a control module configured to convert a touch signal applied from outside into a change of electric signal of corresponding one or more pixel units through an electrode microstructure, so that a display state of the corresponding one or more pixel units is changed from an initial state; the electrode microstructure includes sub-electrode microstructures, each sub-electrode microstructure includes a first nano electrode and a second nano electrode which are made of different materials, the first nano electrode and the second nano electrode are arranged at intervals and configured to be in mutual friction contact in response to that the touch signal applied from the outside is received, so as to generate charge transferring.

Abstract: A modular pneumatic somatosensory device comprises a main body, a plurality of airbags, a plurality of inflating modules and a control module. The airbags are detachably disposed at different positions of the main body, and at least a part of the airbags have different sizes. The inflating modules are detachably disposed on the main body, and each inflating module is correspondingly connected with at least one of the airbags. The control module is detachably disposed on the main body and is electrically connected with the inflating modules. The control module controls the inflating modules to inflate the corresponding airbags according to a control signal.

Abstract: A fixture for heat pressing process is applied to a hot pressing machine for hot pressing two elastic plastic pieces so as to manufacture an airbag. The two elastic plastic pieces are disposed between the fixture and the hot pressing machine. The fixture includes a first frame, a second frame and a flexible heat blocking layer. The first frame includes two first brackets, which are separated from each other with a first distance. The second frame includes two second brackets, which are separated from each other with a second distance, and located at two ends of the first brackets, respectively. The flexible heat blocking layer is fixed by the first frame and/or the second frame.

Abstract: Techniques are provided for generating one or more three-dimensional (3D) models. In one example, an image of an object (e.g., a face or other object) is obtained, and a 3D model of the object in the image is generated. The 3D model includes geometry information. Color information for the 3D model is determined, and a fitted 3D model of the object is generated based on a modification of the geometry information and the color information for the 3D model. In some cases, the color information (e.g., determination and/or modification of the color information) and the fitted 3D model can be based on one or more vertex-level fitting processes. A refined 3D model of the object is generated based on the fitted 3D model and depth information associated with the fitted 3D model. In some cases, the refined 3D model can be based on a pixel-level refinement or fitting process.

Abstract: A dispatcher virtual assistant (DVA) that can augment the capability of emergency dispatchers while reducing human errors. Major functions of the DVA include updating an emergency incident's status in real time, recommending or reminding the dispatcher to take proper actions at the right timing, answering the dispatcher's inquiries for task-related information, and fulfilling the dispatcher's request for an incident report. The DVA system includes a dispatcher language model based on machine-learning and deep-learning algorithms, for extracting the status of a live incident from incoming incident logs, and for processing and answering inquiries or requests from the dispatcher. It is customizable for different types of emergencies and for different local communities. The DVA can be used in tandem with an existing CAD system.

Abstract: A switch control circuit includes a power switch, a first protection unit, and a second protection unit. The power switch has a first terminal coupled to a first voltage terminal for receiving a first voltage, a second terminal coupled to a second voltage terminal for receiving a second voltage, and a control terminal receives a control voltage. In a first mode, the control voltage is greater than the first voltage. In a second mode, when a voltage of the second voltage terminal is smaller than a first reference voltage, the first protection unit pulls down the control voltage to reduce a current flowing through the power switch. When the voltage of the second voltage terminal is smaller than the second reference voltage, the second protection unit pulls down the control voltage to a ground voltage.

Abstract: Systems and techniques are provided for generating one or more models. For example, a process can include obtaining a plurality of input images corresponding to faces of one or more people during a training interval. The process can include determining a value of the coefficient representing at least the portion of the facial expression for each of the plurality of input images during the training interval. The process can include determining, from the determined values of the coefficient representing at least the portion of the facial expression for each of the plurality of input images during the training interval, an extremum value of the coefficient representing at least the portion of the facial expression during the training interval. The process can include generating an updated bounding value for the coefficient representing at least the portion of the facial expression based on the initial bounding value and the extremum value.

Abstract: The present invention discloses a USB signal output circuit having reverse current prevention mechanism. A switch circuit turns on when a switch control terminal receives a first high level voltage to output a signal from a signal input terminal to a signal output terminal. A first voltage pull-low circuit includes a passive-component high-pass filter circuit and a discharging circuit. The passive-component high-pass filter circuit couples an output terminal voltage of the signal output terminal to a pull-low control terminal. The discharging circuit turns on when a voltage of the pull-low control terminal is larger than a predetermined voltage level to discharge the switch control terminal to pull the switch control terminal to a second high level voltage. A second voltage pull-low circuit pulls the switch control terminal to a low level voltage when the output terminal voltage is larger than a reference voltage and does not have a glitch.

Abstract: An integrated circuit device includes a semiconductor substrate, a first gate structure, a channel layer, source and drain features, a second gate structure, a first contact, and a second contact. The first gate structure is over the semiconductor substrate. The first gate structure includes a gate dielectric layer and a first gate electrode. The channel layer is over and surrounded by the first gate structure. The source and drain features are respectively on opposite first and second sides of the channel layer. The second gate structure is over the channel layer. The second gate structure includes a programming gate dielectric layer having a data storage layer and a second gate electrode over the programming gate dielectric layer. The first gate contact is on the first gate electrode. The second gate contact is on the second gate electrode.

Abstract: A wavelength conversion device includes a wavelength conversion plate, a reflective layer, a driving component and a thermal conductive layer. The wavelength conversion plate includes a lateral edge, at least one surface and a conversion region. The reflective layer is disposed on the surface of the wavelength conversion plate. The driving component is disposed near the lateral edge of the wavelength conversion plate and configured to displace the wavelength conversion plate. The thermal conductive layer is disposed on the surface of the wavelength conversion plate and thermally connected to the conversion region for conducting heat generated by the conversion region during a wavelength conversion. By disposing the thermal conductive layer on the surface of the wavelength conversion plate, the thermal conductive layer is thermally directly connected to the conversion region, so that the heat generated at the conversion region during the wavelength conversion is efficiently dissipated.