Abstract: Present disclosure provides a semiconductor package, including a first substrate having a first active surface and a first trench recessed from the first active surface, a second substrate having a second trench facing the first trench, and a pathway cavity defined by the first trench and the second trench. The first trench comprises a first metal protrusion and a first insulating protrusion. A method for manufacturing the semiconductor package described herein is also disclosed.

Abstract: A substrate structure and a semiconductor package structure are provided. The substrate structure includes a first dielectric layer, a pad and a conductive structure. The first dielectric layer has a first surface and a second surface opposite to the first surface. The pad is adjacent to the first surface and at least partially embedded in the first dielectric layer. The first dielectric layer has an opening exposing the pad, and a width of the opening is less than a width of the pad. The conductive structure is disposed on the pad and composed of a first portion outside the opening of the first dielectric layer and a second portion embedded in the opening of the first dielectric layer. The first portion has an aspect ratio exceeding 1.375.

Abstract: A method for operating a power factor correction (PFC) circuit of an uninterruptible power supply (UPS) apparatus is provided. The PFC circuit includes two T-type converters, and each of the T-type converters includes four switching tubes. The method includes: converting AC input voltage into a positive bus voltage across a first capacitor and a negative bus voltage across a second capacitor that is connected in series with the first capacitor when the UPS apparatus is operated under a normal supply mode; and controlling conduction states of the switching tubes of the T-type converters to balance the positive bus voltage and the negative bus voltage when the UPS apparatus is operated under a battery supply mode.

Abstract: A disease diagnosing method and a disease diagnosing system are provided in the disclosure. The disease diagnosing method includes: obtaining continuous images of a body skin and generating a time domain signal according to an average pixel value of a region of interest in each frame of the continuous images; transforming the time domain signal to a frequency domain signal and combining the time domain signal and the frequency domain signal to a time frequency signal; retrieving multiple first features of a first high dimensional space of the time frequency signal to obtain multiple second features of a second high dimensional space; and use the second features as feature vectors to map to a high dimension feature space, and classifying the second features as one of the multiple categories of a disease corresponding to the region of interest in the body skin according to a hyperplane of the high dimension feature space.

Abstract: A package structure and a method for manufacturing a package structure are provided. The package structure includes a first conductive structure and a second conductive structure. The first conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The second conductive structure is bonded to the first conductive structure. The second conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. A distribution density of the circuit layer of the first conductive structure is greater than a distribution density of the circuit layer of the second conductive structure. A size of the second conductive structure is less than a size of the first conductive structure.

Abstract: A semiconductor package structure includes a semiconductor die surface having a narrower pitch region and a wider pitch region adjacent to the narrower pitch region, a plurality of first type conductive pillars in the narrower pitch region, each of the first type conductive pillars having a copper-copper interface, and a plurality of second type conductive pillars in the wider pitch region, each of the second type conductive pillars having a copper-solder interface. A method for manufacturing the semiconductor package structure described herein is also disclosed.

Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The first electronic device and the second electronic device are disposed side by side. A gap between the first electronic device and the second electronic device is greater than or equal to about 150 ?m.

Abstract: A power converter with a common DC power source includes a DC power source and at least two power modules. Each of the power modules is coupled with each other and coupled to the DC power source. Each of the power module includes a coupled inductive component coupled to the DC power source, a DC output conversion unit coupled to the coupled inductive component, and a capacitor group having a coupling point. By using the coupled inductive component, it is to solve the problem of return current between the power modules caused by coupling multiple coupling points to each other.

Abstract: An isolated converter with high boost ration includes a transformer, a first bridge arm, a second bridge arm, and a boost circuit. The transformer includes a secondary side having a secondary side first node and a secondary side second node. The first bridge arm includes a first diode and a second diode. The second bridge arm includes a third diode and a fourth diode. The boost circuit includes at least one fifth diode coupled between the first bridge arm and the secondary side second node, at least one sixth diode coupled between the second bridge arm and the secondary side first node, and at least two capacitors coupled to the secondary side first node and the secondary side second node.

Abstract: A package structure and a method for manufacturing a package structure are provided. The package structure includes a first conductive structure and a second conductive structure. The first conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The second conductive structure is bonded to the first conductive structure. The second conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. A distribution density of the circuit layer of the first conductive structure is greater than a distribution density of the circuit layer of the second conductive structure. A size of the second conductive structure is less than a size of the first conductive structure.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first die, a second die, and a thermal dissipation element. The first die has a first surface. The second die is disposed on the first surface. The thermal dissipation element is disposed on the first surface. The thermal dissipation element includes a first portion extending in a first direction substantially parallel to the first surface and partially covered by the second die and a second portion extending in a second direction substantially perpendicular to the first surface to be adjacent to an edge of the second die.

Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The first electronic device and the second electronic device are disposed side by side. A gap between the first electronic device and the second electronic device is greater than or equal to about 150 ?m.

Abstract: A method for operating a power factor correction (PFC) circuit of an uninterruptible power supply (UPS) apparatus is provided. The PFC circuit includes two T-type converters, and each of the T-type converters includes four switching tubes. The method includes: converting AC input voltage into a positive bus voltage across a first capacitor and a negative bus voltage across a second capacitor that is connected in series with the first capacitor when the UPS apparatus is operated under a normal supply mode; and controlling conduction states of the switching tubes of the T-type converters to balance the positive bus voltage and the negative bus voltage when the UPS apparatus is operated under a battery supply mode.

Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first die, a second die, and a thermal dissipation element. The first die has a first surface. The second die is disposed on the first surface. The thermal dissipation element is disposed on the first surface. The thermal dissipation element includes a first portion extending in a first direction substantially parallel to the first surface and partially covered by the second die and a second portion extending in a second direction substantially perpendicular to the first surface to be adjacent to an edge of the second die.

Abstract: Present disclosure provides a semiconductor package, including a first substrate having a first active surface and a first trench recessed from the first active surface, a second substrate having a second trench facing the first trench, and a pathway cavity defined by the first trench and the second trench. The first trench comprises a first metal protrusion and a first insulating protrusion. A method for manufacturing the semiconductor package described herein is also disclosed.

Abstract: An isolated converter with high boost ration includes a transformer, a first bridge arm, a second bridge arm, and a boost circuit. The transformer includes a secondary side having a secondary side first node and a secondary side second node. The first bridge arm includes a first diode and a second diode. The second bridge arm includes a third diode and a fourth diode. The boost circuit includes at least one fifth diode coupled between the first bridge arm and the secondary side second node, at least one sixth diode coupled between the second bridge arm and the secondary side first node, and at least two capacitors coupled to the secondary side first node and the secondary side second node.

Abstract: An isolated boost converter includes a transformer, a first bridge arm, a second bridge arm, and a boost circuit. The transformer includes a secondary side having a secondary side first contact and a secondary side second contact. The boost circuit includes two diodes—anodes of the two diodes are mutually coupled to a first contact and cathodes of the two diodes are coupled to a first bridge arm upper contact and a second bridge arm upper contact, two diodes—cathodes of the two diodes are mutually coupled to a second contact and anodes of the two diodes are coupled to a first bridge arm lower contact and a second bridge arm lower contact, the second contact is coupled to the first contact, and at least two capacitors are coupled to the secondary side first contact and the secondary side second contact.

Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.

Abstract: A semiconductor package structure includes a semiconductor die surface having a narrower pitch region and a wider pitch region adjacent to the narrower pitch region, a plurality of first type conductive pillars in the narrower pith region, each of the first type conductive pillars having a copper-copper interface, and a plurality of second type conductive pillars in the wider pitch region, each of the second type conductive pillars having a copper-solder interface. A method for manufacturing the semiconductor package structure described herein is also disclosed.