Patents by Inventor Li Su
Li Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240247569Abstract: Techniques for carbon sequestration and storage site selection are presented.Type: ApplicationFiled: January 19, 2023Publication date: July 25, 2024Inventors: Jun Tao MA, Mengyu HAN, Jing WANG, Vincenzo DE GENNARO, Shao Yong SU, Bingtao LI, Pei YAN, Ye JI
-
Publication number: 20240241000Abstract: A contact sensor includes two film layers, two electrode layers, and a failure detection electrode. The two film layers respectively have a first inner surface and a second inner surface corresponding to each other. The two electrode layers are respectively disposed on the first inner surface and the second inner surface, and the two electrode layers are separated by a gap. The failure detection electrode is disposed on at least one of the first inner surface and the second inner surface and is electrically isolated from the two electrode layers.Type: ApplicationFiled: November 23, 2020Publication date: July 18, 2024Inventors: CHANG-HO LIOU, JUI-YIAO SU, YUAN-LI LU
-
Publication number: 20240242539Abstract: Embodiments of the present disclosure provide enhanced system and methods for implementing generative converting 3D face landmarks. An enhanced disclosed system and non-limiting method effectively renders a third 3D face model of a first user that enables a second user to easily recognize the first user, where the second user is only familiar with a first face model that is significantly changed in a second face model of the first user in a current interaction of the first user and second user. This method effectively renders the third 3D face model of the first user that can gradually change from the first face model to the second face model, and can be easily recognized by the second user.Type: ApplicationFiled: January 13, 2023Publication date: July 18, 2024Inventors: Wen Ting SU, Yuan Jie SONG, Dan ZHANG, Yu LI, Meng CHAI, Xiao Feng JI
-
Publication number: 20240241410Abstract: A display module is provided. The display module includes: a display panel, a light control panel, at least one first circuit board for the display panel, and at least one second circuit board for the light control panel. The display panel and the light control panel) are stacked, the display panel is on a light-emitting side of the light control panel, a light-emitting surface of the display panel is on a first surface, and at least part of an orthographic projection of any one of the at least one first circuit board on the first surface does not overlap with an orthographic projection of the at least one second circuit board on the first surface in a direction perpendicular to the first surface.Type: ApplicationFiled: March 28, 2024Publication date: July 18, 2024Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Li TIAN, Jian XU, Qiujie SU
-
Publication number: 20240241885Abstract: Disclosed embodiments provide techniques for dynamic data collection. The dynamic data collection includes determining a data generation temporal pattern. Based on the data generation temporal pattern, a data collection strategy is created. The data collection strategy can be based on one or more data collection goals. The data collection strategy can contain specific details on how data is to be collected. A data infrastructure evaluation is performed, which provides pricing models for resources such as electricity and/or network bandwidth. A data collection policy is created based on the data collection strategy and the data infrastructure evaluation. The data collection policy can contain specific details on when data is to be collected and what strategy to use for the collection. A data transfer schedule is created based on the data collection policy. The data transfer schedule determines when to collect data from one or more data source devices.Type: ApplicationFiled: January 17, 2023Publication date: July 18, 2024Inventors: Fan Jing Meng, Guang Han Sui, Peng Hui Jiang, Xing Tian, Li Jian Wang, Cheng Fang Wang, Hua Ye, Ming Liang Zu, Jun Su
-
Publication number: 20240186373Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.Type: ApplicationFiled: February 7, 2024Publication date: June 6, 2024Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
-
Publication number: 20240179523Abstract: A configuration method includes: the terminal device generating a second key on the basis of a first key, and performing encryption and/or integrity protection on a certificate request message on the basis of the second key; and sending a first request message, the first request message comprising the certificate request message encrypted and/or integrity-protected via the second key.Type: ApplicationFiled: March 22, 2022Publication date: May 30, 2024Applicants: CHINA MOBILE COMMUNICATION CO., LTD RESEARCH INSTITUTE, CHINA MOBILE COMMUNICATIONS GROUP CO., LTD.Inventors: Ye TIAN, Li SU, Shen HE, Haitao DU, Jie MA, Wenshu JIANG
-
Patent number: 11990511Abstract: A method of forming a semiconductor includes forming a first recess in a first semiconductor fin protruding from a substrate and forming a second recess in a second semiconductor fin protruding from the substrate first semiconductor fin and forming a source/drain region in the first recess and the second recess. Forming the source/drain region includes forming a first portion of a first layer in the first recess and forming a second portion of the first layer in the second recess, forming a second layer on the first layer by flowing a first precursor, and forming a third layer on the second layer by flowing a second precursor, the third layer being a single continuous material.Type: GrantFiled: August 27, 2021Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-I Kuo, Wei Hao Lu, Li-Li Su, Yee-Chia Yeo
-
Patent number: 11961912Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.Type: GrantFiled: June 6, 2022Date of Patent: April 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
-
Publication number: 20240113205Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.Type: ApplicationFiled: November 28, 2023Publication date: April 4, 2024Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
-
Publication number: 20240076417Abstract: The present disclosure provides a method for manufacturing an auto-crosslinked hyaluronic acid gel, comprising conducting auto-crosslinking reaction of a colloid containing hyaluronic acid continuously at low temperature in an acidic environment, and treating the reaction product with steam at high temperature to obtain the auto-crosslinked hyaluronic acid gel with high viscosity.Type: ApplicationFiled: September 5, 2023Publication date: March 7, 2024Applicant: SCIVISION BIOTECH INC.Inventors: TAI-SHIEN HAN, TSUNG-WEI PAN, TOR-CHERN CHEN, CHUN-CHANG CHEN, PO-HSUAN LIN, LI-SU CHEN
-
Patent number: 11923409Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.Type: GrantFiled: August 5, 2021Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
-
Publication number: 20240064021Abstract: The present disclosure provides an access control method, an access control apparatus, a network side device, a terminal and a blockchain node, wherein the access control method includes: receiving relevant information to be verified that is sent by a terminal and corresponds to an access request, wherein the relevant information to be verified includes private key signature information of the terminal and position information of preset information in the blockchain; acquiring the preset information from the blockchain according to the position information; verifying the terminal according to the private key signature information and the preset information; acquiring, in a case that verification is passed, attribute information of the terminal from a blockchain ledger according to the preset information; and feedbacking a request response for access control to the terminal according to the attribute information.Type: ApplicationFiled: December 27, 2021Publication date: February 22, 2024Inventors: Junzhi YAN, Bo YANG, Li SU
-
Publication number: 20240056439Abstract: In a blockchain-based SDP access control method and apparatus, an SDP connection initiation host submits identity authentication request information to a blockchain system node, receives an authentication result feedback after verification; sends, to the blockchain system node, a query request for an SDP connection accepting host list that can be accessed, the query request including an authentication result of the blockchain system node for the SDP connection initiation host; after verifying the query request, the blockchain system node queries the SDP connection accepting host list that can be accessed by the SDP connection initiation host, and records the SDP connection accepting host list to a blockchain ledger; the SDP connection initiation host initiates a connection request to the SDP connection accepting host, queries the SDP connection accepting host list that can be accessed by the SDP connection initiation host; and if so, then access service is provided.Type: ApplicationFiled: December 30, 2021Publication date: February 15, 2024Applicants: CHINA MOBILE COMMUNICATION CO., LTD RESEARCH INSTITUTE, CHINA MOBILE COMMUNICATIONS GROUP CO., LTD.Inventors: Junzhi YAN, Bo YANG, Li SU, Shen HE
-
Publication number: 20240022926Abstract: This disclosure relates to methods and devices for mitigating overheating in a user equipment device (UE). The UE is configured to communicate over each of LTE and 5G NR and may be configured to communicate through 5G NR over each of a Sub-6 GHz and a millimeter Wave (mmW) frequency band. The UE is configured to establish an ENDC connection with an enB and one or more gNBs. The UE implements intelligent transmission modification and cell measurement adjustments to mitigate overheating and reduce battery drain.Type: ApplicationFiled: July 24, 2023Publication date: January 18, 2024Inventors: Alosious Pradeep Prabhakar, Wen Zhao, Lakshmi N. Kavuri, Li Su, Sagar B. Shah, Sriram Subramanian, Vijay Venkataraman, Vishwanth Kamala Govindaraju, Shiva Krishna Nana, Sanjeevi Balasubramanian, Wei Zhang, Madhukar D. Shanbhag, Sandeep K. Sunkesala, Srinivasan Nimmala, Muthukumaran Dhanapal, Tarakkumar G. Dhanani, Sree Ram Kodali, Ioannis Pefkianakis, Dhruv Khati, Franco Travostino, Thanigaivelu Elangovan, Madhusudan Chaudhary, Geoffrey R. Hall
-
Publication number: 20230422339Abstract: This disclosure relates to performing implicit radio resource control state transitions in a cellular communication system. A wireless device may establish a radio resource control (RRC) connection with a cellular base station. A data inactivity timer length and a target RRC state for implicit RRC transitions may be determined. A data inactivity timer having the determined data inactivity timer length may be initiated. It may be determined that the data inactivity timer has expired. The wireless device may transition to the target RRC state based at least in part on determining that the data inactivity timer has expired.Type: ApplicationFiled: September 8, 2023Publication date: December 28, 2023Inventors: Sethuraman Gurumoorthy, Srirang A. Lovlekar, Murtaza A. Shikari, Srinivasan Nimmala, Haijing Hu, Fangli Xu, Yuqin Chen, Longda Xing, Xu Ou, Li Su, Vijay Venkataraman, Dawei Zhang, Muthukumaran Dhanapal, Sree Ram Kodali, Srinivas Burugupalli
-
Patent number: 11855188Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.Type: GrantFiled: June 30, 2022Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
-
Publication number: 20230397218Abstract: A downlink control information (DCI), such as a blanking DCI (bDCI) message may be transmitted by a base station (e.g., eNB) and received by a mobile device (e.g., UE). The bDCI may indicate that the eNB will not transmit a subsequent DCI to the UE for a duration of time. The UE may be in continuous reception mode or connected discontinuous reception (C-DRX) mode. The UE may therefore determine to enter a sleep state or take other action. The bDCI may specify an explicit blanking duration, or an index indicating a blanking duration from a lookup table, and/or the blanking duration (and/or a blanking duration offset value) may be determined in advance, e.g., semi-statically. When the UE is in C-DRX mode, the UE may be configured such that either the sleep/wake period of the C-DRX mode or the blanking period of the bDCI may take precedence over the other.Type: ApplicationFiled: August 16, 2023Publication date: December 7, 2023Inventors: Johnson O. Sebeni, Yang Li, Zhu Ji, Yuchul Kim, Wei Zeng, Dawei Zhang, Haijing Hu, Xiangying Yang, Li Su
-
Publication number: 20230395434Abstract: A semiconductor device includes a fin-shape base protruding from a substrate, channel structures suspended above the fin-shape base, a gate structure wrapping around each of the channel structures, a source/drain (S/D) epitaxial feature abutting the channel structures and directly above a top surface of the fin-shape base, inner spacers interposing the S/D epitaxial feature and the gate structure, and a dielectric layer disposed vertically between the top surface of the fin-shape base and a bottom surface of the S/D epitaxial feature.Type: ApplicationFiled: August 10, 2023Publication date: December 7, 2023Inventors: Bo-Yu Lai, Jyun-Chih Lin, Yen-Ting Chen, Wei-Yang Lee, Chia-Pin Lin, Wei Hao Lu, Li-Li Su
-
Publication number: 20230377989Abstract: A method includes etching a first recess adjacent a first dummy gate stack and a first fin; etching a second recess adjacent a second dummy gate stack and a second fin; and epitaxially growing a first epitaxy region in the first recess. The method further includes depositing a first metal-comprising mask over the first dummy gate stack, over the second dummy gate stack, over the first epitaxy region in the first recess, and in the second recess; patterning the first metal-comprising mask to expose the first dummy gate stack and the first epitaxy region; epitaxially growing a second epitaxy region in the first recess over the first epitaxy region; and after epitaxially growing the second epitaxy region, removing remaining portions of the first metal-comprising mask.Type: ApplicationFiled: August 4, 2023Publication date: November 23, 2023Inventors: Hui-Lin Huang, Li-Li Su, Yee-Chia Yeo, Chii-Horng Li