Patents by Inventor Li Su

Li Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220344151
    Abstract: A method includes flowing first precursors over a semiconductor substrate to form an epitaxial region, the epitaxial region includes a first element and a second element; converting a second precursor into first radicals and first ions; separating the first radicals from the first ions; and flowing the first radicals over the epitaxial region to remove at least some of the second element from the epitaxial region.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 27, 2022
    Inventors: Wei-Min Liu, Li-Li Su, Yee-Chia Yeo
  • Publication number: 20220336677
    Abstract: Semiconductor devices and methods of fabricating the semiconductor devices are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin as an initial step in forming a source/drain region. The opening is formed into a parasitic channel region of the fin. Once the opening has been formed, a first semiconductor material is epitaxially grown at the bottom of the opening to a level over the top of the parasitic channel region. A second semiconductor material is epitaxially grown from the top of the first semiconductor material to fill and/or overfill the opening. The second semiconductor material is differently doped from the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 20, 2022
    Inventors: Wei-Min Liu, Li-Li Su, Yee-Chia Yeo
  • Publication number: 20220328657
    Abstract: A method for manufacturing an integrated circuit (IC) structure is provided. The method includes: etching a first recess and a second recess in a substrate; forming a sacrificial epitaxial plug in the first recess in the substrate; forming a first epitaxial feature and a second epitaxial feature respectively in the first recess and the second recess, wherein the first epitaxial feature is over the sacrificial epitaxial plug; forming a first source/drain epitaxial structure and a second source/drain epitaxial structure over the first epitaxial feature and the second epitaxial feature respectively; forming a gate structure laterally between the first source/drain epitaxial structure and the second source/drain epitaxial structure; removing the sacrificial epitaxial plug and the first epitaxial feature to form a backside via opening exposing a backside of the first source/drain epitaxial structure; and forming a backside via in the backside via opening.
    Type: Application
    Filed: April 8, 2021
    Publication date: October 13, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Hao LU, Chien-I KUO, LI-Li SU, Wei-Yang LEE, Yee-Chia YEO
  • Publication number: 20220328660
    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 13, 2022
    Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
  • Publication number: 20220319934
    Abstract: A semiconductor device includes a first device region and a second device region. The first device region includes a first source/drain region extending from a substrate and a first and a second pair of spacers. The first source/drain region extends between the first pair of spacers and the second pair of spacers. The first pair of spacers and the second pair of spacers have a first height. The second device region includes a second and a third source/drain region extending from the substrate and a third and a fourth pair of spacers. The third source/drain region is separate from the second source/drain region. The second source/drain region extends between the third pair of spacers. The third source/drain region extends between the fourth pair of spacers. The third pair of spacers and the fourth pair of spacers have a second height greater than the first height.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 6, 2022
    Inventors: Wei-Min Liu, Hsueh-Chang Sung, Li-Li Su, Yee-Chia Yeo
  • Publication number: 20220320276
    Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.
    Type: Application
    Filed: August 5, 2021
    Publication date: October 6, 2022
    Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
  • Publication number: 20220312322
    Abstract: Methods related to an inactive state of a user equipment (UE). In one example, when an amount of data in an uplink buffer is less than a threshold, the data is sent to the network while remaining in the inactive state. In another example, when reselecting to a different cell, the UE attempts to reselect to the different cell and remain in the inactive state. When transitioning to a connected state at the reselected cell, the UE sends a resume request including an identification of the first cell. In another example, when a high priority or a background PLMN search is performed in the inactive state, the results are cached and implemented the earlier of when a timer expires or the UE enters an idle state. In another example, a cell reselection criteria is altered in the inactive state to make it less likely that a cell reselection will occur.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 29, 2022
    Inventors: Li SU, Muthukumaran DHANAPAL, Vijay VENKATARAMAN, Srinivas BURUGUPALLI
  • Patent number: 11457508
    Abstract: This disclosure relates to techniques for supporting message mapping via time and/or frequency indexing. For example, these techniques may be applied to device-to-device wireless communication. For example, device to device discovery may use message mapping via frequency indexing. A portion of the payload of a message, such as a discovery message, may be offloaded to a frequency and/or time index. A receiving device may determine the offloaded portion of the payload based on the frequency and/or time (e.g., subcarrier and/or slot) used to transmit the message.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: September 27, 2022
    Assignee: Apple Inc.
    Inventors: Yang Li, Li Su, Zhu Ji, Tianyan Pu
  • Publication number: 20220302299
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 22, 2022
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Patent number: 11444181
    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
  • Patent number: 11445047
    Abstract: Some embodiments relate to a user equipment device (UE), and associated methods for performing ROHC header compression on TCP packets with MPTCP option enabled. In some embodiments, a compressor may determine that a first portion of the stream of data packets is formatted according to the transmission control protocol (TCP) with a multipath TCP (MPTCP) option enabled. The compressor may establish context with a corresponding decompressor and may operate in one of three modes of compression based on the context. In some embodiments, when the context indicates that the corresponding decompressor supports decompression of TCP data packets with MPTCP option enabled, the compressor may operate in a first or second mode of compression. In some embodiments, when the context indicates that the corresponding decompressor does not support decompression of TCP data packets with MPTCP option enabled, the compressor may operation in a third mode of compression.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: September 13, 2022
    Assignee: Apple Inc.
    Inventors: Yingjie Zhao, Jianxiong Shi, Lele Cui, Li Su, Faraz Faheem
  • Patent number: 11432239
    Abstract: Methods related to an inactive state of a user equipment (UE). In one example, when an amount of data in an uplink buffer is less than a threshold, the data is sent to the network while remaining in the inactive state. In another example, when reselecting to a different cell, the UE attempts to reselect to the different cell and remain in the inactive state. When transitioning to a connected state at the reselected cell, the UE sends a resume request including an identification of the first cell. In another example, when a high priority or a background PLMN search is performed in the inactive state, the results are cached and implemented the earlier of when a timer expires or the UE enters an idle state. In another example, a cell reselection criteria is altered in the inactive state to make it less likely that a cell reselection will occur.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: August 30, 2022
    Assignee: Apple Inc.
    Inventors: Li Su, Muthukumaran Dhanapal, Vijay Venkataraman, Srinivas Burugupalli
  • Patent number: 11431724
    Abstract: A shared electronic device management method is implemented in a shared electronic device management device. The method includes receiving a function instruction, obtaining verification information, linking the obtained verification information to verification information in a database, determining whether the obtained verification information meets a first preset condition, implementing the function instruction if the obtained verification information meets the first preset condition, and outputting a prompt if the obtained verification information does not meet the first preset condition. The function instruction includes any one of retrieving, depositing, and repairing a shared electronic device. The verification information includes user verification information and shared electronic device verification information.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: August 30, 2022
    Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Bo Zhang, Tao Zhao, Lin Liu, Xiao-Nan Zhu, Jian-Guo Chan, Shao-Bing Hou, Zhi-Li Su, Xiang Ru, Zhi-Ping Zhang
  • Publication number: 20220246479
    Abstract: A method includes etching a first recess adjacent a first dummy gate stack and a first fin; etching a second recess adjacent a second dummy gate stack and a second fin; and epitaxially growing a first epitaxy region in the first recess. The method further includes depositing a first metal-comprising mask over the first dummy gate stack, over the second dummy gate stack, over the first epitaxy region in the first recess, and in the second recess; patterning the first metal-comprising mask to expose the first dummy gate stack and the first epitaxy region; epitaxially growing a second epitaxy region in the first recess over the first epitaxy region; and after epitaxially growing the second epitaxy region, removing remaining portions of the first metal-comprising mask.
    Type: Application
    Filed: April 16, 2021
    Publication date: August 4, 2022
    Inventors: Hui-Lin Huang, Li-Li Su, Yee-Chia Yeo, Chii-Horng Li
  • Publication number: 20220231019
    Abstract: A semiconductor device includes: a first fin and a second fin extending from a substrate and an epitaxial source/drain region. The epitaxial source/drain region includes a first portion grown on the first fin and a second portion grown on the second fin, and the first portion and the second portion are joined at a merging boundary. The epitaxial source/drain region further includes a first subregion extending from a location level with a highest point of the epitaxial source/drain region to a location level with a highest point of the merging boundary, a second subregion extending from the location level with the highest point of the merging boundary to a location level with a lowest point of the merging boundary, and a third subregion extending from the location level with the lowest point of the merging boundary to a location level with a top surface of an STI region.
    Type: Application
    Filed: April 4, 2022
    Publication date: July 21, 2022
    Inventors: Wei Hao Lu, Yi-Fang Pai, Cheng-Wen Cheng, Li-Li Su, Chien-I Kuo
  • Patent number: 11368939
    Abstract: Systems, apparatuses, and methods for performing cellular relay for an accessory device. A relay device may establish cellular communication with a base station and an accessory device. Establishing communication with the accessory device includes establishing synchronization with the accessory device using a cellular sidelink synchronization channel and a cellular broadcast channel. Establishing communication with the accessory device includes configuring resources for performing communication with the accessory device. Establishing communication with the accessory device includes indicating the resources to the accessory device. The relay device may relay information between the base station and the accessory device using the resources.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: June 21, 2022
    Assignee: Apple Inc.
    Inventors: Wei Zeng, Li Su, Dawei Zhang, Haitong Sun
  • Patent number: 11355641
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: June 7, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Patent number: 11350265
    Abstract: This disclosure relates to techniques for performing presence discovery in a wireless communication. A wireless device may monitor a wireless medium for discovery signals. A candidate discovery signal may be detected. A frequency offset estimation consistency check may be performed on the candidate discovery signal. A peak to sidelobe ratio check may be performed on the candidate discovery signal. The wireless device may determine whether the candidate discovery signal is a false positive based at least in part on the frequency offset estimation consistency check and the peak to sidelobe ratio check.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: May 31, 2022
    Assignee: Apple Inc.
    Inventors: Tianyan Pu, Li Su, Zhu Ji, Yang Li
  • Publication number: 20220141895
    Abstract: This disclosure relates to techniques for supporting narrowband device-to-device wireless communication, including possible techniques for performing discovery in an off grid radio system. According to some embodiments, a wireless device may determine a number of synchronization signal repetitions to use for a narrowband device-to-device transmission. The wireless device may perform the transmission, including transmitting the determined number of synchronization signal repetitions. The transmission may include an indication of the number of synchronization signal repetitions used in the transmission.
    Type: Application
    Filed: January 13, 2022
    Publication date: May 5, 2022
    Inventor: Li Su
  • Publication number: 20220122893
    Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.
    Type: Application
    Filed: April 23, 2021
    Publication date: April 21, 2022
    Inventors: Bo-Yu Lai, Jyun-Chih Lin, Yen-Ting Chen, Wei-Yang Lee, Chia-Pin Lin, Wei Hao Lu, Li-Li Su