Abstract: A semiconductor device includes a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures in a first direction. The semiconductor device further includes a gate structure. The gate structure includes a top surface; a first sidewall angled at a non-perpendicular angle with respect to the top surface; and a second sidewall angled with respect to the top surface. The gate structure further includes a first horizontal surface extending between the first sidewall and the second sidewall, wherein the first horizontal surface is parallel to the top surface, and a dimension of the gate structure in a second direction, perpendicular to the first direction, is less than a dimension of each of the plurality of isolation structures in the second direction.

Abstract: In a method of manufacturing a semiconductor device, a trench pattern is formed in a first layer disposed over an underlying layer, and a first dimension of the trench pattern is reduced by first directional deposition. In the first directional deposition, a deposition rate on a first side wall of the trench pattern extending in a first axis is greater than a deposition rate on a second side wall of the trench pattern extending in a second axis crossing the first axis, the first axis and the second axis being horizontal and parallel to a surface of the underlying layer.

Abstract: Method and apparatus of coding pictures containing one or more virtual boundaries, such as 360-degree virtual reality (VR360) video are disclosed. According to this method, a reconstructed filtered unit associated with a loop filter for a current reconstructed pixel is received. The loop filtering process associated with the loop filter is applied to the current reconstructed pixel to generate a filtered reconstructed pixel, where if the loop filtering process for the current reconstructed pixel is across a virtual boundary of the picture, the loop filtering process is disabled when fixed-size loop filtering is used or a smaller-size loop filter is selected when adaptive-size loop filtering is used for the current reconstructed pixel, where the filtered reconstructed pixel is the same as the current reconstructed pixel when the loop filtering process is disabled. The filtered reconstructed pixel is the same as the current reconstructed pixel.

Abstract: A water replenishment device includes a water generator and a container. The water generator includes a seat body, a heat exchanger, and a thermoelectric cooler. The seat body has a fluid channel and a catchment hole. The catchment hole is in fluid communication with the fluid channel, and the fluid channel is configured for an environment airflow to pass therethrough. The heat exchanger is partially located in the fluid channel. The thermoelectric cooler has a cold surface and a hot surface. The cold surface of the thermoelectric cooler is thermally coupled to the heat exchanger. The container has a storage space. The storage space is in fluid communication with the fluid channel via the catchment hole. The thermoelectric cooler is configured to condense the environment airflow to a liquid, and the liquid is configured to be stored in the storage space via the catchment hole.

Abstract: In a mobile cellular network, a mobile network operator (MNO) or other entity can specify whether a user equipment (UE) is to utilize either a concealed identifier (e.g., a subscription concealed identifier (SUCI)) calculated by a universal subscriber identity module (USIM) of a universal integrated circuit card (UICC) or a concealed identifier calculated by mobile equipment (ME) of the UE that is separate from the UICC and USIM. In the event that a USIM-calculated concealed identifier is specified for use but the USIM fails in generation of a concealed identifier, the UE can utilize one or more failure recovery procedures to attempt completion of attachment of the UE to the same network or a different network to help ensure that the UE does not remain attached to a network without access to services of the network due to authentication failure.

Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may determine multiple voltage values associated with a rechargeable battery over a period of time; store the multiple voltage values with respect to multiple clock values over the period of time; determine a voltage drop rate from the multiple voltage values and the multiple clock values; determine a threshold voltage value associated with a predicted energy capacity of the rechargeable battery for a mobile information handling system (IHS) to perform a power state transition; determine a voltage value associated with the rechargeable battery; determine that the voltage value has reached the threshold voltage value; provide a notification to an operating system executed by the mobile IHS; store data from a volatile memory medium to a non-volatile memory medium; and transition the mobile IHS from an operational state to a power conservation state.

Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.

Abstract: An oscillation circuit including an amplifier, a feedback resistor and a first switch circuit is provided. The amplifier inverts and amplifies an oscillation signal received from an input terminal thereof to provide an output oscillation signal at an output terminal thereof. The feedback resistor is coupled between the input terminal and the output terminal, and coupled with the first switch circuit in parallel. The first switch circuit conducts the input terminal to the output terminal in one of the following situations: (1) an input voltage of the oscillation signal is higher than an output voltage of the output oscillation signal by at least a first threshold value; and (2) the output voltage is higher than the input voltage by at least a second threshold value. The first switch circuit has a first on-state resistance smaller than a resistance of the feedback resistor.

Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a bipolar junction transistor, a first resistor and a second resistor. A base of the bipolar junction transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage, a first terminal of the second resistor is electrically connected to an emitter of the bipolar junction transistor, and a second terminal of the second resistor receives a third driving voltage The bipolar junction transistor is operated in an active region.

Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed over a substrate. A film is formed over the underlying structure. Surface topography of the film is measured and the surface topography is stored as topography data. A local etching is performed by using directional etching and scanning the substrate so that an entire surface of the film is subjected to the directional etching. A plasma beam intensity of the directional etching is adjusted according to the topography data.

Abstract: The present disclosure relates to an integrated chip structure having a first substrate including a plurality of transistor devices disposed within a semiconductor material. An interposer substrate includes vias extending through a silicon layer. A copper bump is disposed between the first substrate and the interposer substrate. The copper bump has a sidewall defining a recess. Solder is disposed over the copper bump and continuously extending from over the copper bump to within the recess. A conductive layer is disposed between the first substrate and the interposer substrate and is separated from the copper bump by the solder.

Abstract: A transistor substrate is provided. The transistor substrate includes a plurality of data lines and a plurality of scan lines. The scan lines intersect with the data lines to define a plurality of pixel units. One of the pixel units includes a first electrode, a second electrode and a switching transistor. The first electrode has a slit including a major axis portion and a curved portion connected to the major axis portion. One of the first electrode and the second electrode is used for receiving a pixel voltage signal, and the other is used for receiving a common voltage signal. The switching transistor includes a switching electrode. The switching electrode and the curved portion of the slit have an overlapping region, and an area of the overlapping region is 0.2 times to 0.8 times an area of the curved portion.

Abstract: A method (of manufacturing fins for a semiconductor device) includes: forming semiconductor fins including ones thereof having a first cap with a first etch sensitivity (first capped fins) and second ones thereof having a second cap with a second etch sensitivity (second capped fins), the first and second etch sensitivities being different; and eliminating selected ones of the first capped fins and selected ones of the second capped fins.

Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

Abstract: A method includes forming a plurality of first conductive vias over a redistribution layer (RDL); disposing a first die over the RDL and adjacent to the first vias; and forming a plurality of second conductive vias over and electrically connected to the first conductive vias, each of the second conductive vias corresponding to one of the first conductive vias. The method further includes forming a plurality of third conductive vias over the first die; disposing a second die over the first die and adjacent to the third conductive vias; and encapsulating the first die, the second die, the first conductive vias, the second conductive vias and the third conductive vias with a molding material.

Abstract: A micro LED display panel includes a driving substrate and a plurality of micro light emitting diodes (LEDs). The driving substrate has a plurality of pixel regions. Each of the pixel regions includes a plurality of sub-pixel regions. The micro LEDs are located on the driving substrate. At least one of the sub-pixel regions is provided with two micro LEDs of the micro LEDs electrically connected in series, and a dominant wavelength of the two micro LEDs is within a wavelength range of a specific color light. In a repaired sub-pixel region of the sub-pixel regions, only one of the two micro LEDs emits light. In a normal sub-pixel region of the sub-pixel regions, both of the two micro LEDs emit light.

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, an encapsulant and a redistribution structure. The encapsulant laterally encapsulates the semiconductor die. The redistribution structure is disposed on the encapsulant and electrically connected with the semiconductor die, wherein the redistribution structure comprises a first conductive via, a first conductive wiring layer and a second conductive via stacked along a stacking direction, the first conductive via has a first terminal surface contacting the first conductive wiring layer, the second conductive via has a second terminal surface contacting the first conductive wiring layer, an area of a first cross section of the first conductive via is greater than an area of the first terminal surface of the first conductive via, and an area of a second cross section of the second conductive via is greater than an area of the second terminal surface of the second conductive via.

Abstract: A power detection circuit is provided for detecting current total input power of a resonant circuit. The power detection circuit includes a detection circuit and an estimation circuit. The detection circuit receives a current signal and obtains resonant-slot baseband power according to the current signal to generate the baseband power value. The current signal represents a resonant-slot current generated by the resonant circuit. The estimation circuit receives the baseband power value and estimates the current total input power according to the baseband power value to generate an estimated power value.

Abstract: A light-emitting assembly, a method for adjusting the light-emitting assembly, and a vehicle. The light-emitting assembly is used for a vehicle and includes a seat and a support, a light-emitting module being held on the support. A first adjustment mechanism is provided for performing a first adjustment on the light-emitting module, and a second adjustment mechanism is provided for performing a second adjustment on the light-emitting module. The support and the seat are pivotally connected together, so that the support can pivot around a horizontal axis under the action of the first adjustment mechanism.

Abstract: A heating device includes a resonant circuit, a detection unit and a control unit. The resonant circuit includes an inverter circuit and a resonant tank. The inverter circuit provides a resonant tank current and a resonant tank voltage. The resonant tank includes a heating coil, a resonant tank capacitor, a resonant tank equivalent inductor and a resonant tank equivalent impedance. The detection unit detects the resonant tank current and the resonant tank voltage to acquire associated parameters. The detection unit calculates an inductance of the resonant tank equivalent inductor according to a capacitance of the resonant tank capacitor, a resonant period and a first expression. The detection unit calculates an impedance value of the resonant tank equivalent impedance according to the inductance of the resonant tank equivalent inductor, a time difference, the resonant period, a reference current value, a negative peak current value and a second expression.