Abstract: Aspects described herein include devices and methods for smart ultra wideband transmissions. In one aspect, an apparatus includes pulse generation circuitry configured to output a plurality of transmission (TX) pulse samples at a selected signal sample rate, where each pulse sample of the plurality of TX pulse samples comprises a value associated with a pulse amplitude at a corresponding sample time The apparatus includes a plurality of power amplifier (PA) cells, with each PA cell of the plurality of PA cells comprising a corresponding current source and associated gates, and where the associated gates of a PA cell are selectable to configure an on state and an off state. Logic circuitry of the apparatus is configured to set the on state or the off state for each PA cell.

Abstract: An encoding method for encoding three-dimensional points each having a position represented by a distance and an angle, the encoding method comprising: identifying three-dimensional points that belong to a second processing unit and have been encoded, for inter prediction of a first three-dimensional point belonging to a first processing unit; and selecting a reference three-dimensional point from the three-dimensional points identified to calculate an inter predicted value of the first three-dimensional point. The three-dimensional points identified include a second three-dimensional point and a third three-dimensional point, the second three-dimensional point having a second angle corresponding to a first angle of the first three-dimensional point, the third three-dimensional point having a third angle greater than the second angle.

Abstract: A system includes a high-bandwidth inter-chip network (ICN) that allows communication between parallel processing units (PPUs) in the system. For example, the ICN allows a PPU to communicate with other PPUs on the same compute node or server and also with PPUs on other compute nodes or servers. In embodiments, communication may be at the command level (e.g., at the direct memory access level) and at the instruction level (e.g., the finer-grained load/store instruction level). The ICN allows PPUs in the system to communicate without using a PCIe bus, thereby avoiding its bandwidth limitations and relative lack of speed. The respective routing tables comprise information of multiple paths to any given other PPU.

Abstract: An electronic modulating device is provided, which includes a first substrate, an electrode, and an insulating layer. The electrode is disposed on the first substrate, wherein the electrode comprises an opening defining a top edge and a bottom edge of the electrode, and the opening has a central portion. The insulating layer is disposed on the electrode and within the opening. Wherein a thickness of the insulating layer at the bottom edge is greater than a thickness of the insulating layer at the central portion, and the electrode has a first inner side and at least a portion of the first inner side is uneven.

Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.

Abstract: Aspects described herein include devices and methods for smart ultra wideband transmissions. In one aspect, an apparatus includes pulse generation circuitry configured to output a plurality of transmission (TX) pulse samples at a selected signal sample rate, where each pulse sample of the plurality of TX pulse samples comprises a value associated with a pulse amplitude at a corresponding sample time The apparatus includes a plurality of power amplifier (PA) cells, with each PA cell of the plurality of PA cells comprising a corresponding current source and associated gates, and where the associated gates of a PA cell are selectable to configure an on state and an off state. Logic circuitry of the apparatus is configured to set the on state or the off state for each PA cell.

Abstract: A memory structure is provided in the present disclosure. The memory structure includes a substrate, a plurality of discrete memory gate structures on the substrate where each of the plurality of memory gate structures includes a floating gate layer and a control gate layer on the floating gate layer, an isolation layer formed between adjacent memory gate structures where a top surface of the isolation layer is lower than a top surface of the control gate layer and higher than a bottom surface of the control gate layer, an opening is formed on an exposed sidewall of the control gate layer, and a bottom of the opening is lower than or coplanar with the top surface of the isolation layer, and a metal silicide layer on an exposed surface of the control gate layer and the top surface of the isolation layer.

Abstract: The disclosed system may include a support structure that may be configured to house electronic components. The system may also include a first antenna mounted to the support structure. The first antenna may be configured to provide a wireless intralink on a first frequency to a local mobile electronic device. The system may also include multiple second antennas that are configured to established wireless interlinks on other frequencies to various external wireless networks. The second antennas may be positioned a specified minimum distance away from the first antenna and may be positioned at an at least partially opposing angle to each other. As such, the second antennas may provide at least a minimum threshold amount of spherical radiation to transmit and receive data using the established wireless interlinks. Various other apparatuses, methods of manufacturing, and mobile electronic devices are also disclosed.

Abstract: The disclosed system may include a support structure having a top portion and a first bottom portion. The system may also include at least one wireless communication device positioned on the top portion of the support structure. The system may further include at least one antenna positioned in the first bottom portion of the support structure. The antenna in the first bottom portion of the support structure may be electrically connected to the wireless communication device positioned on the top portion of the support structure. Various other wearable devices, apparatuses, and methods of manufacturing are also disclosed.

Abstract: A mixing and discharging device, a mixing and discharging system and a fracturing system are provided. The mixing and discharging device comprises a main shell, an impeller structure and a main shaft. The main shell comprises a top cover; the impeller structure is in the main shell; the main shaft is configured to drive the impeller structure to rotate, penetrates through the top cover and extends into the main shell; a bottom end of the main shaft is in the main shell and is fixed on the impeller structure, and the bottom end of the main shaft is separated from the shell.

Abstract: An apparatus includes a low-noise amplifier having an input and an output, a first switch coupled between the input of the low-noise amplifier and the output of the low-noise amplifier, and a transformer including a first inductor and a second inductor, wherein the first inductor is coupled to the output of the low-noise amplifier. The apparatus also includes a power amplifier having an input and an output, and a switching circuit coupled between the output of the power amplifier and the second inductor.

Abstract: Embodiments of the present disclosure present a hyper-square interconnect topology and advanced ring-based AllReduce operations. In some embodiments, a topology is provided that is an improvement over conventional interconnect topologies by eliminating delays associated with long wirings. In some embodiments, computing nodes are divided into sub-sections to better allocate computing tasks, and the system can be optimized to divide up the computing nodes by maximizing the number of square sub-sections in the topology. In some embodiments, the system can be optimized to select square sub-sections first for each computing task. Each sub-section can comprise some computing nodes or all computing nodes in the hyper-square interconnect topology. This flexibility allows the hyper-square interconnect topology to utilize the computing nodes more efficiently by assigning appropriate numbers of computing nodes to each computing task based on the computing need of the computing task.

Abstract: A vehicle device setting method including: capturing, by an image sensing unit, a first image frame; recognizing a user ID according to the first image frame; showing ID information of the recognized user ID on a screen or by a speaker; capturing a second image frame; generating a confirm signal when a first user expression is recognized by calculating an expression feature in the second image frame and comparing the recognized expression feature with stored expression data associated with a predetermined user expression to confirm whether the recognized user ID is correct or not according to the second image frame captured after the ID information is shown; controlling an electronic device according to the confirm signal; and entering a data update mode instructed by the user and updating setting information of the electronic device by current electronic device setting according to a saving signal generated by confirming a second user expression in a third image frame captured after the user ID is confirmed

Abstract: The disclosure provides an ultrasonic signal detection circuit including a sensing circuit, a unidirectional conduction circuit and a source follower circuit. The sensing circuit is connected to an input terminal of the source follower circuit through the unidirectional conduction circuit; the sensing circuit is configured to generate a piezoelectric signal according to a received ultrasonic echo signal and output the piezoelectric signal to the unidirectional conduction circuit. The piezoelectric signal is an alternating current signal; the unidirectional conduction circuit is configured to rectify the alternating current signal to only allow a forward or a reverse current portion thereof to pass through. The forward/reverse current portion charges/discharges the input terminal of the source follower circuit after passing through the unidirectional conduction circuit.

Abstract: The disclosed system may include an antenna and an antenna matching network. The antenna matching network may include an aperture tuner configured to shift a frequency response of the antenna and an impedance tuner configured to dynamically change an amount of radiated power for the antenna. The antenna matching network may be positioned at least a specified minimum distance from the antenna according to various operating characteristics of the antenna. Various other apparatuses, wearable electronic devices, and methods of manufacturing are also disclosed.

Abstract: The disclosed system may include a support structure, a lens mounted to the support structure, where the lens includes at least one conductive layer that includes conductive material, and an antenna disposed on the support structure within a specified maximum distance from the lens. Various characteristics of the lens or the antenna may be modified to reduce coupling between the antenna and the layer of conductive material in the lens. Various other wearable devices, apparatuses, and methods of manufacturing are also disclosed.

Abstract: A method for manufacturing a flash memory device is provided. The method includes: providing a substrate structure including a substrate, a plurality of active regions and a plurality of first isolation regions alternately arranged in a first direction and extending in a second direction different from the first direction, a plurality of gate structures on the substrate, the gate structures being spaced apart from each other and extending in the second direction, and a gap structure between the gate structures; forming an overhang surrounding an upper portion of the gate structures to form a gap structure between the gate structures; and forming a second isolation region filling an upper portion of the gap structures and leaving a first air gap between the gap structures.

Abstract: Improved convolutional layers for neural networks can obtain an input feature map comprising groups of channels. Each group of channels can include one or more channels having a predetermined size. The predetermined sizes can differ between the groups. The convolutional layer can generate, for each one of the groups of channels, an output channel. Generation of the output channel can include resizing the channels in the remaining groups of channels to match the predetermined size of the each one of the groups of channels. Generation can further include combining the channels in the each one of the groups with the resized channels and applying the combined channels to a convolutional sub-layer to generate the output channel.

Abstract: A system includes a high-bandwidth inter-chip network (ICN) that allows communication between parallel processing units (PPUs) in the system. For example, the ICN allows a PPU to communicate with other PPUs on the same compute node or server and also with PPUs on other compute nodes or servers. In embodiments, communication may be at the command level (e.g., at the direct memory access level) and at the instruction level (e.g., the finer-grained load/store instruction level). The ICN allows PPUs in the system to communicate without using a PCIe bus, thereby avoiding its bandwidth limitations and relative lack of speed. The respective routing tables comprise information of multiple paths to any given other PPU.

Abstract: Systems and methods for exchanging synchronization information between processing units using a synchronization network are disclosed. The disclosed systems and methods include a device including a host and associated neural processing units. Each of the neural processing units can include a command communication module and a synchronization communication module. The command communication module can include circuitry for communicating with the host device over a host network. The synchronization communication module can include circuitry enabling communication between neural processing units over a synchronization network. The neural processing units can be configured to each obtain a synchronized update for a machine learning model. This synchronized update can be obtained at least in part by exchanging synchronization information using the synchronization network. The neural processing units can each maintain a version of the machine learning model and can synchronize it using the synchronized update.