Patents by Inventor Liang Hou

Liang Hou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136946
    Abstract: This patent presents a multidimensional space vector modulation (MDSVM) circuit formed by coupling a half-bridge logic control circuit not directly coupled to electronic components with at least three half-bridge logic control circuits coupled to electronic components. The half-bridge logic control circuit not directly coupled with any electronic components can form a full-bridge circuit with any other half-bridge logic control circuit coupled with electronic components. Therefore, users can further control the voltage difference between both ends of each electronic component separately and then individually control the strength and direction of current flowing through each electronic component and solving the problem of control attributed to the complexity of prior art.
    Type: Application
    Filed: April 10, 2023
    Publication date: April 25, 2024
    Applicant: TENSOR TECH CO., LTD
    Inventors: Shang Jung LEE, Po-Hsun YEN, Yung-Cheng CHANG, Sung-Liang HOU
  • Publication number: 20240136423
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 25, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240128353
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 11953609
    Abstract: The present disclosure provides a vehicle positioning method, an apparatus and an autonomous driving vehicle, relating to autonomous driving in the technical field of artificial intelligence, which can be applied to high-definition positioning of the autonomous driving vehicle, the method including: if there is no high-definition map in a vehicle, acquiring intermediate pose information of the vehicle based on a global navigation satellite system and/or an inertial measurement unit in the vehicle, and determining the intermediate pose information as global positioning information; acquiring local positioning information; performing fusion processing to the global pose information and the local pose information to obtain fused pose information; performing compensation processing to the fused pose information according to the global attitude angle information and the local attitude angle information to obtain a position of the vehicle.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: April 9, 2024
    Assignee: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Shenhua Hou, Yuzhe He, Liang Peng, Guowei Wan
  • Publication number: 20240106119
    Abstract: An antenna includes a patch radiator, a feed point, a first ground point, and a second ground point. The patch radiator has a first side edge and an intersecting second side edge, and a first coupling contact and a second coupling contact. The patch radiator is coupled to the first ground point and the second ground point through the first coupling contact and the second coupling contact, and is biased coupled to the feed point. A distance between the first coupling contact and the first side edge, a distance between the first coupling contact and the second side edge, a distance between the second coupling contact and the first side edge, and a distance between the second coupling contact and the second side edge are all greater than or equal to 0.05?, where ? is an operating wavelength of the antenna in an operating frequency band range of the antenna.
    Type: Application
    Filed: December 10, 2021
    Publication date: March 28, 2024
    Inventors: Dong Yu, Jiaming Wang, Liang Xue, Yuanpeng Li, Hanyang Wang, Meng Hou
  • Patent number: 11935947
    Abstract: An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: March 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240071888
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
  • Patent number: 11894441
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: February 6, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240038847
    Abstract: A gallium nitride device and a method for manufacturing a high electron mobility transistor are provided. The gallium nitride device includes a substrate, a channel layer disposed on the substrate, a barrier layer disposed on the channel layer, a cap layer disposed on the barrier layer, a gate disposed on the cap layer, a source, a drain, and ohmic sidewall dams. The source and the drain are formed in the cap layer and the barrier layer. Each of the source and the drain has a trench portion, and a contact below the trench portion and protruding into the channel layer. The ohmic sidewall dams are disposed on a sidewall of the trench portion of each of the source and the drain.
    Type: Application
    Filed: August 21, 2022
    Publication date: February 1, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chih Tung Yeh, Chun-Liang Hou
  • Publication number: 20240014310
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20230378314
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.
    Type: Application
    Filed: July 13, 2023
    Publication date: November 23, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20230369448
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.
    Type: Application
    Filed: July 13, 2023
    Publication date: November 16, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 11804544
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: October 31, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20230335614
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.
    Type: Application
    Filed: June 28, 2023
    Publication date: October 19, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
  • Patent number: 11791407
    Abstract: A semiconductor transistor structure with reduced contact resistance includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a two-dimensional electron gas (2DEG) layer at an interface between the barrier layer and the channel layer, and a recess in a contact region. The recess penetrates through the barrier layer and extends into the channel layer. An Ohmic contact metal is disposed in the recess. The Ohmic contact metal is in direct contact with a vertical side surface of the barrier layer in the recess and in direct contact with an inclined side surface of the 2DEG layer and the channel layer in the recess.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: October 17, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Tung Yeh, Chun-Liang Hou, Wen-Jung Liao, Ruey-Chyr Lee
  • Publication number: 20230292960
    Abstract: A kitchen container includes a container body, a cover body, a rotating mechanism, and a drive element. The rotating mechanism includes a moving rack transversely movable on the cover body, a main gear driven by the moving rack and a drive gear driven by the main gear. The drive element is connected with the drive gear. The main gear is linked with the drive gear through at least one transmission set. The transmission set is disposed on a sliding trough and is shifted with rotation of the main gear. The transmission set shifts on the sliding trough to be a linked state with the drive gear when the main gear rotates in a rotating direction, and the transmission set shifts on the sliding trough to be disengaged from the linked state with the drive gear when the main gear rotates in another rotating direction.
    Type: Application
    Filed: March 18, 2022
    Publication date: September 21, 2023
    Inventors: Yi-Liang HOU, Che-Hsin LIAO, Chen-Yu CHENG
  • Publication number: 20230290839
    Abstract: A high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation layer and the mesa structure. The mesa structure includes a channel layer, a barrier layer on the channel layer, two opposite first edges extending along a first direction, and two opposite second edges extending along a second direction. The contact structure includes a body portion and a plurality of protruding portions. The body portion penetrates through the passivation layer. The protruding portions penetrate through the barrier layer and a portion of the channel layer. In a top view, the body portion overlaps the two opposite first edges of the mesa structure without overlapping the two opposite second edges of the mesa structure.
    Type: Application
    Filed: May 18, 2023
    Publication date: September 14, 2023
    Inventors: Chih-Tung Yeh, Chun-Liang Hou, Wen-Jung Liao, Chun-Ming Chang, Yi-Shan Hsu, Ruey-Chyr Lee
  • Patent number: 11749740
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: September 5, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 11735644
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: August 22, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
  • Patent number: D1008187
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: December 19, 2023
    Inventor: Liang Hou