Abstract: Technology is disclosed herein for detecting leaky word lines in a non-volatile storage system. The exact leaky word line may be located very rapidly using a divide and conquer approach. First a determination may be made whether at least one word line in a group such as any of the word lines in a block is leaky. This initial determination can be made very quickly. If no word line in the group is leaky, the search can end. However, responsive to a determination that at least one word line in the group is leaky, a divide and conquer search may be performed in which the group of the word lines is repeatedly divided into smaller sub-groups with selected smaller sub-groups tested for a short circuit until the leaky word line is located.

Abstract: A method for preparing a fluorescent semiconductor nanocrystal material. At least one semiconductor nanocrystal precursor is uniformly mixed with a micro/mesoporous material to form a mixture. The mixture is calcined under a temperature higher than or equal to a collapse temperature of the micro/mesoporous material to obtain the fluorescent semiconductor nanocrystal material. This application also provides a fluorescent semiconductor nanocrystal material prepared through the method, and applications thereof in the manufacture of a light-emitting diode device and a color conversion display panel.

Abstract: The memory device includes a plurality of memory cell that arranged in an array, which includes a plurality of channels that are in electrical communication with a source line. The memory device also includes a controller that is configured to erase the memory cells in at least one erase pulse. During the at least one erase pulse, the controller is configured to drive the source line to an elevated voltage that is equal to an erase voltage Vera plus a kick voltage V_kick for a duration t_kick. The controller is then configured to reduce the voltage of the source line to the erase voltage Vera such that a voltage of the channel remains elevated during the entire erase pulse, including after the voltage of the source line has been reduced to the erase voltage Vera.

Abstract: According to embodiments of the present disclosure, a method and a chip for cyclic code encoding, a circuit component, and an electronic device are provided. The method includes: generating, based on a first symbol sequence related to a first part of symbols in the K payload symbols, a first parity sequence corresponding to the first symbol sequence; generating, based on a second symbol sequence related to a second part of symbols in the K payload symbols, a second parity sequence corresponding to the second symbol sequence, where the first part of symbols are different from the second part of symbols; generating the (N?K) parity symbols based on the first parity sequence and the second parity sequence.

Abstract: A memory apparatus and operating method are provided. The apparatus includes memory cells connected to word lines and disposed in memory holes and configured to retain a threshold voltage. The memory holes are organized in rows grouped in strings. A control means is coupled to the word lines and the memory holes and programs the memory cells associated with a first one of the strings in a program operation and acquire a smart verify programming voltage in a smart verify operation including smart verify loops. The control means discards the smart verify programming voltage and determines another smart verify programming voltage in another smart verify operation on the memory cells associated with a second one of the strings in response to a quantity of the smart verify loops needed to complete programming of the memory cells associated with the first one of the strings being outside a predetermined threshold criteria.

Abstract: A display panel and a display terminal are provided. The display panel includes a first base plate, a second base plate, and a frame sealing adhesive layer. An electrical connection component is disposed in the frame sealing adhesive layer. The first base plate includes a first type of signal line at least partially disposed in a non-display region and an elevated conductive part. The elevated conductive part is electrically connected to the first type of signal line. A first end of the electrical connection component is connected to the elevated conductive part, and a second end of the electrical connection component is connected to a common electrode layer of the second base plate.

Abstract: Disclosed are a display panel and a manufacturing method. In the display panel, the first substrate has a signal trace and an insulating protection layer, and the signal trace is positioned in the seal area, and the insulation protection layer covers the signal trace, and the insulation protection layer has an opening to expose the signal trace. A portion of the insulating protection layer located in the active area has a first thickness, and a portion of the insulating protection layer located in the seal area has a second thickness, and the first thickness is greater than the second thickness.

Abstract: The present application discloses a display panel and a manufacturing method thereof. The display panel has a display area and a non-display area arranged around the display area. The display panel includes a first substrate, a second substrate, and a first seal, and a second seal disposed between the first substrate and the second substrate. The first seal is doped with conductors. In the present application, the first seal doped with the conductors is provided, and signal traces in the first substrate and a common electrode in the second substrate are conducted by the conductors.

Abstract: Systems, methods, and a computer readable storage medium for inferring asset types are provided. A method for determining asset types of one or more properties includes collecting, with a processor in communication with a memory, data related to the one or more properties and extracting features of the one or more properties from the data. The method includes determining a binary classifier for each asset type of a set of asset types and outputting each asset type of the one or more properties.

Abstract: A display panel and a liquid crystal display device are disclosed. The display panel includes a first substrate and a second substrate disposed opposite to each other, a display layer, and a sealant coating area defined in the display panel. Part of the display panel corresponding to the sealant coating area of a first side portion, a second side portion, and a third side portion includes a circuit unit, a first via hole and a second via hole defined on the circuit unit, a first insulating layer disposed in the first via hole, a second insulating layer disposed in the second via hole, a conductive electrode disposed in the first via hole and contacting the circuit unit, and spacers disposed on the first insulating layer and the second insulating layer.

Abstract: A method for quantitatively analyzing the reservoir formation of an ultra-deep evaporite-dolomite paragenesis system is performed as follows. A typical drilling core containing the evaporite-dolomite paragenesis system and a field section are observed. The logging data is subjected to single-factor analysis to determine the planar distribution regularity of the ultra-deep evaporite and the dolomite, and the analysis of sedimentary combination pattern and development evolution regularity is performed. The diagenetic system is determined, and the reservoir formation of the evaporite-dolomite paragenesis system is analyzed. Based on the above technical solutions, the property, the evolution path and the reservoir formation of sedimentation-diagenesis fluids in the evaporite-dolomite paragenesis system can be clarified.

Abstract: The present application provides a display panel, a manufacturing method thereof, and a display device. The display panel includes an upper substrate and a lower substrate that are arranged opposite to each other, a liquid crystal layer, a first electrode layer, and a second electrode layer, wherein the first electrode layer is disposed on a side of the upper substrate close to or away from the liquid crystal layer, the second electrode layer is disposed on a side of the upper substrate away from the first electrode layer, and the first electrode layer and the second electrode layer are electrically connected to each other.

Abstract: A liquid crystal phase shifter, a liquid crystal antenna, a communication apparatus, and a method for operating a liquid crystal phase shifter are provided. The liquid crystal phase shifter includes a microwave transmission structure and a phase adjustment structure opposite to each other, and a liquid crystal layer between the microwave transmission structure and the phase adjustment structure; wherein the phase adjustment structure comprises a plurality of phase adjustment units; the plurality of phase adjustment units are configured to change a dielectric constant of the liquid crystal layer according to a voltage applied to the phase adjustment units and a voltage applied to the microwave transmission structure, so as to adjust a phase of a microwave signal; and phase shift amounts adjusted by at least two of the plurality of phase adjustment units are different from each other.

Abstract: A liquid crystal phase shifter and an antenna are provided. The liquid crystal phase shifter includes first and second substrates opposite to each other, and a liquid crystal layer therebetween. The first substrate includes a first base plate and a first electrode thereon. The first electrode includes a main body structure on a side of the first base plate distal to the liquid crystal layer and at least one branch structure on a side of the first base plate proximal to the liquid crystal layer. The at least one branch structure is connected to the main body structure, and is spaced apart from each other in a lengthwise direction of the main body structure. The second substrate includes a second base plate and a second electrode thereon, and orthographic projections of the second electrode and the branch structure on the first base plate at least partially overlaps each other.

Abstract: The present application relates to a backplate for a recording microphone, and the recording microphone, belonging to the technical field of acoustoelectric conversion. A surface, facing a diaphragm, of the backplate is a spherical surface recessed away from the diaphragm. According to the backplate for the recording microphone and the recording microphone provided by the present application, the maximum sound pressure level that the recording microphone can withstand is effectively increased, and the occurrence of attachment between the diaphragm and the backplate under the action of high-sound-pressure-level signals is reduced.

Abstract: A data transmission method is performed by a first node, and the first node includes X encoding units that perform encoding in a first FEC mode. The method includes: first dividing, by the first node, to-be-encoded data into X groups of initial data, and encoding the X groups of initial data one by one by using the X encoding units, to obtain X groups of encoded data; and then distributing, by the first node, the X groups of encoded data to L links, to send the X groups of encoded data to a second node. Both X×N and X×K are integer multiples of L, N represents a length of a codeword of the first FEC mode, K represents a length of valid information bits in the codeword, and amounts of encoded data distributed to different links are the same.

Abstract: A liquid crystal phase shifter and an antenna are provided. The liquid crystal phase shifter includes: first and second substrates opposite to each other, a liquid crystal layer, a first electrode, and a second electrode that are between the first and second substrates, a first shielding electrode on a side of the first substrate distal to the liquid crystal layer, and a second shielding electrode on a side of the second substrate distal to the liquid crystal layer. The first and second electrodes generate an electric field when being provided with different voltages, respectively, to change a dielectric constant of the liquid crystal layer so as to adjust a phase shifting degree of a microwave signal. The first and second shielding electrodes shield radiation generated by the first and second electrodes when the different voltages are applied to the first and second electrodes, respectively.

Abstract: The disclosure discloses a superconducting magnet system and a quench protection circuit thereof. The quench protection circuit includes: a superconducting unit, a first diode integrated element, a second diode integrated element, a third diode integrated element, a low-temperature superconducting switch, a thermal shield and a vacuum vessel. The superconducting unit is composed of M superconducting coils connected in series. The low-temperature superconducting switch is connected to the first superconducting coil and the M-th superconducting coil. The first diode integrated element is connected in parallel with the low-temperature superconducting switch; the thermal shield and the second diode integrated element are connected in series and then connected in parallel at both ends of any symmetrical coil subsets in the superconducting unit.

Abstract: In some situations, a leak on a wordline may be a localized problem that causes data loss in a block that contains the wordline. In other situations, such as when the leak occurs near a peripheral wordline routing area, the leak can affect the entire memory die. The storage system provided herein has a fatal wordline leak detector that determines the type of leak and, accordingly, whether just the block should be retired or whether related blocks should be retired.

Abstract: There is provided a liquid crystal phase shifter including first and second substrates opposite to each other, and a liquid crystal layer between the first and second substrates. The first substrate includes a first base plate and a first electrode layer at a side of the first base plate proximal to the liquid crystal layer. The second substrate includes a second base plate and a second electrode layer at a side of the second base plate proximal to the liquid crystal layer. The first electrode layer includes a main body structure having a first side and a second side opposite to each other with respect to an extension direction of the main body structure, and a plurality of branch structures connected to at least one of the first side and the second side of the main body structure. The second electrode layer includes a plurality of first fingers.