Patents by Inventor Liang Liu

Liang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12205957
    Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and a plurality of pixels arranged on the base substrate, each pixel includes a plurality of sub-pixels, and each sub-pixel includes a first active layer, a first gate insulation layer, a gate electrode, a second gate insulation layer, a second active layer, a first insulation layer, a source electrode and a drain electrode laminated one on another. The source electrode is connected with the first active layer through a via hole penetrating through the first insulation layer, the second gate insulation layer and the first gate insulation layer, and the source electrode and the drain electrode are connected with the second active layer through a via hole penetrating through the first insulation layer.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: January 21, 2025
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xinguo Wu, Fengguo Wang, Hong Liu, Yu Feng, Liang Tian, Haidong Wang, Shicheng Song
  • Patent number: 12204674
    Abstract: Embodiments of the present disclosure relate to a permission setting method and apparatus, a device, and a medium. The method includes: displaying a permission customization control, in response to a trigger operation on a permission setting object of task information, the permission setting object including a first information object and/or a second information object, the second information object being subordinate to the first information object; displaying a permission editing interface, in response to a trigger operation on the permission customization control, and receiving customization permission information via the permission editing interface; and displaying the customization permission information corresponding to the permission setting object. Therefore, a hierarchy structure based on the task information satisfies a setting need for content-based permission customization, and improves a permission management efficiency.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: January 21, 2025
    Assignee: BEIJING ZITIAO NETWORK TECHNOLOGY CO., LTD.
    Inventors: Wenzong Ma, Liang Chen, Yingtao Liu, Wei Ren, Qiushuo Huang, Yuejiang Yuan, Hao Huang, Jianhui Wu, Yalong Zou, Linghui Zhou, Mengzhang Wu, Yanhui Zhao, Xinlei Guo
  • Patent number: 12207384
    Abstract: Disclosed is a top surface wave antenna of a spherical Tokamak, comprising a feedback waveguide, a brim, sub-waveguides, and a metal base. The lower end of the feed waveguide is connected to one end of the metal base, and one side of the feed waveguide is connected to the brim. The brim is towards a length direction of the metal base. A plurality of sub-waveguides are arranged on the metal base at equal intervals, the tops of the sub-waveguides are not higher than the height of the metal base, and the sub-waveguides are arranged in a rising line trend. The feed waveguide serves as a microwave input port. The top surface wave antenna of the spherical Tokamak is mainly used in a high-power Tokamak system and acts on the low-hybrid wave current driving together with an external antenna so as to obtain a better effect.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: January 21, 2025
    Assignee: Anhui Agricultural University
    Inventors: Yaoyao Wang, Qing Zhou, Zhenxing Wang, Chengzhou Liu, Wendong Ma, Liang Zhu, Jiafang Shan
  • Patent number: 12206881
    Abstract: Aspects of the disclosure provide methods and apparatuses for video encoding and decoding. The apparatuses include an apparatus for video decoding. Processing circuitry of the apparatus for video decoding can decode coded information for a current block from a coded video bitstream. The coded information indicates a bi-prediction motion compensation mode for the current block. The processing circuitry determines, based on current neighboring reconstructed samples of the current block, first neighboring reconstructed samples of a first prediction block, and second neighboring reconstructed samples of a second prediction block, a weight used in the bi-prediction motion compensation mode. The processing circuitry reconstructs samples in the current block based on a weighted average of corresponding samples in the first prediction block and the second prediction block using the determined weight.
    Type: Grant
    Filed: November 15, 2023
    Date of Patent: January 21, 2025
    Assignee: TENCENT AMERICA LLC
    Inventors: Xin Zhao, Liang Zhao, Shan Liu
  • Publication number: 20250024055
    Abstract: The various implementations described herein include methods and systems for encoding and decoding video. For example, a computing system receives a video bitstream that includes a current block and a syntax element. The current block is encoded using information from a set of reference blocks. The system determines, based on the syntax element, whether the current block is encoded in a compound weighted prediction (CWP) mode. The system decodes the current block using a set of weighted prediction factors when the current block is encoded in the CWP mode. When the current block is not encoded in the CWP mode, the system decodes the current block using an implicit masked blending mode based on a weighted average of reference values associated with the set of reference blocks.
    Type: Application
    Filed: September 1, 2023
    Publication date: January 16, 2025
    Inventors: Han GAO, Liang Zhao, Xin Zhao, Jing Ye, Shan Liu
  • Publication number: 20250022884
    Abstract: Provided is an array substrate, including: a substrate; a first insulating layer and a second insulating layer that are successively stacked; a first electrode disposed on a side, proximal to the substrate, of the first insulating layer; a second electrode disposed between the first insulating layer and the second insulating layer; and a lap electrode disposed on a side, distal from the substrate, of the second insulating layer. The array substrate includes a plurality of first vias and a plurality of second vias. The lap electrode is electrically connected to the first electrode and is electrically connected to the second electrode. An orthographic projection of the first electrode on the substrate is overlapped with an orthographic projection of the second electrode on the substrate, and covers a region between at least one of the first vias and at least one of the second vias.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 16, 2025
    Applicants: Hefei BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Quanzhou LIU, Haijiao QIAN, Liang CHEN, Zexu LIU
  • Publication number: 20250024070
    Abstract: A computing system receives a video bitstream that comprises a current block within a current picture and one or more syntax elements. The current block is encoded in a subblock-based motion vector (MV) refinement mode using information from a first reference block and a second reference block. The system applies a MV refinement to generate a refined first MV indicating a first location of the first reference block and a refined second MV indicating a second location of the second reference block. Subsequent to applying the MV refinement, in accordance with a determination that (i) the first location is outside of a first set of reference boundaries and/or (ii) the second location is outside of a second set of reference boundaries, the system decodes the current block using a weighted average of respective values from the first and second locations.
    Type: Application
    Filed: September 1, 2023
    Publication date: January 16, 2025
    Inventors: Han GAO, Xin Zhao, Liang Zhao, Jing Ye, Shan Liu
  • Publication number: 20250019144
    Abstract: A holding device for a top-opening substrate container includes a holding assembly for pushing a substrate actuator disposed at a substrate to operate. The holding assembly includes a holding body and a pushing actuator. The pushing actuator includes a first guiding sloped surface for pressing against a second guiding sloped surface of an inner surface of a container door structure. The first guiding sloped surface causing corresponding pushing and displacement between the first guiding sloped surface and the second guiding sloped surface according to a supporting force of the container door structure. A pushing section is connected to the first guiding sloped surface, and capable of correspondingly pushing the substrate actuator to operate according to a level of the pushing and displacement of the first guiding sloped surface, such that the substrate actuator displaces substrates and stacks the substrates with another in layers.
    Type: Application
    Filed: December 1, 2023
    Publication date: January 16, 2025
    Inventors: MING-CHIEN CHIU, YUNG-CHIN PAN, CHENG-EN CHUNG, WEI-CHIEN LIU, TZU-NING HUANG, TZU-CHI CHAO, TZU-WEI HUANG, CHIA-LIANG LIU
  • Publication number: 20250024016
    Abstract: A method includes receiving a bitstream that includes coded information of a sequence of pictures. The coded information indicates an inter prediction of a current block in a current picture, and an adjustment factor to a linear formular that is used in a formular based inter prediction of the inter prediction. The formular based inter prediction generates a prediction sample of the current block based on a linear formular with one or more reconstructed samples in a reference block being input to the linear formular, the linear formular includes one or more parameters derived based on a current template of the current block and a reference template of the reference block. The method also includes applying the adjustment factor on the linear formular to generate an adjusted linear formular, and determining at least a reconstructed sample of the current block according to the adjusted linear formular.
    Type: Application
    Filed: July 10, 2024
    Publication date: January 16, 2025
    Applicant: Tencent America LLC
    Inventors: Lien-Fei CHEN, Roman Chernyak, Liang Zhao, Xin Zhao, Biao Wang, Madhu Peringassery Krishnan, Shan Liu
  • Publication number: 20250017978
    Abstract: The disclosure relates to a traditional Chinese medicine composition, comprising active ingredients derived from Cornu caprae or Cornu saigae tataricae, Radix scutellariae, Bulbus fritillariae ussuriensis, Radix glycyrrhizae, Radix et rhizoma rhei, Gypsum fibrosum, Calculus bovis artifactus and Lapis Chloriti, the said active ingredients comprise in parts by weight: at least 1600 parts of amino acids; at least 120 parts of gallic acid; at least 130 parts of liquiritin; at least 20 parts of liquiritigenin; at least 400 parts of baicalin; at least 40 parts of oroxyloside; at least 120 parts of wogonoside; at least 280 parts of glycyrrhizic acid; at least 12 parts of chrysin-7-O-?-D-glucoronic acid; at least 50 parts of aloe-emodin-8-O-?-D-glucopyranoside; at least 30 parts of chrysophanol-1-O-?-D-glucopyranoside; at least 45 parts of chrysophanol-8-O-?-D-glucopyranoside; at least 260 parts of hyodeoxycholic acid; at least 150 parts of cholic acid.
    Type: Application
    Filed: September 13, 2022
    Publication date: January 16, 2025
    Inventors: Wei XIAO, Haibo LI, Guiping LI, Tuanjie WANG, Shasha GU, Xu LI, Quanchang ZHANG, Liang CAO, Wenjun LIU, Chenfeng ZHANG, Zhenzhong WANG
  • Publication number: 20250016972
    Abstract: A semiconductor device and methods for manufacturing the same are provided. The semiconductor device includes a substrate, a NFET structure on the substrate, and a PFET structure on the substrate. The NFET structure includes a first source region, a first drain region and a first gate structure between the first source region and the first drain region. The first gate structure includes a first high-k dielectric layer and a first gate layer on the first high-k dielectric layer. The PFET structure includes a second source region, a second drain region and a second gate structure between the second source region and the second drain region. The second gate structure includes a second high-k dielectric layer and a second gate layer on the second high-k dielectric layer. A thickness of the first high-k dielectric layer is larger than a thickness of the second high-k dielectric layer.
    Type: Application
    Filed: August 9, 2023
    Publication date: January 9, 2025
    Inventors: Kuan-Liang LIU, Chiun-Min CHIOU
  • Publication number: 20240407718
    Abstract: Systems, devices, and methods for dermal treatments are provided. Various systems, devices, and methods provide treatment options with a handheld device, intradermal or subdermal fluid delivery via a needle or microneedle. For fluid delivery, system can include an injector, fluid-filled container, and a needle or hollowed microneedle. A fluid-filled container can be compatibly coupled with a treatment device such to perform the various dermal treatments. Further, fluid delivery systems can be utilized in a number of applications, including medications and supplements for the skin.
    Type: Application
    Filed: September 26, 2022
    Publication date: December 12, 2024
    Applicant: ACOM Labs, Inc.
    Inventors: Jack Phillip Abraham, Callie Mackenzie Roberts, Liang Liu, Dehui Kong, Paul F. Bente, IV, Healey Thomas Cypher
  • Patent number: 12165911
    Abstract: Various embodiments of the present application are directed towards a method for forming a semiconductor-on-insulator (SOI) substrate with a thick device layer and a thick insulator layer. In some embodiments, the method includes forming an insulator layer covering a handle substrate, and epitaxially forming a device layer on a sacrificial substrate. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates, and the sacrificial substrate is removed. The removal includes performing an etch into the sacrificial substrate until the device layer is reached. Because the device layer is formed by epitaxy and transferred to the handle substrate, the device layer may be formed with a large thickness. Further, because the epitaxy is not affected by the thickness of the insulator layer, the insulator layer may be formed with a large thickness.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: December 10, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Shih-Pei Chou, Yu-Hung Cheng, Yeur-Luen Tu
  • Publication number: 20240406822
    Abstract: The present application provides an information processing method and related devices. The information processing method includes: performing, by a terminal, a first operation; wherein the first operation includes at least one of the following: transmitting first information to a first base station; wherein the first information is used to indicate first status information of a QoE configuration, and the first status information of the QoE configuration is current status information of a QoE configuration which the terminal is in; receiving second information transmitted by a second base station; wherein the second information is used to indicate second status information of a QoE configuration, and the second status information of the QoE configuration is status information of a QoE configuration indicated by the second base station for the terminal to be in. The first base station and the second base station are the same base stations or different base stations.
    Type: Application
    Filed: October 13, 2022
    Publication date: December 5, 2024
    Inventors: Liang LIU, Xingyu HAN, Nan HU, Nan LI
  • Patent number: 12159873
    Abstract: A method includes: receiving a composite substrate including a first region and a second region, the composite substrate comprising a semiconductor substrate and an insulator layer over the semiconductor substrate; bonding a silicon layer to the composite substrate; depositing a capping layer over the silicon layer; forming a trench through the capping layer, the silicon layer and the insulator layer, the trench exposing a surface of the semiconductor substrate in the first region; growing an initial epitaxial layer in the trench; removing the capping layer to form an epitaxial layer from the silicon layer and the initial epitaxial layer; forming a transistor layer over the epitaxial layer, the transistor layer including a first transistor and a second transistor in the first region and the second region, respectively; and forming an interconnect layer over the transistor layer and electrically coupling the first transistor to the second transistor.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: December 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yung-Chih Tsai, Chih-Ping Chao, Chun-Hung Chen, Shaoqiang Zhang, Kuan-Liang Liu, Chun-Pei Wu, Alexander Kalnitsky
  • Publication number: 20240390525
    Abstract: Disclosed herein is a device for producing NIR-II contrast agents from fluorescent substances and serum albumin. The device comprises a first container, a mixing vessel, a first tube, and a first flow adjusting valve. According to the embodiments of the present disclosure, the first container and the mixing vessel are connected through the first tube, and the first flow adjusting valve is coupled to the first tube. Also disclosed herein are methods for producing the NIR-II contrast agents by using the present device.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 28, 2024
    Applicant: Chung Yuan Christian University
    Inventors: Cheng-An LIN, Chien-Liang LIU, Yi-Tang SUN
  • Patent number: 12153954
    Abstract: The embodiments of the present invention provide a dynamic production scheduling method, apparatus and electronic device based on deep reinforcement learning, which relate to the technical field of Industrial Internet of Things, and can reduce the overall processing time of jobs on the basis of not exceeding the processing capacity of production device.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: November 26, 2024
    Assignee: Beijing University of Posts and Telecommunications
    Inventors: Liang Liu, Xiaolong Zheng, Huadong Ma, Zihui Luo, Chengling Jiang
  • Patent number: 12156044
    Abstract: Embodiments of the present disclosure provide a reporting method and a configuration method for minimization of drive tests information, a terminal and a network device. The reporting method applied to a terminal side comprises: receiving configuration information sent by a network device for a minimization of drive tests information report; creating, according to the configuration information, a measurement log regarding minimization of drive tests information; and reporting to the network device, the measurement log regarding the minimization of drive tests information.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: November 26, 2024
    Assignees: CHINA MOBILE COMMUNICATION CO., LTD RESEARCH INSTITUTE, CHINA MOBILE COMMUNICATIONS GROUP CO., LTD.
    Inventors: Xiaoran Zhang, Nan Hu, Liang Liu, Nan Li
  • Publication number: 20240385530
    Abstract: Etch bias is determined based on a curvature of a contour in a substrate pattern. The etch bias is configured to be used to enhance an accuracy of a semiconductor patterning process relative to prior patterning processes. In some embodiments, a representation of the substrate pattern is received, which includes the contour in the substrate pattern. The curvature of the contour of the substrate pattern is determined and inputted to a simulation model. The simulation model includes a correlation between etch biases and curvatures of contours. The etch bias for the contour in the substrate pattern is outputted by the simulation model based on the curvature.
    Type: Application
    Filed: May 29, 2022
    Publication date: November 21, 2024
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Jiao HUANG, Jinze Wang, Yan YAN, Yongfa FAN, Liang Liu, Mu FENG
  • Patent number: 12145974
    Abstract: Provided is a fusion protein containing GLP-1 and FGF21 linked through an immunoglobulin Fc portion. Each of the GLP-1 and FGF21 can be substituted with its analogues or variants and, the Fc portion, which can be derived from IgG4, can include substitutions that further enhance the fusion protein's stability and activity. These fragments can be linked together through peptide linkers. The fusion protein can be used clinically to reduce glucose and lipid levels and body weight.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: November 19, 2024
    Assignee: SUNSHINE LAKE PHARMA CO., LTD.
    Inventors: Chao Chen, Shushan Lin, Yu Li, Xiaofeng Chen, Liang Liu, Zheng Fu