Patents by Inventor Liang Pan

Liang Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7071032
    Abstract: A new method is provided of treating the wafer prior to the process of singulating the wafer into individual die. A first surface of the wafer over which CMOS image sensor devices have been created is coated with a layer of material that is non-soluble in water. The wafer is attached to a tape by bringing a second surface of the wafer in contact with the tape. The wafer is singulated by approaching the first surface of the wafer and by sawing first through the layer of material that has been coated over the first surface of the wafer and by then sawing through the wafer, stopping at the surface of the tape. A thorough water rinse is applied to the surface of the singulated wafer, followed by a wafer clean applying specific chemicals for this purpose. The singulated die is now removed from the tape and further processed by applying steps of die mount, wire bonding, surrounding the die in a mold compound and marking the package.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: July 4, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Jen Hsu, Yu-Kung Hsiao, Chih-Kung Chang, Sheng-Liang Pan, Fu-Tien Weng
  • Patent number: 7009772
    Abstract: A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: March 7, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Kung Hsiao, Sheng-Liang Pan, Bii-Juno Chang, Kuo-Liang Lu
  • Publication number: 20060001945
    Abstract: A method for use in manufacturing a microelectromechanical system, such as a reflective stealth mirror includes the steps of: forming an I-shape mirror structure; forming a spacer layer over the I-shape mirror structure; and patterning the spacer layer to form at least one spacer along a side of the I-shape mirror structure.
    Type: Application
    Filed: December 2, 2004
    Publication date: January 5, 2006
    Inventors: Shan-Hua Wu, Fei-Yun Chen, Wei-Ya Wang, Hung-Hsin Liu, Sheng-Liang Pan
  • Publication number: 20050287814
    Abstract: An in-situ method of stripping a layer of resist from a substrate or wafer utilizes pure H2O plasma recipe to substantially prevent charges from accumulating on the substrate or wafer during stripping of the layer of resist.
    Type: Application
    Filed: May 27, 2005
    Publication date: December 29, 2005
    Inventors: Yuan-Bang Lee, Tzu-Yang Wu, Sheug-Liang Pan, U. Lin, Yu-Chih Lai, De-Fang Chen
  • Patent number: 6971270
    Abstract: A method and apparatus for measuring the vacuum gripping strength of a vacuum wand or robotic arm provides a pressure gauge and a conduit extending from the pressure gauge and terminating at an opening formed in a receiving surface. A vacuum wand head is positioned on the receiving surface such that the gripping surface of the vacuum wand forms a conterminous boundary with the receiving surface and the vacuum port of the vacuum wand is aligned over the opening formed in the receiving surface. The receiving surface replicates a wafer surface so that the same vacuum gripping strength as would be delivered to a wafer being gripped by the vacuum wand, is thereby sensed by the pressure gauge. Spring loaded positioning members act in conjunction with a clamp member and a mechanical stop position the vacuum wand head in the receiving area and over the opening and also to assure that the gripping surface of the vacuum wand head is flush against the surface of the receiving area.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: December 6, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ruei-Hung Jang, Chih-Lin Ying, Tsung-Chi Hsieh, Sheng-Liang Pan, Ching-Hui Tai
  • Publication number: 20050230407
    Abstract: A toxic waste receptacle with a cover includes an exhaust hood that exhausts toxic gases from the waste receptacle and an interior bag closure mechanism that is operable externally and closes the bag disposed within an interior receptacle of the toxic waste receptacle. The exhaust system exhausts toxic gases from the interior of the waste receptacle and the internal bag closure mechanism confines harmful toxic gases within the bag prior to opening the cover of the waste receptacle to prevent toxic gases from escaping into the work environment.
    Type: Application
    Filed: March 26, 2004
    Publication date: October 20, 2005
    Inventors: Chun-Li Fang, Ruei-Hung Jang, Wen-Hung Tseng, Tsung-Chi Hsieh, Sheng-Liang Pan
  • Publication number: 20050183510
    Abstract: A method and apparatus for measuring the vacuum gripping strength of a vacuum wand or robotic arm provides a pressure gauge and a conduit extending from the pressure gauge and terminating at an opening formed in a receiving surface. A vacuum wand head is positioned on the receiving surface such that the gripping surface of the vacuum wand forms a conterminous boundary with the receiving surface and the vacuum port of the vacuum wand is aligned over the opening formed in the receiving surface. The receiving surface replicates a wafer surface so that the same vacuum gripping strength as would be delivered to a wafer being gripped by the vacuum wand, is thereby sensed by the pressure gauge. Spring loaded positioning members act in conjunction with a clamp member and a mechanical stop position the vacuum wand head in the receiving area and over the opening and also to assure that the gripping surface of the vacuum wand head is flush against the surface of the receiving area.
    Type: Application
    Filed: February 19, 2004
    Publication date: August 25, 2005
    Inventors: Ruei-Hung Jang, Chih-Lin Ying, Tsung-Chi Hsieh, Sheng-Liang Pan, Ching-Hui Tai
  • Patent number: 6926818
    Abstract: A method of forming a bump structure through the use of an electroplating solution, comprising the following steps. A substrate having an overlying conductive structure is provided. A patterned dry film resist is formed over the conductive structure. The patterned dry film resist having a trench exposing a portion of conductive structure. The patterned dry film resist adhering to the conductive structure at an interface. The structure is treated with a treatment that increases the adherence of the patterned dry film resist to the conductive structure at the interface. A conductive plug is over the exposed portion of the conductive structure within the trench through the use of the electroplating solution. The increased adhesion of the patterned dry film resist to the conductive structure at the interface preventing the electroplating solution from penetrating the interface of the patterned dry film resist and the conductive structure during the formation of the conductive plug.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: August 9, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yih-Ann Lin, Tung-Heng Shie, Kai-Ming Ching, Sheng-Liang Pan, Kuo-Liang Lu
  • Publication number: 20050169577
    Abstract: A device for a passive module of optical communication includes a first housing made of material with low coefficient of thermal expansion, and a second housing made of material with negative coefficient of thermal expansion. A longitudinal receiving recess is defined at the first housing for receiving the second housing, thereby effectively and accurately restraining shift of reflective central wavelength of a fiber Bragg grating (FBG) under variation of environment temperature during working. Also, A tunable mechanism including an elastic recess is formed with the first housing and a tunable member which can tune the width of the elastic recess through pressing the first housing, thereby independently switching reflective central wavelength of the FBG at desire.
    Type: Application
    Filed: February 4, 2004
    Publication date: August 4, 2005
    Inventors: Chih-Liang Pan, Hsing-Lung Ting, Winyann Jang
  • Patent number: 6911097
    Abstract: Provided is a process and apparatus characterized by a gas distribution plate in which a gas supply manifold directs gas bubbles from the bottom of a process tank upward and between wafers contained in a cassette and supported therewithin. This improved method and apparatus is used for effectively stripping photoresist from the larger semiconductor wafers having dense top conductive patterns with protuberant sidewalls. The method provides a scrubbing action that is parallel to the device array being formed on the wafer's surface. Broadly stated, the method of a chemical action on large substrates supported adjacent respective edge portions thereof in a carrier includes submerging the carrier and substrates supported thereby in a process tank containing a liquid chemical, and a gas distribution plate disposed on the bottom of the tank for directing gas bubbles upward and parallel to the surfaces of each substrate contained in the carrier to ensure that a uniform chemical action occurs.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: June 28, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chie-Chi Chen, Wen-Hsiang Tseng, Sheng-Liang Pan, Jen-Shiang Fang
  • Patent number: 6878642
    Abstract: A new method to form passivation openings in the manufacture of an integrated circuit device is achieved. The passivation openings have gradually sloping sidewalls that allow a protective tape to be completely removed without leaving adhesive residue. A semiconductor substrate is provided. A passivation layer is deposited. An organic photoresist layer is deposited overlying the passivation layer. The organic photoresist layer is patterned to expose the passivation layer in areas where passivation openings are planned. The organic photoresist layer is reflowed to create gradually sloping sidewalls on the organic photoresist layer. The passivation layer is etched through to from the passivation openings. The passivation openings are thereby formed with gradually sloping sidewalls. The organic photoresist layer is stripped away. A protective tape is applied overlying the passivation layer and the passivation openings. The protective tape is removed.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: April 12, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hung-Jen Hsu, Yu-Kung Hsiao, Chih-Kung Chang, Sheng-Liang Pan, Kuo-Liang Lu
  • Publication number: 20050041296
    Abstract: A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.
    Type: Application
    Filed: October 4, 2004
    Publication date: February 24, 2005
    Inventors: Yu-Kung Hsiao, Sheng-Liang Pan, Bii-Juno Chang, Kuo-Liang Lu
  • Patent number: 6849533
    Abstract: A method for fabricating a microelectronic product provides for forming a planarizing layer upon a bond pad and a topographic feature, both formed laterally separated over a substrate. The planarizing layer is formed with a diminished thickness upon the bond pad such that it may be readily etched to expose the bond pad while employing as a mask an additional layer formed over the topographic feature but not over the bond pad. The method is particularly useful for forming color filter sensor image array optoelectronic products with attenuated bond pad corrosion.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: February 1, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., LTD
    Inventors: Chih-Kung Chang, Yu-Kung Hsiao, Sheng-Liang Pan, Fu-Tien Wong, Chin-Chen Kuo, Chung-Sheng Hsiung, Hung-Jen Hsu, Yi-Ming Dai, Po-Wen Lin, Te-Fu Tseng
  • Patent number: 6821810
    Abstract: A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectronic fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for lowcost, high volume manufacturing of CMOS and CCD color video cameras.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: November 23, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Kung Hsiao, Sheng-Liang Pan, Bii-Juno Chang, Kuo-Liang Lu
  • Patent number: 6785448
    Abstract: A coupling method of a coupler includes the following steps: (1) making a pair of optical fibers with different photosensitivity fused and drawn, (2) irradiating specific portions of the pair of optical fibers by intense ultraviolet light at the same time for making refractive index of the pair of optical fibers markedly different, (3) supervising coupling light energy loss spectrum and gradually adjusting the intense ultraviolet light for decreasing maximum coupling ratio and achieving an optical fiber coupler of optimum flat spectrum, thereby improving fabricating process and reducing deficient products.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: August 31, 2004
    Assignee: U-Conn Technology Inc.
    Inventors: Chih-Liang Pan, Chih-Yu Cheng, Winyann Jang
  • Publication number: 20040147105
    Abstract: A method for fabricating a microelectronic product provides for forming a planarizing layer upon a bond pad and a topographic feature, both formed laterally separated over a substrate. The planarizing layer is formed with a diminished thickness upon the bond pad such that it may be readily etched to expose the bond pad while employing as a mask an additional layer formed over the topographic feature but not over the bond pad. The method is particularly useful for forming color filter sensor image array optoelectronic products with attenuated bond pad corrosion.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 29, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Kung Chang, Yu-Kung Hsiao, Sheng-Liang Pan, Fu-Tien Wong, Chin-Chen Kuo, Chung-Sheng Hsiung, Hung-Jen Hsu, Yi-Ming Dai, Po-Wen Lin, Te-Fu Tseng
  • Patent number: 6759276
    Abstract: A new method is provided of treating the wafer prior to the process of singulating the wafer into individual die. A surface of the wafer over which CMOS image sensor devices have been created is coated with a layer of material that is non-soluble in water. The wafer is singulated by sawing through the layer of material that has been coated over the surface of the wafer and by then sawing through the wafer. The singulated die is then further processed by applying steps of die mount, wire bonding, surrounding the die in a mold compound and marking the package.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: July 6, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hung-Jen Hsu, Yu-Kung Hsiao, Chih-Kung Chang, Sheng-Liang Pan
  • Patent number: 6712260
    Abstract: A method of forming reflowed bumps comprising the following sequential steps. A wafer is provided. A series of spaced initial bumps is formed upon the wafer. The initial bumps having exposed side walls and top surfaces and organic residue over the initial bump side walls and/or the initial bump top surfaces. The organic residue is simultaneously removed from the initial bump side walls and top surfaces with the forming a surface oxide layer over the initial bump side walls and top surfaces. The surface oxide layer is stripped from the initial bump top surfaces and an upper portion of the initial bump side walls to form partially exposed bumps. The partially exposed bumps are heat treated to melt the partially exposed bumps to form the reflowed bumps.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: March 30, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Wen-Chang Kuo, Chia-Fu Lin, Sheng-Liang Pan, Szu-Yao Wang, Cheng-Yu Chu
  • Publication number: 20040030064
    Abstract: The present invention provides a catalyst component used for homopolymerization or co-polymerization of ethylene, comprising at least one suitable electron donor compound supported on a composition containing magnesium and titanium, wherein the electron donor compound is selected from the group consisting of aliphatic ethers, alicyclic ethers, aromatic ethers, aliphatic ketones and alicyclic ketones, and wherein the composition containing magnesium and titanium is prepared by dissolving a magnesium compound into a solvent system to form a homogeneous solution and then contacting the solution with a titanium compound in the presence of a precipitation aid to precipitate the composition. The present invention also relates to a method for the preparation of said catalyst component and a catalyst comprising thereof, and to use of the catalyst in homopolymerization of ethylene or co-polymerization of ethylene with at least one C3-C8 &agr;-olefln.
    Type: Application
    Filed: June 5, 2003
    Publication date: February 12, 2004
    Applicants: CHINA PETROLEUM & CHEMICAL CORPORATION, BEIJING RESEARCH INSTITUTE OF CHEMICAL INDUSTRY
    Inventors: Zhiwu Wang, Zhong Tan, Tianyi Li, Xingbo Li, Kai Zhang, Peng Kou, Haixiang Cui, Zhengyang Guo, Liang Pan
  • Publication number: 20040023470
    Abstract: A new method is provided of treating the wafer prior to the process of singulating the wafer into individual die. A first surface of the wafer over which CMOS image sensor devices have been created is coated with a layer of material that is non-soluble in water. The wafer is attached to a tape by bringing a second surface of the wafer in contact with the tape. The wafer is singulated by approaching the first surface of the wafer and by sawing first through the layer of material that has been coated over the first surface of the wafer and by then sawing through the wafer, stopping at the surface of the tape. A thorough water rinse is applied to the surface of the singulated wafer, followed by a wafer clean applying specific chemicals for this purpose. The singulated die is now removed from the tape and further processed by applying steps of die mount, wire bonding, surrounding the die in a mold compound and marking the package.
    Type: Application
    Filed: May 7, 2003
    Publication date: February 5, 2004
    Inventors: Hung-Jen Hsu, Yu-Kung Hsiao, Chih-Kung Chang, Sheng-Liang Pan