Patents by Inventor Lin LAI

Lin LAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12272712
    Abstract: Chip packages and methods for forming the same are provided. The method includes providing a substrate having a chip region and a scribe-line region surrounding the chip region and forming a dielectric layer on an upper surface of the substrate. A dummy structure is formed in the dielectric layer over the scribe-line region of the substrate and extends along edges of the chip region. The dummy structure includes a first stack of dummy metal layers and a second stack of dummy metal layers arranged concentrically from the inside to the outside. The method also includes performing a sawing process on a portion of the dielectric layer that surrounds the dummy structure, so as to form a saw opening through the dielectric layer. At least the first stack of dummy metal layers remains in the dielectric layer after the sawing process is performed.
    Type: Grant
    Filed: May 14, 2022
    Date of Patent: April 8, 2025
    Assignee: Xintec Inc.
    Inventors: Tsang-Yu Liu, Chaung-Lin Lai, Shu-Ming Chang
  • Publication number: 20250106696
    Abstract: Various solutions for enhancing quality of service (QoS) based on environmental conservation in mobile communications are described. An apparatus may determine whether an eco-friendly condition associated with a data session is met. Also, the apparatus may determine to modify a QoS associated with the data session in an event that the eco-friendly condition associated with the data session is met.
    Type: Application
    Filed: August 1, 2024
    Publication date: March 27, 2025
    Inventors: Chien-Sheng Yang, Chia-Lin Lai, Yuan-Chieh Lin, Yu-Hsin Lin, I-Kang Fu
  • Publication number: 20250096119
    Abstract: The present disclosure provides a resistive device. The resistive device includes a conductive structure, a row of first vias, and a row of second vias. The conductive structure has a first side and a second side opposite to the first side, and a first surface connected between the first side and the second side. The row of first vias extends through the conductive structure in a first direction substantially perpendicular to the first surface. The row of first vias is closer to the first side than the second side. The row of second vias extends through the conductive structure in the first direction. The row of second vias is disposed between the first side of the conductive structure and the row of first vias.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Inventors: WEI-LIN LAI, SZU-LIN LIU
  • Publication number: 20250088954
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The method may be performed by a mobile device. In certain configurations, the mobile device registers a first network access of a first public land mobile network (PLMN). After registering to the first network access, the mobile device determines, based on first information, whether a second network access of a PLMN or a Standalone Non-Public Network (SNPN) is allowed for the UE to register thereto. In response to determining the second network access is allowed, the mobile device selects the second network access based on the first information, and registers to the second network access. The second network access may be a network access of the first PLMN, or may be a network access of a second different PLMN or the SNPN.
    Type: Application
    Filed: September 6, 2024
    Publication date: March 13, 2025
    Inventors: Chia-Lin Lai, Tze Jie Tan, Yuan-Chieh Lin, Yu-Hsin Lin
  • Publication number: 20250088938
    Abstract: Various solutions for enhanced user equipment (UE) route selection policy (URSP) with green incentives for environmental conservation are described. An apparatus may receive information of an application associated with one or more eco-friendly requirements. Then, the apparatus may select a URSP rule from a list of URSP rules, and the selected URSP rule includes one or more descriptors matching the one or more eco-friendly requirements. Also, the apparatus may determine a data session for routing traffic of the application between the apparatus and a wireless network based on one or more parameters included in a route selection descriptor (RSD) of the selected URSP rule.
    Type: Application
    Filed: July 16, 2024
    Publication date: March 13, 2025
    Inventors: Chien-Sheng Yang, Yuan-Chieh Lin, Yu-Hsin Lin, Chia-Lin Lai, I-Kang Fu
  • Publication number: 20250088950
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The method may be performed by a mobile device. In certain configurations, the mobile device provides device capability information indicating that the mobile device supports a dual access service. The mobile device transmits a registration request message for registering to a first network access of a first public land mobile network (PLMN). The registration request message includes the device capability information. The mobile device receives a registration response message. The mobile device determines whether the registration response message includes network capability information indicating that the first network access supports the dual access service. In response to determining that the first network access supports the dual access service, the mobile device registers to a second network access.
    Type: Application
    Filed: September 6, 2024
    Publication date: March 13, 2025
    Inventors: Tze Jie Tan, Yuan-Chieh LIN, Yu-Hsin LIN, Chia-Lin LAI
  • Patent number: 12237354
    Abstract: Chip packages and methods for forming the same are provided. The method includes providing a substrate having upper and lower surfaces, and having a chip region and a scribe-line region surrounding the chip region. The substrate has a dielectric layer on its upper surface. A masking layer is formed over the substrate to cover the dielectric layer. The masking layer has a first opening exposing the dielectric layer and extending in the extending direction of the scribe-line region to surround the chip region. An etching process is performed on the dielectric layer directly below the first opening, to form a second opening that is in the dielectric layer directly below the first opening. The masking layer is removed to expose the dielectric layer having the second opening. A dicing process is performed on the substrate through the second opening.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: February 25, 2025
    Assignee: Xintec Inc.
    Inventors: Tsang-Yu Liu, Shu-Ming Chang, Chaung-Lin Lai
  • Patent number: 12225375
    Abstract: A method of handling authentication reject upon accessing an SNPN using credentials from a credential holder is proposed. A UE is configured with a “list of subscriber data”. The UE selects an SNPN using the configured list of subscriber data, e.g., based on the SNPN selection parameters contained in a selected entry of the list of subscriber data. Based on the selected entry, the UE selects an SNPN, and then tries to access the selected SNPN using credentials supplied by a subscribed SNPN. When UE receives an authentication reject message from the network, UE considers that the selected entry of the list of subscriber data is invalid. However, other entries related to the current selected SNPN are still valid. UE is still able to access the current selected SNPN, using credentials supplied in another entry of the list of subscriber data.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: February 11, 2025
    Assignee: MediaTek Inc.
    Inventors: Yuan-Chieh Lin, Chia-Lin Lai
  • Patent number: 12207219
    Abstract: A method supporting enhanced network identity (NID) provisioning under User Equipment (UE) mobility scenarios between different types of networks is proposed. When a UE registers to an SNPN, the UE is assigned with a 5G-GUTI by the SNPN. The SNPN is identified by an SNPN ID==PLMN ID+NID. When the UE moves from the SNPN to another target network having a target AMF, the UE triggers a mobility registration update procedure and provides the 5G-GUTI along with NID information in a Registration Request to the target AMF. The target AMF can use the NID information along with the 5G-GUTI to find a source AMF for deriving UE context for the subsequent operations during the mobility registration update procedure. Providing NID information along with 5G-GUTI can assist the target AMF to find the source AMF efficiently, preventing a potential registration procedure failure.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: January 21, 2025
    Assignee: MediaTek Inc.
    Inventors: Chia-Lin Lai, Yuan-Chieh Lin
  • Publication number: 20250019829
    Abstract: A semiconductor wafer carrier structure includes a carrier body having a surface, a protective film covering the surface, and a susceptor disposed on the carrier body and having an upper surface. The upper surface is a planar surface. The semiconductor wafer carrier structure further includes a patterned coating film formed on the upper surface and configured to directly face a semiconductor wafer. A material of the patterned coating film is different from the susceptor. The patterned coating film has two or more different thicknesses and is with a pattern, so that the semiconductor wafer is at least locally separated from the patterned coating film due to the pattern. The patterned coating film is continuously and entirely distributed on the upper surface of the susceptor toward the semiconductor wafer, and the upper surface of the susceptor is separated from the semiconductor wafer by the patterned coating film.
    Type: Application
    Filed: September 26, 2024
    Publication date: January 16, 2025
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Yen-Lin LAI, Jyun-De WU, Chi-Heng CHEN
  • Publication number: 20250014384
    Abstract: Aspects concern a method for authenticating a driver of a vehicle, comprising sending a request to a mobile phone to provide a selfie of a user of the mobile phone by means of the mobile phone, wherein the mobile phone is registered to receive orders for transport tasks, determining a time the user takes to provide a selfie in response to the request, sending additional requests to the mobile phone to provide selfies by means of the mobile phone if the determined time exceeds a predetermined threshold with a higher frequency than if the determined time does not exceed the predetermined threshold and performing authentication of the user as legitimate driver using selfies provided in response to the additional requests.
    Type: Application
    Filed: November 21, 2022
    Publication date: January 9, 2025
    Inventors: Munirul ABEDIN, Mohd Nazri Bin RAMLIY, Kai Lin LAI, Ren Xian THIAN, Naveen AGGARWAL
  • Publication number: 20240396538
    Abstract: An integrated circuit includes a first conducting line and a second conducting line in a first metal layer above a first transistor and a second transistor. The first conducting line and the second conducting line, which are parallel and adjacent to each other, form a metal-insulator-metal capacitor. Each of the first transistor and the second transistor forms a metal-insulator-semiconductor capacitor. The circuit also includes a third conducting line connected to a source and a drain of the first transistor and configured to receive a first reference voltage. The circuit still includes a fourth conducting line connected to a source and a drain of the second transistor and configured to receive a second reference voltage.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Szu-Lin LIU, Jaw-Juinn HORNG, Yi-Hsiang WANG, Wei-Lin LAI
  • Publication number: 20240367049
    Abstract: A method of information processing includes displaying a running screen of a target virtual game in a first time unit, the target virtual game includes at least a first virtual character that is manipulated by an artificial intelligence (AI) object. The method also includes obtaining battle reference data associated with the running screen, the battle reference data includes battle data fed back by the first virtual character when the first virtual character participates in the target virtual game in the first time unit. The method also includes displaying execution prediction information of at least a to-be-executed candidate operation based on the battle reference data. Apparatus and non-transitory computer-readable storage medium counterpart embodiments are also contemplated.
    Type: Application
    Filed: July 12, 2024
    Publication date: November 7, 2024
    Applicant: Tencent Technology (Shenzhen) Company Limited
    Inventors: Meng MENG, Jianyu HENG, Jieyi HUANG, Yuntao PENG, Yuanqin WANG, Zhenbin YE, Minwen DENG, Siqin LI, Wenjun WANG, Lin LIU, Lin LAI, Hongyang QIN
  • Publication number: 20240364332
    Abstract: A CMOS data clearing circuit is provided. The CMOS data clearing circuit is configured to clear CMOS data of a main board of an electronic device. The electronic device includes a control chip and a pin header. The CMOS data clearing circuit includes a controller and a connection port. The controller generates a pulse signal and an operation signal. The connection port has an input pin and an output pin. The output pin is coupled to a first pin of the pin header. The connection port connects the input pin to the output pin in response to the operation signal, so as to transmit the pulse signal to the first pin of the pin header via the output pin. The control chip clears the CMOS data of the main board according to the pulse signal received by the first pin.
    Type: Application
    Filed: February 29, 2024
    Publication date: October 31, 2024
    Applicant: ASRock Industrial Computer Corporation
    Inventors: Yu-Lin Lai, Yu-Tso Chen, Shih-Ming Lin
  • Patent number: 12120326
    Abstract: Several implementations relate to 3D video formats. One or more implementations provide adaptations to MVC and SVC to allow 3D video formats to be used. According to a general aspect, a set of images including video and depth is encoded. The set of images is related according to a particular 3D video format, and are encoded in a manner that exploits redundancy between the set of images. The encoded images are arranged in a bitstream in a particular order, based on the particular 3D video format that relates to the images. The particular order is indicated in the bitstream using signaling information. According to another general aspect, a bitstream is accessed that includes the encoded set of images. The signaling information is also accessed. The set of images is decoded using the signaling information.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: October 15, 2024
    Assignee: INTERDIGITAL MADISON PATENT HOLDINGS
    Inventors: Dong Tian, Po-Lin Lai, Jiancong Luo
  • Publication number: 20240339505
    Abstract: An epitaxial structure includes a first type semiconductor layer, an active layer, a second type semiconductor layer, and a lattice mismatch layer. The first type semiconductor layer includes a material of aluminum gallium indium phosphide. The active layer is disposed on a side of the first type semiconductor layer. The second semiconductor layer is disposed on a side of the active layer away from the first type semiconductor layer, and includes the material of aluminum gallium indium phosphide. The lattice mismatch layer includes the material of aluminum gallium indium phosphide and is disposed on any side of the first type semiconductor layer, the active layer, or the second type semiconductor layer. In an X-ray diffractometer analysis spectrum, at least one of the first type semiconductor layer, the active layer and the second type semiconductor layer corresponds to a main diffractive peak, the lattice mismatch layer has a secondary diffractive peak.
    Type: Application
    Filed: May 16, 2023
    Publication date: October 10, 2024
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Shen-Jie Wang, Hsin-Chiao Fang, Yen-Lin Lai
  • Patent number: 12101091
    Abstract: A method includes fabricating a first transistor and a second transistor on a substrate and fabricating a first conducting line and a second conducting line in a first metal layer. The method also includes connecting a gate of the first transistor to the first conducting line and connecting a gate of the second transistor to the second conducting line. The first conducting line and the second conducting line are parallel and adjacent to each other in the first metal layer above the first transistor and the second transistor. The method still includes connecting a source and a drain of the first transistor to a third conducting line.
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: September 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Szu-Lin Liu, Jaw-Juinn Horng, Yi-Hsiang Wang, Wei-Lin Lai
  • Publication number: 20240312557
    Abstract: A memory with built-in synchronous-write-through (SWT) redundancy includes a plurality of memory input/output (IO) arrays, a plurality of SWT circuits, and at least one spare SWT circuit. The at least one spare SWT circuit is used to replace at least one of the plurality of SWT circuits that is defective.
    Type: Application
    Filed: February 16, 2024
    Publication date: September 19, 2024
    Applicant: MEDIATEK INC.
    Inventors: Che-Wei Chou, Ya-Ting Yang, Shu-Lin Lai, Chi-Kai Hsieh, Yi-Ping Kuo, Chi-Hao Hong, Jia-Jing Chen, Yi-Te Chiu, Jiann-Tseng Huang
  • Publication number: 20240266247
    Abstract: An IC device includes a heat transfer structure electrically isolated from a resistor. The resistor includes first and second metal segments extending in a first direction in a first metal layer and a third metal segment extending perpendicular to the first direction in a second metal layer below the first metal layer, the third metal segment electrically connecting the first and second metal segments to each other. The heat transfer structure includes fourth and fifth metal segments extending in the first direction in the first metal layer adjacent to the first and second metal segments, sixth and seventh metal segments extending in the second direction in the second metal layer, each of the sixth and seventh metal segments electrically connecting the fourth and fifth metal segments to each other, and a thermally conductive path extending from the sixth or seventh metal segment to an underlying active area.
    Type: Application
    Filed: March 25, 2024
    Publication date: August 8, 2024
    Inventors: Jaw-Juinn HORNG, Szu-Lin LIU, Wei-Lin LAI
  • Publication number: 20240258525
    Abstract: A polymer, a composition, a negative electrode and a battery employing the same are provided. The polymer has a repeat unit represented by Formula (I) wherein R1 is hydrogen or acetyl group; and, each R2 is independently hydrogen, —SO3H, or —SO3Li, and at least one of R2 is —SO3Li.
    Type: Application
    Filed: August 30, 2023
    Publication date: August 1, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Guan-Lin LAI, Chi-Yang CHAO, Ting-Ju YEH, Chi-Ju CHENG, Guan-Fu LIU