Patents by Inventor Lin Lu
Lin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250147863Abstract: A method of performing code review and a code review system are provided. The code review system includes a code repository, a static scanning tool, an analytical neural network and a generative neural network. The code repository is configured to store an original source code and a new code created by a developer in response to a code change request to merge the new code with the original source code. The static scanning tool is configured to collect data associated with each commit in the new code. The analytical neural network is implemented with an analytical AI and configured to assess a risk level of each commit in the new code. The generative neural network is implemented with a generative AI and configured to provide a code summarization and an initial code review comment of each commit in the new code.Type: ApplicationFiled: November 4, 2024Publication date: May 8, 2025Applicant: MEDIATEK INC.Inventors: Min-Shan Huang, Hui-Chi Kuo, Wei-Geng Fan, Chin-Tang Lai, Chiang-Lin Lu, Chia-Shun Yeh
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Publication number: 20250139543Abstract: Example methods and systems provide a workplace assistant application that can detect electronic content associated with a remote user and access multiple communication channels connected to a workplace assistant client application. The system can submit the electronic content to one or more predictive models to provide a context for the electronic content. The context is based at least in part on information from multiple channels. The system can generate, using the predictive model(s), an action item based at least in part on the context of the electronic content as well as display or store the action item using the workplace assistant client application. An action item, as examples, can be a “to do” item, a meeting agenda, a reminder, a meeting, a task, or some combination of one or more of these.Type: ApplicationFiled: October 30, 2023Publication date: May 1, 2025Applicant: Zoom Video Communications, Inc.Inventors: Lin Han, Hong Hao, Jingwei Li, Zijian Li, Yike Liu, Ying Lu, Chensi Mao, Keping Zhai
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Publication number: 20250141823Abstract: Example methods and systems provide a workplace assistant application that can detect one or more received messages associated with a remote user and access multiple communication channels connected to a workplace assistant client application. Received message(s), information from the channels, and stored metadata can be submitted to one or more predictive models to provide a context for the message(s). The system can generate, using output from the predictive model(s), a response message based at least in part on the context of the received message. The system can display the response in the workplace assistant client application for acceptance or editing by the user, or transmit the response message.Type: ApplicationFiled: October 30, 2023Publication date: May 1, 2025Inventors: Lin Han, Jingwei Li, Zijian Li, Yike Liu, Ying Lu, Keping Zhai, Fengtian Zhang, Hao Zhang
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Publication number: 20250141091Abstract: A signal sensing device includes a body and two signal sensing elements disposed in the body. An insulating layer is sandwiched between the two signal sensing elements. Each of the two signal sensing elements incudes a signal transmission section and a signal sensing section in electrical connection with the signal transmission section. The signal transmission sections are planar antennae parallel to each other and each having an antenna shape of meander-line type. The antenna shape of each transmission section has a vertical projection on a plane parallel to each signal transmission section. The vertical projections of the antenna shapes do not overlap completely. When a portion of the body forms a surrounding portion which surrounds a to-be-sensed target, a portion or an entirety of each signal sensing section is located on the surrounding portion.Type: ApplicationFiled: October 31, 2023Publication date: May 1, 2025Inventors: Shu-Hung Huang, Chun-Chieh Tseng, Jui-Han Lu, Chun-Ming Chen, Ping-Ruey Chou, Yen-Hsin Kuo, Tung-Lin Tsai, Yen-Hao Chang, Sheng-Hua Wu, Chia-Hua Chang, Wen-Ming Cheng
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Publication number: 20250140917Abstract: A solid-state electrolyte of a lithium-ion battery is provided. The lithium-ion battery has a negative electrode including a lithium-containing material in contact with the solid-state electrolyte. The solid-state electrolyte includes a multiple-doping material with a chemical formula of LixTiyMm(PO4)3, wherein 0.8?x?1.5, 0<y?0.6, M represents at least three different doping elements, 1.25?m?1.7, and y/m?0.5. The lithium-ion battery using the solid-state electrolyte is also provided.Type: ApplicationFiled: October 25, 2024Publication date: May 1, 2025Inventors: I-Sheng Wang, Wen-Hsuan Lu, Yen-Lin Chen, Han-Yi Chen
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Publication number: 20250134468Abstract: A signal sensing device includes a signal amplifying structure to amplify the strength of the measured signal. The signal sensing device includes a body, a signal sensing element, and a signal amplifying portion. The signal sensing element is disposed in the body and includes a signal transmission section and a signal sensing section in electrical connection with the signal transmission section. The signal amplifying portion includes a plurality of protruding structures protruding outward from the body. Each of the plurality of protruding structures is cylindrical and has a diameter of 250-400 ?m and a height of 40-75 ?m. When a portion of the body forms a surrounding portion surrounding a to-be-sensed target, a portion or an entirety of the signal sensing section is located on the surrounding portion, and the signal amplifying portion is partially or entirely in contact with the to-be-sensed target.Type: ApplicationFiled: October 31, 2023Publication date: May 1, 2025Inventors: Shu-Hung Huang, Chun-Chieh Tseng, Jui-Han Lu, Chun-Ming Chen, Ping-Ruey Chou, Yen-Hsin Kuo, Tung-Lin Tsai, Yen-Hao Chang, Sheng-Hua Wu, Chia-Hua Chang, Wen-Ming Cheng
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Publication number: 20250140750Abstract: The present disclosure provides a memory device including a substrate including a first and a second surfaces opposite to each other, a first interconnection structure disposed on the first surface of the substrate, a first and second elements disposed in the substrate and/or the first interconnection structure, a second interconnection structure disposed on the first interconnection structure, and a third interconnection structure disposed on the second surface of the substrate. The first interconnection structure includes first wiring layers configured to be closest to the first and second elements. The third interconnection structure includes second wiring layers configured to be closest to the first and second elements. Each of the first and second elements includes a first electrical connection path through the first wiring layer and a second electrical connection path through the second wiring layer.Type: ApplicationFiled: December 12, 2023Publication date: May 1, 2025Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Chun-Lin Lu, Chien-Ting Ho, Shou-Zen Chang
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Patent number: 12288695Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a first channel region in a first region and over a second channel region in a second region; introducing a first dipole element into the first dielectric layer in the first region to form a first dipole-containing gate dielectric layer in the first region; forming a second dielectric layer over the first dipole-containing gate dielectric layer; introducing fluorine into the second dielectric layer to form a first fluorine-containing gate dielectric layer over the first dipole-containing gate dielectric layer; and forming a gate electrode over the first fluorine-containing gate dielectric layer.Type: GrantFiled: March 25, 2022Date of Patent: April 29, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu, Chih-Hao Wang
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Publication number: 20250131716Abstract: A rapid monitoring and identification method for winter wheat drought levels includes: 1) obtaining multispectral images and ground-measured LAI through UAV-based multi-payload low-altitude remote sensing technology, and calculating vegetation indices such as Normalized Difference Vegetation Index (NDVI), Difference Vegetation Index (DVI), Ratio Vegetation Index (RVI), Enhanced Vegetation Index (EVI), Optimized soil adjusted vegetation index (OSAVI) and Transformed Chlorophyll Absorption Reflectance Index; 2) establishing regression equations between the calculated vegetation indices and measured LAI for different growth stages, and selecting the optimal model equation for each growth stage; 3) using the optimal model equation to invert the LAI of winter wheat at various growth stages, and calibrating the LAI thresholds for different drought stress levels; 4) acquiring the multispectral images of target plot through real-time monitoring, calculating the required vegetation indices, inverting to obtain the LAIType: ApplicationFiled: December 25, 2024Publication date: April 24, 2025Inventors: Wenlong SONG, Hongjie LIU, Hanyu LIU, Yangjun SHI, Xuecheng XING, Yizhu LU, Jian LI, Lin LIN, Wenjing LU, Xiuhua CHEN, Rongjie GUI
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Publication number: 20250126809Abstract: A semiconductor structure including device structures arranged in a stack is provided. The device structures include substrates and through-substrate vias (TSVs). The TSVs are located in the substrates. The TSVs includes first TSVs. Each of the device structures includes the corresponding substrate and the corresponding first TSV. Each of the first TSVs passes through the corresponding substrate. The number of the TSVs in the endmost device structure is less than the number of the TSVs in another of the device structures. The first TSV in the endmost device structure and the first TSV in another of the device structures are aligned with each other and electrically connected to each other.Type: ApplicationFiled: November 30, 2023Publication date: April 17, 2025Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Chun-Lin Lu, Chun-Cheng Chen, Ka Man So, Wei-Heng Chen, Shou-Zen Chang
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Patent number: 12278149Abstract: A through-substrate via (TSV) test structure including a substrate, a first TSV, and a test device is provided. The substrate includes a test region. The first TSV is located in the substrate of the test region. The test device is located on the substrate of the test region. The test device and the first TSV are separated from each other. The shortest distance between the test device and the first TSV is less than 10 ?m.Type: GrantFiled: April 13, 2022Date of Patent: April 15, 2025Assignee: Powerchip Semiconductor Manufacturing CorporationInventor: Chun-Lin Lu
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Publication number: 20250116941Abstract: A stitching method for an exposure process includes following steps. A wafer is provided. The wafer includes interposer regions, each of which includes a logic chip region, a first memory chip region, and a second memory chip region. The logic chip region is located between the first and second memory chip regions. A photoresist layer is formed on the wafer. First exposure processes are performed on the photoresist layer by applying a first photomask to form first shot regions in the photoresist layer. Second exposure processes are performed on the photoresist layer by applying a second photomask to form second shot regions in the photoresist layer. The first shot regions and the second shot regions are arranged alternately in a first direction. The first shot regions and the second shot regions are overlapped to form stitching regions, each of which is not located in the logic chip region.Type: ApplicationFiled: November 14, 2023Publication date: April 10, 2025Applicants: Powerchip Semiconductor Manufacturing Corporation, AP Memory Technology CorporationInventors: Shou-Zen Chang, Chun-Lin Lu, Cheng-Shu Ho, Kuo-Wei Liu, Kee-Wei Chung, Ru-Yi Cai
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Publication number: 20250118477Abstract: Disclosed are a magnetic core structure and a magnetic component. The magnetic core structure includes N winding columns and two cover plates, and N is a positive integer, wherein each winding column is provided with a first hollow channel, the two cover plates are disposed at two ends of each winding column, each cover plate is provided with N first through holes, the N winding columns are in a one-to-one correspondence with the N first through holes of each cover plate, and the first hollow channel of each winding column is communicated with the first through holes located on two sides thereof and corresponding thereto. Therefore, the channels for air flow can be added, so that the heat dissipation efficiency is improved when the magnetic core structure is applied to the magnetic component.Type: ApplicationFiled: June 18, 2024Publication date: April 10, 2025Inventors: Yi-Wen CHENG, Yen-An CHEN, Cheng-Wei TSENG, De-Jia LU, Chen CHEN, Chao-Lin CHUNG
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Publication number: 20250118666Abstract: A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure includes a substrate and at least one contact plug. The substrate has an epi-layer. The contact plug is formed on the epi-layer and includes a silicide cap disposed on the epi-layer; a conductive pillar disposed on the silicide cap such that the conductive pillar electrically connects to the epi-layer via the silicide cap; and a hybrid liner. The hybrid liner surrounds the conductive pillar and includes a lower portion abutting the silicide cap and having a nitride material and an upper portion abutting the conductive pillar and having an oxidized nitride material. Due to the hybrid liner, a semiconductor structure with increased capacitance and decreased resistivity can be obtained.Type: ApplicationFiled: October 10, 2023Publication date: April 10, 2025Inventors: TZU PEI CHEN, MIN-HSUAN LU, HAO-HENG LIU, YUTING CHENG, HSU-KAI CHANG, PO-CHIN CHANG, OLIVIA PEI-HUA LEE, SHENG-TSUNG WANG, HUAN-CHIEH SU, SUNG-LI WANG, PINYEN LIN
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Patent number: 12269823Abstract: The present disclosure relates to a crystal form of a pyridopyrimidine derivative and a preparation method thereof, and specifically relates to the crystal form of the compound of formula (I) and a preparation method thereof. The new crystal form has good physical and chemical properties, thereby facilitating clinical treatments.Type: GrantFiled: December 31, 2020Date of Patent: April 8, 2025Assignees: Jiangsu Hengrui Medicine Co., Ltd., Shanghai Hengrui Pharmaceutical Co., Ltd.Inventors: Qi Wu, Zhenxing Du, Jie Wang, Lin Wang, Weidong Lu, Qiyun Shao, Jun Feng, Feng He
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Patent number: 12273662Abstract: An image processing method includes: converting a red yellow blue RYB image into a grid image based on a red green blue RGB format; generating a first brightness layer of the grid image, and determining a reference gain compensation array used to adjust the first brightness layer; obtaining, based on a preset compensation array correspondence, a target gain compensation array that is associated with the reference gain compensation array and based on an RYB format; and adjusting a second brightness layer of the RYB image by using the target gain compensation array, to generate a corrected image.Type: GrantFiled: October 31, 2020Date of Patent: April 8, 2025Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Lin Zhao, Tianyu Yao, Yuewan Lu, Hongwei Hu, Wenmei Gao
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Patent number: 12273825Abstract: Techniques and apparatus for configurable radio frequency (RF) exposure compliance based on region. An example method of wireless communication by a user equipment (UE) generally includes identifying a region in which the UE is located, selecting at least one of a mode or one or more parameters for RF exposure compliance based on the identified region, and transmitting a signal at a transmission power level based at least in part on the at least one of the selected mode or the selected one or more parameters.Type: GrantFiled: December 18, 2023Date of Patent: April 8, 2025Assignee: QUALCOMM IncorporatedInventors: Lin Lu, Jagadish Nadakuduti, Akhil Deodhar, Troy Curtiss, Paul Guckian
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Publication number: 20250113499Abstract: A semiconductor device including a substrate, a magnetic core and a conductor coil is provided. The magnetic core is disposed on the substrate, and formed by sub-layers of different materials stacked alternatively on one another. The conductor coil is disposed on the substrate, wherein the magnetic core partially extends to a level between an upper surface of the conductor coil and a bottom surface of the conductor coil.Type: ApplicationFiled: October 3, 2023Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yun-Chi Chiang, Meng-Pei Lu, Shin-Yi Yang, Cian-Yu Chen, Chien-Hsin Ho, Ming-Han Lee, Shau-Lin Shue
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Publication number: 20250108106Abstract: This disclosure is directed to a pharmaceutical composition for treating or preventing a disease. The pharmaceutical composition can comprise a polymer-drug nanoaggregate having a polymer and at least one bioactive agent that can comprise STING polypeptide, a nucleic acid encoding said STING polypeptide, a STING inhibitor, a STING activator, a STING agonist, a STING antagonist, a STING modulating molecule, or a combination thereof. The pharmaceutical composition can be a vaccine or an adjuvant for a vaccine. This disclosure is also directed to a method for treating or preventing a disease using the pharmaceutical composition. The disease can include infectious diseases caused by viruses or other pathogens, for example, influenza, rabies, or respiratory illnesses such as severe acute respiratory syndrome (SARS) caused by coronaviruses, such as MERS-CoV, SARS-CoV, and Coronavirus Disease 2019 (COVID-19) caused by the virus SARS-CoV-2 and its variants.Type: ApplicationFiled: September 10, 2024Publication date: April 3, 2025Inventors: Lu Lu, Ray Yin, Shibo Jiang, Zezhong Liu, Ming Hsieh, Jie Zhou, Xinling Wang, Qian Wang, Wei XU, Jing Pan, Yubei Zhang, Kai Qi, Qun Sun, Lin Wang, Zhiying Zou, Chunlin Tao
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Publication number: 20250113604Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method includes forming first channel structures, second channel structures, and third channel structures. The method also includes forming gate dielectric layers surrounding the first channel structures, the second channel structures, and the third channel structures and forming dipole layers over the gate dielectric layers. The method also includes forming a dummy material in a first space between the first and the second channel structures and in a second space between the second and the third channel structures and removing first portions of the dummy material. The method also includes implanting first dopants in the dummy material in the first space and removing second portions of the dummy material in the first space and the second space. The method also includes removing the dipole layers in the top device region and completely removing the dummy material.Type: ApplicationFiled: September 29, 2023Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kenichi SANO, Chia-Yun CHENG, Yu-Wei LU, I-Ming CHANG, Pinyen LIN