Patents by Inventor Lin Lu

Lin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230320229
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and form a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: May 10, 2023
    Publication date: October 5, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 11778922
    Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: October 3, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Publication number: 20230290695
    Abstract: A through-substrate via (TSV) test structure including a substrate, a first TSV, and a test device is provided. The substrate includes a test region. The first TSV is located in the substrate of the test region. The test device is located on the substrate of the test region. The test device and the first TSV are separated from each other. The shortest distance between the test device and the first TSV is less than 10 ?m.
    Type: Application
    Filed: April 13, 2022
    Publication date: September 14, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventor: Chun-Lin Lu
  • Publication number: 20230291428
    Abstract: According to certain aspects a wireless device includes transmitters, and a processor coupled to the transmitters. The processor is configured to determine a radio frequency (RF) exposure value at a peak location based on transmission power levels for the transmitters, determine a contribution of each one of the transmitters to the RF exposure value at the peak location, and reduce the transmission power level for each one of one or more of the transmitters based on the contributions of the transmitters to the RF exposure value at the peak location.
    Type: Application
    Filed: May 16, 2023
    Publication date: September 14, 2023
    Inventors: Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN
  • Patent number: 11749648
    Abstract: A circuit structure for testing through silicon vias (TSVs) in a 3D IC, including a TSV area with multiple TSVs formed therein, and a switch circuit with multiple column lines and row lines forming an addressable test array, wherein two ends of each TSV are connected respectively with a column line and a row line. The switch circuit applies test voltage signals through one of the row lines to the TSVs in the same row and receives current signals flowing through the TSVs in the row from the columns lines, or the switch circuit applies test voltage signals through one of the column lines to the TSVs in the same column and receives current signals flowing through the TSVs in the column from the row lines.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: September 5, 2023
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Chun-Lin Lu, Chun-Cheng Chen
  • Patent number: 11742219
    Abstract: An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and at least one first through interlayer via. The first redistribution structure includes a dielectric layer, a feed line at least partially disposed on the dielectric layer and a signal enhancement layer covering the feed line, wherein the signal enhancement layer has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The at least one first TIV is embedded in the insulation encapsulation and the signal enhancement layer.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: August 29, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chiang Wu, Chung-Hao Tsai, Chun-Lin Lu, Yen-Ping Wang, Che-Wei Hsu
  • Patent number: 11737370
    Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: August 22, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 11721791
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer includes a first edge; a reflective structure located on the second semiconductor layer and including an outer edge; a first electrode pad located on the reflective structure, wherein the first electrode pad including an outer side wall adjacent to the outer edge, wherein the outer edge extends beyond the outer side wall and does not exceed the first edge in a cross-sectional view of the light-emitting device.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: August 8, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Wen-Hung Chuang, Tzu-Yao Tseng, Cheng-Lin Lu
  • Patent number: 11716695
    Abstract: Certain aspects of the present disclosure provide techniques for exception-robust time-averaged radio frequency (RF) exposure compliance continuity. A method that may be performed by a user equipment (UE) generally includes transmitting a first signal at a first transmission power based on time-averaged RF exposure measurements over a time window and storing RF exposure information associated with the time window. The method may also include detecting that an exception event associated with the UE occurred and transmitting a second signal at a second transmission power based at least in part on the stored RF exposure information in response to the detection of the event.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: August 1, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Troy Curtiss, Akhil Deodhar, Jagadish Nadakuduti, Lin Lu, Paul Guckian
  • Publication number: 20230230902
    Abstract: A semiconductor package structure includes a control unit and a memory unit. The control unit includes a first wafer and a second wafer that are vertically stacked. The memory unit is disposed on the second wafer of the control unit. The memory unit includes multiple third wafers and a fourth wafer that are stacked vertically. The memory unit overlaps the control unit in a normal direction of the semiconductor package structure. In addition, a manufacturing method of the semiconductor package structure is provided.
    Type: Application
    Filed: March 10, 2022
    Publication date: July 20, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chun-Lin Lu, Shou-Zen Chang, Chi-Ming Chen
  • Patent number: 11701054
    Abstract: The present disclosure relates to systems and methods for characterizing a behavior change of a process. A behavior model that can include a set of behavior parameters can be generated based on behavior data characterizing a prior behavior change of a process. A stimulus parameter for a performance test can be determined based on the set of behavior parameters. An application of the performance test to the process can be controlled based on the stimulus parameter to provide a measure of behavior change of the process. Response data characterizing one or more responses associated with the process during the performance test can be received. The set of behavior parameters can be updated based on the response data to update the behavior model characterizing the behavior change of the process. In some examples, the behavior model can be evaluated to improve or affect a future behavior performance of the process.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: July 18, 2023
    Assignees: OHIO STATE INNOVATION FOUNDATION, ADAPTIVE SENSORY TECHNOLOGY, INC.
    Inventors: Zhong-Lin Lu, Yukai Zhao, Luis A. Lesmes
  • Patent number: 11702639
    Abstract: In accordance with the invention, provided herein are methods for purifying recombinant adeno-associated (rAAV) vector particles.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: July 18, 2023
    Assignee: SPARK THERAPEUTICS, INC.
    Inventors: Guang Qu, Younghoon Oh, Lin Lu, John Fraser Wright
  • Patent number: 11706993
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: July 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Publication number: 20230194571
    Abstract: The present invention provides a probe card. A module cap, on the probe card substrate, is designed to have a chute and the probe module can be installed on or uninstalled from the module cap via the chute. That simplifies the operations of assembling and disassembling the probe card and avoids positioning error.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 22, 2023
    Inventors: TZU-CHIEN WANG, WEN-YUAN HSU, MING-HSIEN CHEN, JIA-LIN LU
  • Publication number: 20230197904
    Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,
    Type: Application
    Filed: February 23, 2023
    Publication date: June 22, 2023
    Inventors: Chao-Hsing CHEN, Cheng-Lin LU, Chih-Hao CHEN, Chi-Shiang HSU, I-Lun MA, Meng-Hsiang HONG, Hsin-Ying WANG, Kuo-Ching HUNG, Yi-Hung LIN
  • Publication number: 20230189168
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for operating a wireless communication device pursuant to radio frequency (RF) exposure compliance. An example method of wireless communication includes obtaining RF exposure information associated with a first RF exposure control scheme, wherein the first RF exposure control scheme is associated with one or more first radios. The method further includes transmitting a signal via one or more second radios associated with a second RF exposure control scheme at a transmit power based at least in part on the RF exposure information, wherein the one or more first radios are different than the one or more second radios.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 15, 2023
    Inventors: Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN
  • Publication number: 20230180151
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for operating a wireless communication device pursuant to radio frequency (RF) exposure compliance. A method that may be performed by a wireless device includes determining a first budget for one or more radios. The method also includes converting the first budget to a second budget for the one or more radios in response to a transition from a first maximum time-averaged RF exposure limit with a first time window to a second maximum time-averaged RF exposure limit with a second time window. The method further includes transmitting a signal with the one or more radios at a transmit power determined based at least in part on the second maximum time-averaged RF exposure limit and the second budget.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 8, 2023
    Inventors: Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN
  • Publication number: 20230180150
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for operating a wireless communication device pursuant to radio frequency (RF) exposure compliance. A method that may be performed by a wireless device includes determining a base reserve and a dynamic reserve for each of a plurality of radios; and transmitting a signal with at least one of the radios at a transmit power determined based at least in part on one or more maximum time-averaged RF exposure limits associated with each of the radios and on the base reserve and the dynamic reserve for each of the radios.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 8, 2023
    Inventors: Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN
  • Patent number: 11664841
    Abstract: According to certain aspects a wireless device includes transmitters, and a processor coupled to the transmitters. The processor is configured to determine a radio frequency (RF) exposure value at a peak location based on transmission power levels for the transmitters, determine a contribution of each one of the transmitters to the RF exposure value at the peak location, and reduce the transmission power level for each one of one or more of the transmitters based on the contributions of the transmitters to the RF exposure value at the peak location.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: May 30, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Jagadish Nadakuduti, Lin Lu, Paul Guckian
  • Publication number: 20230156625
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may identify an available energy for uplink transmission of a plurality of communication links of the UE. The UE may configure, from the available energy, a first set of energy allocations for the plurality of communication links. The UE may configure a second set of energy allocations for one or more communication links of the plurality of communication links, wherein the second set of energy allocations are allocated from a remainder of the available energy after the first set of energy allocations are allocated. The UE may transmit based at least in part on at least one of the first set of energy allocations or the second set of energy allocations. Numerous other aspects are described.
    Type: Application
    Filed: September 22, 2022
    Publication date: May 18, 2023
    Inventors: Tienyow LIU, Michel CHAUVIN, Farhad MESHKATI, Raghu Narayan CHALLA, Reza SHAHIDI, Arnaud MEYLAN, Yahia RAMADAN, Jing LIN, Tianpei CHEN, Jagadish NADAKUDUTI, Lin LU, Paul GUCKIAN, Huang LOU