Abstract: Provided are a positioning method, device and system for a transmitting device, and a storage medium and an electronic device. The method includes that: control information is determined by a receiving device, wherein the control information includes temporal information and control direction information, and the control direction information is used for instructing a meta-surface control unit to adjust a reflection coefficient of a meta-surface to a target reflection coefficient corresponding to a preset direction within a target time period; a pilot signal is transmitted to the meta-surface by a transmitting device; the control information is sent to the meta-surface control unit by the receiving device; and a signal measurement result corresponding to the preset direction is determined, and the transmitting device is positioned according to the preset direction and the signal measurement result.

Abstract: An electrostatic discharge (ESD) protection device having a source region coupled to a first electrical node, a first drain region coupled to a second electrical node different from the first electrical node, and an extended drain region between the source region and the first drain region. The extended drain region includes a number N of electrically floating doped regions and a number M of gate regions coupled to the second electrical node, where N and M are integers greater than 1 and N is equal to M. Each electrically floating doped region of the N number of floating doped regions alternates with each gate region of the M number of gate regions.

Abstract: An integrated circuit includes a diode string, a first transistor, a second transistor, and a third transistor. The diode string is coupled between a first reference voltage pin and an input/output (I/O) pad. A first terminal of the second transistor is coupled to a first node, and a gate terminal of the second transistor is coupled to a second reference voltage pin. In response to a voltage at the first terminal of the second transistor being higher than a voltage at the gate terminal of the second transistor, the second transistor is configured to turn on the third transistor, and the third transistor is configured to transmit a voltage received from the first reference voltage pin to a gate terminal of the first transistor.

Abstract: A biological water retention material, a method for preparing the same and a use thereof. A Bacillus subtilis, named as Bacillus subtilis GE1, which has been deposited in China General Microbiological Culture Collection, Institute of Microbiology, Chinese Academy of Sciences on Jan. 7, 2016, with a deposit number of CGMCC No. 11964, solves the problem of lacking a biological water retention material that fully combines water retention materials with microbial agents to increase the survival rate of silviculture under drought conditions by increasing soil moisture content as well as enhancing the drought resistance of plants. It is suitable for use under drought and water shortage conditions, and can fully utilize the coupling effect of water retention and bacterial agents, increasing the survival rate of silviculture under drought conditions and promoting seedling growth by increasing soil moisture content as well as enhancing the drought resistance of plants.

Abstract: An electrostatic discharge (ESD) protection device having a source region coupled to a first electrical node, a first drain region coupled to a second electrical node different from the first electrical node, and an extended drain region between the source region and the first drain region. The extended drain region includes a number N of electrically floating doped regions and a number M of gate regions coupled to the second electrical node, where N and M are integers greater than 1 and N is equal to M. Each electrically floating doped region of the N number of floating doped regions alternates with each gate region of the M number of gate regions.

Abstract: A device is disclosed herein. The device includes a bias generator, an ESD driver, and a logic circuit. The bias generator includes a first transistor. The ESD driver includes a second transistor and a third transistor coupled to each other in series. The logic circuit is configured to generate a logic control signal. When the first transistor is turned on by a detection signal, the first transistor is turned off.

Abstract: The invention provides biodegradable implants sized for implantation in an ocular region and methods for treating medical conditions of the eye. The implants are formed from a mixture of hydrophilic end and hydrophobic end PLGA, and deliver active agents into an ocular region without a high burst release.

Abstract: An image acquisition device includes an optical sensor and a dimmer. The optical sensor includes a photosensitive area configured to convert optical signal into image signal. The dimmer is on a side of the optical sensor that receives the optical signal. The dimmer completely covers the photosensitive area. The dimmer is configured for modulating intensity of the optical signal projected onto the optical sensor. The dimmer includes dimming blocks. Each dimming block is configured for modulating intensity of light projected onto a portion of the photosensitive area. An electronic device and an image acquisition method are also provided.

Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.

Abstract: A discharging mechanism for automatic cooking device, an automatic cooking device and an automatic cooking method. In the automatic cooking device, a conveyer belt, a discharging mechanism, a cooking component and other operation units are arranged compactly to significantly reduce floor space. A feed toggle device in the discharging mechanism picks ingredient boxes on the conveyer belt and pushes the ingredient boxes to storage platforms. A feed grip device in the discharging mechanism picks an ingredient box on the storage platform and rotates to move the ingredient box over a cooking pot, thereby pouring the ingredient into the cooking pot. Further, the feed grip device rotates the empty ingredient box over a garbage bag hanging ring and enables the ingredient box to fall into a garbage bag. All units in this automatic cooking device are compactly arranged to save space and cover small area, particularly suitable for small kitchens.

Abstract: A font switching method obtains, through pixel matching with a comparison font, a target font consistent with a font currently used by an operating system, and applies the target font to a third-party application, enabling the third-party application to accurately vary with a font change of the operating system and to avoid inconsistency between the font used by the third-party application and the font used by the operating system.

Abstract: A semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.

Abstract: A semiconductor device includes a first to sixth regions, a first gate, a first metal contact and a second metal contact. The second region is disposed opposite to the first region with respect to the first gate. The first metal contact couples the first region to the second region. The fourth region is disposed opposite to the third region with respect to the first gate. The second metal contact is coupling the third region to the fourth region. The fifth region is disposed between the first gate and the second region, and is disconnected from the first metal contact and the second metal contact. The sixth region is disposed between the first gate and the first region, and is disconnected from the first metal contact and the second metal contact.

Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.

Abstract: A micro light-emitting element including an epitaxial structure, an insulating layer, an electrode structure and a sacrificial layer is provided. The epitaxial structure includes a top surface and a side surface. The insulating layer is disposed on the top surface and the side surface of the epitaxial structure, and the insulating layer includes an opening. The electrode structure is disposed on the top surface of the epitaxial structure and extends through the opening of the insulating layer to be electrically connected to the epitaxial structure. The sacrificial layer is sandwiched between a surface of the insulating layer and the corresponding electrode structure. A micro light-emitting element display device is further provided.

Abstract: The present invention discloses a extra thick hot rolled H section steel and a production method therefor. The extra thick hot rolled H section steel contains, by mass, the following chemical components: 0.04-0.11% of C, 0.10-0.40% of Si, 0.40-1.00% of Mn, 0.40-1.00% of Cr, 0.10-0.40% of Cu, 0.020-0.060% of Nb, 0.040-0.100% of V, 0.010-0.025% of Ti, 0.010-0.030% of Al, 0.0060-0.0120% of N, not more than 0.015% of P, not more than 0.005% of S, not more than 0.0060% of O, and the balance Fe and trace residual elements, wherein 0.090%?Nb+V+Ti?0.170%, 6.5?(V+Ti)/N?10.5, and 0.30%?CEV?0.48%. The extra thick hot rolled H section steel has a flange thickness of 90 mm-150 mm, has excellent comprehensive mechanical properties, and can well meet the needs for heavy supporting structural parts of high-rise buildings, large squares, bridge structures, etc.

Abstract: In some embodiments, a semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.

Abstract: A method includes the following operations: disconnecting at least one of drain regions that are formed on a first active area, of first transistors, from a first voltage; and disconnecting at least one of drain regions that are formed on a second active area, of second transistors coupled to the first transistors from a second voltage. The at least one of drain regions of the second transistors corresponds to the at least one of drain regions of the first transistors.

Abstract: A semiconductor device includes a first to sixth regions, a first gate, a first metal contact and a second metal contact. The second region is disposed opposite to the first region with respect to the first gate. The first metal contact couples the first region to the second region. The fourth region is disposed opposite to the third region with respect to the first gate. The second metal contact is coupling the third region to the fourth region. The fifth region is disposed between the first gate and the second region, and is disconnected from the first metal contact and the second metal contact. The sixth region is disposed between the first gate and the first region, and is disconnected from the first metal contact and the second metal contact.