Patents by Inventor Lin Ping

Lin Ping has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080034604
    Abstract: An automatic locking mechanism for use in a power return tape measure includes a user-accessible actuator, a brake element, and a biasing member normally urging the brake element into contact with the tape drum. In a locked position, the brake element wedges against the drum. The actuator displaces inwardly to move the brake element out of contact with the drum. A rotatable coupler/member may convert pivoting motion of the actuator into brake member translation. The coupler may include first and second arms that respectively contact the actuator and the brake element. The coupler may further include a cammed outer surface that contacts the drum in the locked position. The cammed surface rotates out of contact with the drum in the release position. The cammed surface of the rotatable member may be used independently of, or in conjunction with, the brake element. Related methods are also described.
    Type: Application
    Filed: July 16, 2007
    Publication date: February 14, 2008
    Applicant: COOPER BRANDS, INC.
    Inventors: James M. Critelli, Lin Ping Lin
  • Patent number: 7240439
    Abstract: A magnetic end hook for a tape measure has a hook member having a mounting section extending in a first direction and a hooking section extending away from the mounting section in a second direction generally transverse to the first direction. A distinct bezel affixes to the hooking section so as to capture a magnet between the bezel and the hooking section. A magnet is disposed at least partially in a hole in the hooking section and a hole in the bezel so as to be visible from both front and rear views of the end hook. The magnet may include flanges and a fastener, such as a rivet, may secure the bezel in place. There may be a second magnet similarly situated. A tape measure and methods of assembly are also described.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: July 10, 2007
    Assignee: Cooper Brands, Inc.
    Inventors: James M. Critelli, Lin Ping Lin
  • Patent number: 7220677
    Abstract: A method for forming a multi-level semiconductor device to eliminate conductive interconnect protrusions following a WAT test, the method including forming a first metallization layer; carrying out a wafer acceptance testing (WAT) process; and, then carrying out a chemical mechanical polish (CMP) on the metallization layer.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: May 22, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lin-Ping Li, Yung-Cheng Lu, Wen-Chih Chiou, Chih-Hsien Lin
  • Publication number: 20070083782
    Abstract: A Power-saving method, which is able to configure not only the CPU but also the other computer devices, such as the host bus, GUI engine, South Bridge control engine . . . etc., into Power-saving state, has been proposed. The method includes the following steps: issuing a Power-saving related message; dropping the Power-saving related message, wherein a Power-saving related flag is not set; setting the Power-saving related flag; setting a VID/FID pending bit in the CPU, wherein the vertical blanking of the d display/displays occurs and clearing the Power-saving related flag, wherein the Power-saving related flag is set, and executing a power saving process. The Power-saving related flag may be built-in North Bridge, South Bridge or CPU.
    Type: Application
    Filed: October 11, 2005
    Publication date: April 12, 2007
    Applicant: SILICON INTEGRATED SYSTEMS CORP.
    Inventor: TE-LIN PING
  • Publication number: 20070067502
    Abstract: A method for preventing the long latency event in the working procedure of the processor is disclosed, wherein the method comprises one step of checking whether a status happens or not. When the status happens, the processor would release the resource for specific time duration to process other works in order to prevent the long latency event.
    Type: Application
    Filed: September 22, 2005
    Publication date: March 22, 2007
    Inventor: Te-Lin Ping
  • Publication number: 20070028128
    Abstract: A power-saving method of continuous display and effective cost in a system that includes memory directly accessed by a CPU and at least one display device within vertical blanking. The method includes the following steps: issuing a Power-saving related message; dropping the Power-saving related message, wherein a Power-saving related flag is not set; setting the Power-saving related flag; setting a VID/FID pending bit in the CPU, wherein the vertical blanking of the d display/displays occurs and clearing the Power-saving related flag, wherein the Power-saving related flag is set, and executing a power saving process.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventor: Te-Lin Ping
  • Publication number: 20060234403
    Abstract: A method for forming a multi-level semiconductor device to eliminate conductive interconnect protrusions following a WAT test, the method including forming a first metallization layer; carrying out a wafer acceptance testing (WAT) process; and, then carrying out a chemical mechanical polish (CMP) on the metallization layer.
    Type: Application
    Filed: April 13, 2005
    Publication date: October 19, 2006
    Inventors: Lin-Ping Li, Yung-Cheng Lu, Wen-Chih Chiou, Chih-Hsien Lin
  • Publication number: 20050151058
    Abstract: A method and associated architecture for dividing column readout circuitry in an active pixel sensor in a manner which reduces the parasitic capacitance on the readout line. In a preferred implementation, column readout circuits are grouped in blocks and provided with block signaling. Accordingly, only column output circuits in a selected block significantly impart a parasitic capacitance effect on shared column readout lines. Block signaling allows increasing pixel readout rate while maintaining a constant frame rate for utility in large format high-speed imaging applications.
    Type: Application
    Filed: November 8, 2004
    Publication date: July 14, 2005
    Inventor: Lin-Ping Ang
  • Patent number: 6881942
    Abstract: Systems and techniques to readout array-based analog data with reduced power requirements and reduced fixed pattern noise. An image sensor on an integrated circuit may include a sensor array to provide array-based analog data, a parallel sampling circuitry to receive the array-based analog data in parallel, a pipelined amplification circuitry to serially amplify the received array-based analog data, and an analog-to-digital converter to convert the amplified array-based analog data into digital data.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: April 19, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Steve Huang, Lin Ping Ang
  • Patent number: 6847399
    Abstract: A method and associated architecture for dividing column readout circuitry in an active pixel sensor in a manner which reduces the parasitic capacitance on the readout line. In a preferred implementation, column readout circuits are grouped in blocks and provided with block signaling. Accordingly, only column output circuits in a selected block significantly impart a parasitic capacitance effect on shared column readout lines. Block signaling allows increasing pixel readout rate while maintaining a constant frame rate for utility in large format high-speed imaging applications.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: January 25, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Lin-Ping Ang
  • Patent number: 6819280
    Abstract: Systems and techniques to readout array-based analog data with reduced power requirements and reduced fixed pattern noise. An image sensor on an integrated circuit may include a sensor array to provide array-based analog data, a parallel sampling circuitry to receive the array-based analog data in parallel, a pipelined amplification circuitry to serially amplify the received array-based analog data, and an analog-to-digital converter to convert the amplified array-based analog data into digital data.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: November 16, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Steve Huang, Lin Ping Ang
  • Publication number: 20040095490
    Abstract: Systems and techniques to readout array-based analog data with reduced power requirements and reduced fixed pattern noise. An image sensor on an integrated circuit may include a sensor array to provide array-based analog data, a parallel sampling circuitry to receive the array-based analog data in parallel, a pipelined amplification circuitry to serially amplify the received array-based analog data, and an analog-to-digital converter to convert the amplified array-based analog data into digital data.
    Type: Application
    Filed: November 12, 2003
    Publication date: May 20, 2004
    Inventors: Steve Huang, Lin Ping Ang
  • Publication number: 20040078544
    Abstract: A memory address remapping method is disclosed. The memory address remapping method comprises: providing a cache-related address having a tag, an associative tag, a set index and a block offset; providing a linear operator; performing a linear calculation with a first linear operator input and a second linear operator input to obtain a first output, wherein the first linear operator input is several bits picked from the set index of the cache-related address according to a quantity and a corresponding location of a plurality of bits in the location address of a memory address, such as DDR memory-related address, Rambus memory-related address, etc.
    Type: Application
    Filed: October 18, 2002
    Publication date: April 22, 2004
    Applicant: SILICON INTEGRATED SYSTEMS CORPORATION
    Inventors: Ming-Hsien Lee, Te-Lin Ping, Su-Min Liu, Tsan-Hwi Chen
  • Patent number: 6667926
    Abstract: A memory read/write arbitration method is disclosed. The memory read/write arbitration method, which is utilized in a memory controller for increasing row hit rate and decreasing the delay of memory access, comprises: providing a arbitrator; providing a read request fifo queue having command read requests; providing a write request fifo queue having command write requests; performing a judgment step for generating a priority, wherein the judgment step comprises: performing a first sub-judgment step to determine that a command read request of the command read requests has priority over a command write request of the command write requests, or the command write request can be forwarded to a second sub-judgment step under adaptive first-step conditions; performing the second sub-judgment step to determine the read request has priority over the command write request from the first sub-judgment step, or the command write request from the first sub-judgment has priority over the command read request.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: December 23, 2003
    Assignee: Silicon Integrated Systems Corporation
    Inventors: Yi-Hung Chen, Ming-Hsien Lee, Chia-Hsien Chou, Tsan-Hwi Chen, Te-Lin Ping
  • Patent number: 6655969
    Abstract: A circuit board assembly having a circuit board including a via, and a contact element positioned adjacent to the via for providing electrical attachment of the pin to the via of the circuit board.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: December 2, 2003
    Assignee: Intel Corporation
    Inventors: Kok Wah Low, Hwan Ming Wang, Lin Ping Goh
  • Publication number: 20030143877
    Abstract: A circuit board assembly having a circuit board including a via, and a contact element positioned adjacent to the via for providing electrical attachment of the pin to the via of the circuit board.
    Type: Application
    Filed: February 25, 2003
    Publication date: July 31, 2003
    Applicant: Intel Corporation.
    Inventors: Kok Wah Low, Hwan Ming Wang, Lin Ping Goh
  • Patent number: 6572389
    Abstract: A circuit board assembly having a circuit board with at least one via, a pin for insertion into the via, and a contact element positioned adjacent to the pin and the via for providing electrical attachment of the pin to the via of the circuit board. The pin is detachable from the via and the contact element deforms upon insertion of the pin.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: June 3, 2003
    Assignee: Intel Corporation
    Inventors: Kok Wah Low, Hwan Ming Wang, Lin Ping Goh
  • Patent number: 6507011
    Abstract: A CMOS active pixel color linear image sensor is operable in line-packed readout mode, and at very high speed. In accordance with a preferred embodiment, the sensor is formed entirely on a single-chip and may be further configurable for operation in parallel-packed and/or pixel-packed modes. Line-packed pixel readout is accomplished by spreading same color pixel signal sampled values in storage elements across each of plural readout register arrays in a “cyclic” manner. Facility is introduced for starting the reading of a next pixel (e.g., R pixel 2) even before the previous pixel (R pixel 1) has been read out to increase the effective pixel readout rate.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: January 14, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Lin Ping Ang
  • Publication number: 20020139921
    Abstract: Systems and techniques to readout array-based analog data with reduced power requirements and reduced fixed pattern noise. An image sensor on an integrated circuit may include a sensor array to provide array-based analog data, a parallel sampling circuitry to receive the array-based analog data in parallel, a pipelined amplification circuitry to serially amplify the received array-based analog data, and an analog-to-digital converter to convert the amplified array-based analog data into digital data.
    Type: Application
    Filed: April 1, 2002
    Publication date: October 3, 2002
    Inventors: Steve Huang, Lin Ping Ang
  • Patent number: D504628
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: May 3, 2005
    Assignee: Cooper Brands, Inc.
    Inventors: Adam L. Weeks, Lin Ping Lin