Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.

Abstract: A high-dimensional non-orthogonal transmission method is provided. In the method, signals of various users are mapped to form high-dimensional signals, and the high-dimensional signals are pre-coded, such that non-orthogonal transmission is realized in a higher dimension. Moreover, different users perform matched receiving on respective signals, and non-orthogonal transmission signals can be recovered merely by means of a receiver with a linear complexity. By means of the method, multi-user data non-orthogonal transmission can be realized without depending on conditions such as user pairing and collaboration, and various users do not need to perform iterative feedback, such that the detection complexity of non-orthogonal multi-user signals is significantly reduced.

Abstract: A spatial position-dependent I/Q domain modulation method, dual domain modulation method and multiple access communication method are provided. The methods eliminate the dependence of physical layer secure communication on channel state information, and realize the function that a receiver at an expected position can communicate normally, while an eavesdropper at other positions cannot receive a signal or can only receive a wrong signal. The security capability of a wireless communication system is improved from the spatial dimension. The multiple access communication method can realize the distinguishing of multiple users according to precise spatial position points. Even if a plurality of users are located in the same sector in an angular domain, as long as the spatial positions of these users are different, the method can be used to perform multiple access communication, thereby further improving the spatial multiplexing rate of the system and increasing the system capacity.

Abstract: A method includes encapsulating a first device die and a second device die in an encapsulant, and forming an interconnect structure over and electrically connecting to the first device die and the second device die. A waveguide is formed in the interconnect structure. An optical-engine based interconnect component is bonded to the interconnect structure. The optical-engine based interconnect component forms a part of a signal path that connects the first device die to the second device die.

Abstract: A semiconductor structure includes a first dielectric layer, a first die, a second die, a first molding, and a second molding. The first die is disposed under the first dielectric layer, and has a first surface facing the first dielectric layer and a second surface opposite to the first surface. The second die is disposed over the first dielectric layer, and has a third surface facing the first dielectric layer and a fourth surface opposite to the third surface. The first molding encapsulates the first die. The second molding is disposed over the first die and the first dielectric layer. The first surface of the first die and the third surface of the second die are in contact with the first dielectric layer. The fourth surface of the second die is partially exposed through the second molding and partially covered by the second molding.

Abstract: The present invention provides a liquid crystal lens panel and a display device. The liquid crystal lens panel comprises a first substrate (10) and a second substrate (20) that are opposite to each other, and a liquid crystal layer (30) provided between the first substrate (10) and the second substrate (20); the first substrate (10) comprises a first structural layer (12) provided on a first base (11) and a first orientation layer (13) provided on the first structural layer (12); the second substrate (20) comprises a second structural layer (22) provided on a second base (21) and a second orientation layer (23) provided on the second structural layer (22); on a plane parallel to the liquid crystal lens panel, at least one of the first orientation layer (13) and the second orientation layer (23) comprises multiple orientation areas, orientation pretilt angles of at least two orientation areas are different.

Abstract: A data transmission system is disclosed. The data transmission system includes at least one signal processing device, at least one conversion device, at least one antenna device, and at least one flexible printed circuit board. The at least one signal processing device is configured to generate or receive at least one data. The at least one conversion device is configured to transform between the at least one data and an optical signal. The at least one antenna device is configured to obtain the at least one data according to the optical signal, and configured to receive or transmit the at least one data wirelessly. The at least one flexible printed circuit board includes at least one conductive layer and at least one optical waveguide layer. The at least one optical waveguide layer is configured to transmit the optical signal.

Abstract: The invention provides antibodies, and antigen-binding fragments thereof, that specifically bind to E-selectin. The invention includes uses, and associated methods of using the antibodies, and antigen-binding fragments thereof.

Abstract: A high-dimensional signal transmission method is provided. The method generates M M-dimensional first signals on the basis of M original signals and generates M M-dimensional second signals on the basis of a precoding signal and of the first signals, and finally, a transmitter sums all of the second signals and then transmits by utilizing M subchannels. As such, each subchannel carries information of the M original signals; hence, when any subchannel experiences deep fading, the deep fading is shared jointly by M signals, thus preventing the deep fading from causing a particularly severe impact on any signal. Moreover, all of the original signals can be recovered by utilizing the signals on the other subchannels, thus increasing the systematic resistance against subchannel deep fading. Meanwhile, the system implements the parallel transmission of the M original signals, thus ensuring the throughput of a communication system.

Abstract: Provided herein are antibodies that bind to the alpha subunit of an IL-7 receptor (IL-7R?). Also provided are uses of these antibodies in therapeutic applications, such as treatment of inflammatory diseases. Further provided are cells that produce the antibodies, polynucleotides encoding the heavy and/or light chain regions of the antibodies, and vectors comprising the polynucleotides.

Abstract: A phase domain modulation method dependent on a spatial position is provided. The method mainly includes the following steps: a transmitter and a receiver perform time synchronization to obtain a synchronization time; the transmitter performs a phase domain precoding operation on an original signal to obtain a phase domain pre-coded signal; the receiver receives the phase domain pre-coded signal, obtains a phase domain initial reception signal, and performs a phase domain matching operation on the phase domain initial reception signal to obtain an estimation of the original signal.

Abstract: A semiconductor device is provided. The semiconductor device has a stack of parallel metal gates formed on a first side of a substrate, a first pair of insulation regions extending across the stack of parallel metal gates, a second pair of insulation regions replacing two of the parallel metal gates, a first isolated region enclosed by the first and second pairs of insulation layers, a first via formed within the isolated region, and an insulation layer replacing the metal gates located within the isolated region. Tree or more metal gates are located within the isolated region, and the first via extends through a portion of a center one of the three metal gates within the isolated region.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a source/drain region and a first conductive feature disposed below the source/drain region. The first conductive feature is electrically connected to the source/drain region. The structure further includes a second conductive feature disposed over the source/drain region, and the second conductive feature is electrically connected to the source/drain region. The structure further includes a third conductive feature disposed on and in contact with a first portion of the second conductive feature and a dielectric layer disposed on and in contact with a second portion of the second conductive feature.

Abstract: Semiconductor device structures are provided. The semiconductor device structure includes a substrate and a first fin structure protruding from the substrate. The semiconductor device structure further includes an isolation layer formed around the first fin structure and covering a sidewall of the first fin structure and a gate stack formed over the first fin structure and the isolation layer. The semiconductor device structure further includes a first source/drain structure formed over the first fin structure and spaced apart from the gate stack and a contact structure formed over the first source/drain structure. The semiconductor device structure includes a dielectric structure formed through the contact structure. In addition, the contact structure and the dielectric structure has a first slope interface that slopes downwardly from a top surface of the contact structure to a top surface of the isolation layer.

Abstract: A collapsible electric vehicle includes a front vehicle member, a vehicle frame pivotally coupled to the front vehicle member, a seat disposed at the vehicle frame, a power supply, a set of wheels disposed at the front vehicle member and the vehicle frame respectively, and a drive motor eclectically connected to the power supply. The drive motor is connected to at least one of the wheels to drive the wheel to rotate. The collapsible electric vehicle has an expanded state and a collapsed state. In the expanded state, a first supporting frame is expanded and maintained upright to support the seat to be at a suitable position while the front vehicle member is expanded to be positioned apart from the vehicle frame. In the collapsed state, the first supporting frame is collapsed to a main frame, and the front vehicle member is collapsed to the first supporting frame.

Abstract: A semiconductor device includes parallel channel members, a gate structure, source/drain features, a silicide layer, and a source/drain contact. The parallel channel members are spaced apart from one another. The gate structure is wrapping around the channel members. The source/drain features are disposed besides the channel members and at opposite sides of the gate structure. The silicide layer is disposed on and in direct contact with the source/drain features. The source/drain contact is disposed on the silicide layer, wherein the source/drain contact includes a first source/drain contact and a second source/drain contact stacked on the first source/drain contact, and the second source/drain contact is separate from the silicide layer by the first source/drain contact.

Abstract: A semiconductor device and the manufacturing method thereof are described. The device includes semiconductor channel sheets, source and drain regions and a gate structure. The semiconductor channel sheets are arranged in parallel and spaced apart from one another. The source and drain regions are disposed beside the semiconductor channel sheets. The gate structure is disposed around and surrounding the semiconductor channel sheets. The silicide layer is disposed on the source region or the drain region. A contact structure is disposed on the silicide layer on the source region or the drain region. The contact structure includes a metal contact and a liner, and the silicide layer is in contact with the metal contact, and the liner is separate from the silicide layer by the metal contact.

Abstract: The present disclosure describes a method to form a backside power rail (BPR) semiconductor device with an air gap. The method includes forming a fin structure on a first side of a substrate, forming a source/drain (S/D) region adjacent to the fin structure, forming a first S/D contact structure on the first side of the substrate and in contact with the S/D region, and forming a capping structure on the first S/D contact structure. The method further includes removing a portion of the first S/D contact structure through the capping structure to form an air gap and forming a second S/D contact structure on a second side of the substrate and in contact with the S/D region. The second side is opposite to the first side.

Abstract: A method for forming a semiconductor device structure includes forming nanostructures over a front side of a substrate. The method also includes forming a gate structure surrounding the nanostructures. The method also includes forming a source/drain structure beside the gate structure. The method also includes forming a trench though the substrate from a back side of the substrate. The method also includes forming a first silicide layer in contact with the source/drain structure. The method also includes forming a second silicide layer over the first silicide layer and the sidewalls of the trench. The method also includes depositing a first conductive material over the second silicide layer. The method also includes etching back the first conductive material. The method also includes etching back the second silicide layer. The method also includes depositing a second conductive material in the trench.