Abstract: A micro total analysis system, operating method and manufacturing method thereof are provided. The micro total analysis system includes at least one micro total analysis unit each including: microfluidic device including first electrode and dielectric layer connected to each other, where the dielectric layer drives to-be-measured droplet to move based on voltage of the first electrode; and acoustic wave detection device including second electrode connected to the dielectric layer, where the dielectric layer is also used as transducer of the acoustic wave detection device, and configured to generate acoustic wave toward the droplet based on voltage of the second electrode, and generate a detection result corresponding to the droplet based on received acoustic wave. The micro total analysis system, the operating method and the manufacturing method thereof enables the microfluidic device and the acoustic wave detection device to be integrated in the same chip.

Abstract: The present disclosure relates to a backlight module, a method for designing the same, and a display device. The backlight module includes: a first substrate; a plurality of LED chips on the first substrate; and a light control structure on the first substrate. The backlight module includes a plurality of light control region groups in one-to-one correspondence with the plurality of light-emitting diode chips, each light control region group includes at least a first light control region and a second light control region. The light control structure includes a plurality of light control substructure groups respectively located in the plurality of light control region groups. Each light control substructure group includes at least a first light control substructure in the first light control region and a second light control substructure in the second light control region.

Abstract: The embodiments of the present disclosure provide a display panel. The display panel includes a first substrate, a second substrate disposed opposite to the first substrate, and a liquid crystal layer between the first substrate and the second substrate, a plurality of first electrodes disposed on a side, close to the second substrate, of the first substrate and spaced apart at intervals, a first dielectric layer for planarizing the plurality of first electrodes, a second dielectric layer disposed on a side, close to the liquid crystal layer, of the first dielectric layer, a light shielding portion disposed on the side, close to the liquid crystal layer, of the second substrate, and a control circuit configured to apply a voltage between the first electrode and the second electrode so that the liquid crystal layer is in a first state or a second state.

Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first substrate and a second substrate which are aligned and combined into a cell, wherein the first substrate includes a backlight structure layer and an array structure layer arranged on a side of the backlight structure layer facing the second substrate, the backlight structure layer includes a light guide plate, a grating layer arranged on a side of the light guide plate facing the array structure layer and a refractive layer covering the grating layer, the grating layer includes a plurality of grating units, the array structure layer includes a plurality of pixel electrodes, and the grating units are in one-to-one correspondence with the pixel electrodes.

Abstract: Provided is a display substrate, which includes a base substrate, a circuit structure layer disposed on the base substrate, multiple ultrasonic sensing elements and multiple micro light-emitting elements. The multiple ultrasonic sensing elements are disposed on a side of the circuit structure layer away from the base substrate, and are electrically connected to the circuit structure layer, and the multiple light-emitting elements are disposed on the side of the circuit structure layer away from the base substrate, and are electrically connected to the circuit structure layer. An orthographic projection of the multiple ultrasonic sensing elements on the base substrate does not overlap with an orthographic projection of the multiple micro light-emitting elements on the base substrate.

Abstract: There is provided a display panel including: a light guide structure layer having a light exiting side and configured to enable internal light to be emitted from a preset position; a display structure layer on the light exiting side and including a light adjusting structure, a black matrix and a reflection matrix positioned on a side, away from the light guide structure layer, of the light adjusting structure, the light adjusting structure is configured to control light emitted from the preset position to enter an area where the black matrix is positioned and/or an area where the reflection matrix is positioned; a light absorption structure layer on a side of the light adjusting structure away from the black matrix and configured to absorb light reflected by the black matrix and allow light reflected by the reflection matrix to pass through. A display device is further provided.

Abstract: The present application discloses display substrate having a base substrate; an insulating layer on the base substrate; and an electrode layer on a side of the insulating layer distal to the base substrate and having a plurality of electrode blocks. The insulating layer has a first side distal to the base substrate and a second side opposite to the first side and proximal to the base substrate. Each of the plurality of electrode blocks has a third side distal to the base substrate and a fourth side opposite to the third side and proximal to the base substrate. The first side of the insulating layer in the inter-electrode block region has a first height relative to a surface of the base substrate greater than a second height of the fourth side of an adjacent electrode of the plurality of electrode blocks relative to the surface of the base substrate.

Abstract: A fingerprint identification module, a manufacturing method thereof and an electronic device are disclosed. In the fingerprint identification module, an auxiliary structure is at least partially located on a functional substrate, and a plurality of first driving electrodes are on a side, away from the functional substrate, of the piezoelectric material and the auxiliary structure; each first driving electrode extends along a first direction and exceeds a first edge of the piezoelectric material layer in the first direction; the plurality of first driving electrodes are arranged at intervals along a second direction; the auxiliary structure is at least in contact with the first edge; the auxiliary structure includes a slope portion; and a thickness of the slope portion in a direction perpendicular to the functional substrate gradually decreases in a direction from the first edge to a position away from a center of the piezoelectric material layer.

Abstract: Embodiments of the present disclosure provide a method for manufacturing a fingerprint recognition method, a fingerprint recognition module, and a display device. The method for manufacturing the fingerprint recognition module includes: providing a backplane; forming a bonding terminal in a bonding area of the backplane; forming a sensing electrode in a fingerprint recognition area of the backplane; forming an insulation layer cladding the bonding terminal in the bonding area, and forming a piezoelectric material layer in the fingerprint recognition area, where an orthographic projection of the piezoelectric material layer on the backplane coincides with an orthographic projection of the sensing electrode on the backplane; performing polarization processing on the piezoelectric material layer; and peeling off the insulation layer.

Abstract: The present application discloses display substrate having a base substrate; an insulating layer on the base substrate; and an electrode layer on a side of the insulating layer distal to the base substrate and having a plurality of electrode blocks. The insulating layer has a first side distal to the base substrate and a second side opposite to the first side and proximal to the base substrate. Each of the plurality of electrode blocks has a third side distal to the base substrate and a fourth side opposite to the third side and proximal to the base substrate. The first side of the insulating layer in the inter-electrode block region has a first height relative to a surface of the base substrate greater than a second height of the fourth side of an adjacent electrode of the plurality of electrode blocks relative to the surface of the base substrate.

Abstract: A detection substrate, a preparation method thereof, a detection device and a detection method are provided. A detection substrate includes a base substrate, wherein the base substrate includes multiple through holes, and electrode columns are embedded in the multiple through holes; the base substrate comprises a detection region and a bonding pad region, the detection region includes a driving circuit, and the bonding pad region is provided with bonding pads; and the bonding pads are connected with the electrode columns through the driving circuit.

Abstract: A filter structure and a method for manufacturing the same, and a display device. The filter structure includes a base substrate and a plurality of filter units positioned on the base substrate, at least part of the filter units including a quantum dot filter layer. The filter units further include a reflective structure whose orthographic projection on the base substrate surrounds the orthographic projection of the quantum dot filter layer on the base substrate. A distance between a plane of the reflective structure away from the base substrate and the base substrate is greater than a distance between a plane of the quantum dot filter layer close to the base substrate and the base substrate.

Abstract: Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate, an active structure layer disposed on the substrate, a first source-drain structure layer disposed on a side of the active structure layer away from the substrate, and a second source-drain structure layer disposed on a side of the first source-drain structure layer away from the substrate. The active structure layer includes a first active layer and a second active layer. The first source-drain structure layer includes a first active via and a first source-drain electrode, and the first source-drain electrode is connected to the first active layer through the first active via; and the second source-drain structure layer includes a second active via and a second source-drain electrode, and the second source-drain electrode is connected to the second active layer through the second active via.

Abstract: The present application discloses an array substrate having a plurality of first thin film transistors and a plurality of second thin film transistors. Each of the plurality of first thin film transistors includes a silicon active layer. The array substrate includes a base substrate; a silicon layer having a plurality of silicon active layers respectively for the plurality of first thin film transistors; and a UV absorption layer on a side of the silicon layer distal to the base substrate, and including a plurality of UV absorption blocks. Each of the plurality of UV absorption blocks is on a side of the one of the plurality of silicon active layers distal to the base substrate, and is insulated from the one of the plurality of silicon active layers.

Abstract: The present disclosure can provide a transparent display panel, a preparation method thereof and a display device. The transparent display panel includes a bearing layer disposed between a base substrate and a liquid crystal layer and including a plurality of concave structures, and a plurality of reflecting structures located between the bearing layer and the liquid crystal layer, where an orthographic projection of the concave structure on the base substrate covers an orthographic projection of one or more reflecting structures on the base substrate.

Abstract: A driving backplane includes a base, and a pixel driving circuit, a first electrode and a first piezoelectric block that are disposed in the sub-pixel region. The pixel driving circuit is disposed on the base. The first electrode is disposed at a side of the pixel driving circuit away from the base. The first electrode includes a first sub-electrode pattern and a second sub-electrode pattern that are in a same layer and are spaced apart to be insulated from each other, and the first sub-electrode pattern is electrically connected to the pixel driving circuit. The first piezoelectric block is disposed between the pixel driving circuit and the first electrode, and the first sub-electrode pattern and the second sub-electrode pattern are in contact with the first piezoelectric block.

Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first display region, and the first display region includes multiple sub-display regions and a first light transmittance region located between adjacent sub-display regions. Each first sub-display region of the multiple sub-display regions includes a first light-emitting element and a first filter unit disposed in a first light-emergence direction of the first light-emitting element. Each second sub-display region in the multiple sub-display regions includes a first collimating light extraction element disposed in a second light-emergence direction of the first light-emitting element and a second filter unit disposed in a light-emergence direction of the first collimating light extraction element.

Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first substrate and a second substrate which are aligned and combined into a cell, wherein the first substrate includes a backlight structure layer and an array structure layer arranged on a side of the backlight structure layer facing the second substrate, the backlight structure layer includes a light guide plate, a grating layer arranged on a side of the light guide plate facing the array structure layer and a refractive layer covering the grating layer, the grating layer includes a plurality of grating units, the array structure layer includes a plurality of pixel electrodes, and the grating units are in one-to-one correspondence with the pixel electrodes.

Abstract: The present disclosure provides a fingerprint recognition unit and a fabrication method thereof, a fingerprint recognition module and a display device. The fingerprint recognition unit includes: a bearing substrate; a receiving electrode layer on the bearing substrate; a piezoelectric material layer on a side of the receiving electrode layer away from the bearing substrate; and a driving electrode layer on a side of the piezoelectric material layer away from the receiving electrode layer. A density of the driving electrode layer is greater than 5 g/cm3, and a thickness of the driving electrode layer, a thickness of the piezoelectric material layer and a thickness of the bearing substrate are configured such that a vibration nodal plane of the piezoelectric material layer is within the piezoelectric material layer.

Abstract: An array substrate includes a flexible base substrate; a buffer layer on the flexible base substrate and continuously extending from a display area into a peripheral area, including a first portion substantially extending throughout the display area and a second portion in the peripheral area, the first portion and the second portion being parts of an integral layer, an organic insulating layer substantially extending throughout but limited in the display area and on a side of the buffer layer away from the flexible base substrate; an inorganic insulating layer limited in the peripheral area and on a side of the buffer layer away from the flexible base substrate; a planarization layer on a side of the organic insulating layer away from the buffer layer, and a plurality of light emitting elements on a side of the planarization layer away from the organic insulating layer.