Abstract: Methods and apparatus are presented for controlling a power converter to protect input filter inductors from overheating, in which an active front end (AFE) rectifier is operated in a boost mode to provide a boosted DC voltage at a derated output current value selected according to the DC bus voltage boost amount corresponding to a maximum load condition for which the filter inductors will not overheat.

Abstract: Systems and methods are provided for pre-charging the DC bus on a motor drive. Pre-charging techniques involve pre-charge circuitry including a manual switch, an automatic switch, and pre-charge control circuitry to switch the automatic switch between pre-charge and pre-charge bypass modes in response to an initialized pre-charge operation, input voltage sags, and so forth. In some embodiments, the pre-charge operation may be initialized by switching the manual switch closed. In some embodiments, the pre-charge operation may also be initialized by a detected voltage sag on the DC bus. The pre-charge circuitry may also be configured to disconnect to isolate a motor drive from the common DC bus under certain fault conditions.

Abstract: Multilevel power converters, power cells and methods are presented for selectively bypassing a power stage of a multilevel inverter circuit, in which a single relay or contactor includes first and second normally closed output control contacts coupled between a given power cell switching circuit and the given power cell output, along with a normally open bypass contact coupled across the power stage output, with a local or central controller energizing the coil of the relay or contactor of a given cell to bypass that cell.

Abstract: Methods and apparatus are presented for controlling a power converter to protect input filter inductors from overheating, in which an active front end (AFE) rectifier is operated in a boost mode to provide a boosted DC voltage at a derated output current value selected according to the DC bus voltage boost amount corresponding to a maximum load condition for which the filter inductors will not overheat.

Abstract: Power conversion systems, filter circuits and integrated filter resistor and inductor apparatus are presented, in which a damping resistor is integrated with a filter inductor by winding joined resistor winding portions proximate to one another at least partially around a filter inductor core leg to form an integrated filter resistor and inductor apparatus for interconnection with filter capacitors to provide an input filter or an output filter for a motor drive or other power conversion system.

Abstract: Multilevel power converters, power cells and methods are presented for selectively bypassing a power stage of a multilevel inverter circuit, in which a single relay or contactor includes one or more normally closed output control contacts coupled between a given power cell switching circuit and the given power cell output, along with a normally open bypass contact coupled across the power stage output, with a local or central controller energizing the coil of the relay or contactor of a given cell to bypass that cell.

Abstract: Methods and apparatus are presented for detecting degrading filter capacitors in motor drives or other power converters, in which an expected DC equivalent voltage and a measured DC equivalent voltage are computed according to sampled filter circuit currents and voltages, and compared to selectively identify filter capacitor degradation conditions in a power converter filter circuit.

Abstract: A HRG ground fault detector and method for detecting a ground fault in a High Resistance Ground (HRG) system are provided. The HRG ground fault detector in one example embodiment includes a first input A coupled to a first phase PHA of the HRG system, a second input B coupled to a second phase PHB, and a third input C coupled to a third phase PHC, with the HRG ground fault detector generating a simulated neutral voltage VN? from the first phase PHA, the second phase PHB, and the third phase PHC. The simulated neutral voltage VN? has a zero voltage potential when the first phase PHA, the second phase PHB, and the third phase PHC are equal. The HRG ground fault detector further compares the simulated neutral voltage VN? to a predetermined fault voltage threshold, and detects a HRG ground fault if the simulated neutral voltage VN? exceeds the threshold.

Abstract: Methods, control apparatus and computer readable mediums are presented for controlling a switching inverter in which a controller selectively suspends PWM carrier signals to provide inverter switching control signals using zero vectors in response to a maximal pulse width value for a present PWM half cycle being greater than a threshold value, and accumulates a present output control value for individual output phases for use in a subsequent PWM half cycle for selective effective reduction in switching frequency for low-speed operation while maintaining high frequency control loop sampling.

Abstract: Methods and apparatus are presented for unintentional islanding detection for grid tie converters in which the phase angle disturbance is introduced by modification of grid side converter switching control signals and a mismatch of reactive power between generation and the grid load is formed upon the occurrence of unintentional islanding, where the applied phase disturbance is determined according to two pre-defined curves to form an equivalent positive feedback at different frequencies to prevent the converter from forming an island at a new stable frequency after the grid is disconnected.

Abstract: Multilevel inverters, power cells and bypass methods are presented in which a power cell switching circuit is selectively disconnected from the power cell output, and a bypass which is closed to connect first and second cell output terminals to selectively bypass a power stage of a multilevel inverter, with an optional AC input switch to selectively disconnect the AC input from the power cell switching circuit during bypass.

Abstract: Methods, control apparatus and computer readable mediums are presented for controlling a switching inverter in which a controller selectively suspends PWM carrier signals to provide inverter switching control signals using zero vectors in response to a maximal pulse width value for a present PWM half cycle being greater than a threshold value, and accumulates a present output control value for individual output phases for use in a subsequent PWM half cycle for selective effective reduction in switching frequency for low-speed operation while maintaining high frequency control loop sampling.

Abstract: Multilevel inverters, power cells and bypass methods are presented in which a power cell switching circuit is selectively disconnected from the power cell output, and a bypass which is closed to connect first and second cell output terminals to selectively bypass a power stage of a multilevel inverter, with an optional AC input switch to selectively disconnect the AC input from the power cell switching circuit during bypass.

Abstract: Control apparatus, techniques and computer readable mediums are presented to mitigate LCL filter resonance issue for voltage source converters. Two level voltage source converter with and without passive damping of LCL filter are selected for the comparative study. Control algorithms are presented to estimate the source impedance based on variable carrier PWM. Estimated source impedance is used to tune the control of the VSC to avoid the resonance of LCL filter has been presented. In situations in which LCL resonance cannot be avoided by tuning the control parameters, energy efficient techniques are disclosed to provide selective passive damping to facilitate continued power conversion system operation without significant adverse impact on system performance.

Abstract: Methods, apparatus and computer readable mediums are presented for controlling a multiphase inverter in which third harmonic injection pulse width modulation (THIPWM) is used for generating inverter switching control signals at or above a non-zero threshold inverter output frequency, and high frequency injection discontinuous pulse width modulation (HFIDPWM) is used for inverter output frequencies below the threshold, where the threshold frequency corresponds to a threshold period less than or equal to the thermal impedance time constant of the inverter switching devices, and the injected high frequency component for HFIDPWM corresponds to a common mode period less than the thermal impedance time constant to mitigate thermal stress on the inverter switches and low speed inverter output derating.

Abstract: Methods, apparatus and computer readable mediums are presented for controlling a multiphase inverter in which third harmonic injection pulse width modulation (THIPWM) is used for generating inverter switching control signals at or above a non-zero threshold inverter output frequency, and high frequency injection discontinuous pulse width modulation (HFIDPWM) is used for inverter output frequencies below the threshold, where the threshold frequency corresponds to a threshold period less than or equal to the thermal impedance time constant of the inverter switching devices, and the injected high frequency component for HFIDPWM corresponds to a common mode period less than the thermal impedance time constant to mitigate thermal stress on the inverter switches and low speed inverter output derating.

Abstract: Methods and apparatus are presented for detecting degrading filter capacitors in motor drives or other power converters, in which an expected DC equivalent voltage and a measured DC equivalent voltage are computed according to sampled filter circuit currents and voltages, and compared to selectively identify filter capacitor degradation conditions in a power converter filter circuit.

Abstract: Methods an apparatus are presented for identifying ground fault locations in multi-drive systems in which individual drives perform self-diagnosis for detected faults based on an identified fault signal frequency while the system drives continue operation, and a ground fault location system identifies suspected drives and individually confirms or exonerates individual drives by selective command speed adjustment while the drives remain operational within system tolerance ranges.

Abstract: Motor drive power conversion systems are provided including a rectifier and a switching inverter, wherein the switching devices of the rectifier, the inverter and/or of a DC/DC converter are silicon carbide switches, such as silicon carbide MOSFETs. Driver circuits are provided for providing bipolar gate drive signals to the silicon carbide MOSFETs, including providing negative gate-source voltage for controlling the off state of enhancement mode low side drivers and positive gate-source voltage for controlling the off state of enhancement mode high side drivers.

Abstract: Systems and methods are provided for pre-charging the DC bus on a motor drive. Pre-charging techniques involve pre-charge circuitry including a manual switch, an automatic switch, and pre-charge control circuitry to switch the automatic switch between pre-charge and pre-charge bypass modes in response to an initialized pre-charge operation, input voltage sags, and so forth. In some embodiments, the pre-charge operation may be initialized by switching the manual switch closed. In some embodiments, the pre-charge operation may also be initialized by a detected voltage sag on the DC bus. The pre-charge circuitry may also be configured to disconnect to isolate a motor drive from the common DC bus under certain fault conditions.