Abstract: A computer includes a processor and multiple components directly or indirectly connected to the processor. Each component is coupled to a control device, and is configured to provide resources for one or more application programs running in the computer. The processor, when executing an application program, attaches a tag to an application request, and sends the tag-attached application request to a control device coupled with a component to which the tag-attached application request is directed. The control device receives the tag-attached application request, determines, based on the tag and a resource allocation policy, an amount of resources in the component and instructs the component to allocate the amount of resources and process the application request in accordance with the amount of resources allocated for the application request.

Abstract: A method and an apparatus for accessing a hardware resource are provided. The method includes configuring permission for one or more privileged instructions that are used for hardware access such that when the privileged instructions are used by a user mode application program, the application program can access a hardware resource without trapping into a kernel, and executing the privileged instructions that are encapsulated in the privileged application programming interface (API) that is called at the code level by the application program , and a privileged instruction for direct access to a hardware resource is set and encapsulated into an API, which is deployed in user space in order to reduce system overheads for accessing the hardware resource and improve processing efficiency.

Abstract: A data processing method and apparatus, where the method comprises an operating system loads a task code to a reserved hardware thread such that the reserved hardware thread executes the task code subsequently after receiving a hardware thread reservation request. Alternatively, in a process in which an operating system loads a task code to a hardware thread for execution, the hardware thread loads the small task code to a reserved hardware thread for execution without a need to create a thread for a task code corresponding to each task when the hardware thread reads a flag of a small task code.

Abstract: A method, system, and computer usable program product for improved register allocation in a simultaneous multithreaded processor. A determination is made that a thread of an application in the data processing environment needs more physical registers than are available to allocate to the thread. The thread is configured to utilize a logical register that is mapped to a memory register. The thread is executed utilizing the physical registers and the memory registers.

Abstract: A method for continuously authenticating a user of voice recognition services is described. According to the method a user is initially authenticated, with a user interface for a computer system that accepts vocal input, by comparing vocal input to a pre-recorded file corresponding to an approved user. The input from a current user is compared to an approved user profile corresponding to the approved user. A risk factor is determined based on a deviation of current user input to the user interface from the approved user profile. The current user is selectively re-authenticated based on the risk factor.

Abstract: Provided are adenoviral vectors for generating an immune response to antigen. The vectors comprise a transcription unit encoding a secretable polypeptide, the polypeptide comprising a secretory signal sequence upstream of a tumor antigen upstream of CD40 ligand, which is missing all or substantially all of the transmembrane domain rendering CD40L secretable. Also provided are methods of generating an immune response against cells expressing a tumor antigen by administering an effective amount of the invention vector. Further provided are methods of generating an immune response against cancer expressing a tumor antigen in an individual by administering an effective amount of the invention vector. Still further provided are methods of generating immunity to infection by human papilloma virus (HPV) by administering an effective amount of the invention vector which encodes the E6 or E7 protein of HPV. The immunity generated is long term.

Abstract: A computer implemented method and system for providing customer information to a support technician that includes, with a computer, analyzing electronic records related to a particular customer to determine a customer interaction style, and, with a computer, displaying a set of guidelines based on the particular customer's interaction style to a technician in a support interaction with the particular customer. The customer interaction style includes a customer focus dimension, the customer focus dimension indicating a degree to which the particular customer seeks an explanation with a provided solution; a customer work style dimension, the customer work style dimension indicating a rating of the particular customer along a range from self-sufficient to support reliant, and, a customer expression dimension, the customer expression dimension indicating an amount in which the particular customer engages in discussion unrelated to the provided solution.

Abstract: A method and an apparatus for accessing physical resources, is used to restrict access to physical resources of other light system kernel Light OSs by a first Light OS in a multi-kernel operating system and ensure security of accessing physical resources among the Light OSs. A method, executed by secure firmware, includes: receiving a physical address corresponding to a physical resource to be accessed by the first Light OS; determining whether the physical address corresponding to the physical resource is out of bounds; and if the physical address corresponding to the physical resource is within bounds, sending an access continuity signal to the first Light OS; or if the physical address corresponding to the physical resource is out of bounds, sending an access error signal to the first Light OS.

Abstract: Receiving point of interest zones and alerts on user devices comprises communicating, by a user computing device to a remote computing device, a request for point of interest data corresponding to points of interest within a proximity of the user device; presenting the received point of interest data; identifying a particular point of interest; and outputting an alert regarding the particular point of interest. Receiving point of interest zones on user devices comprises communicating a request for point of interest data; receiving the point of interest data from the remote network device wherein a size of the point of interest zone is determined based on a density of points of interest in the proximity of the user, and wherein the shape of the point of interest zone is expanded in a direction of travel and contracted in the opposite direction; and presenting the received point of interest data.

Abstract: A method and an apparatus for accessing a hardware resource are provided. The method includes configuring permission for one or more privileged instructions that are used for hardware access such that when the privileged instructions are used by a user mode application program, the application program can access a hardware resource without trapping into a kernel, and executing the privileged instructions that are encapsulated in the privileged application programming interface (API) that is called at the code level by the application program , and a privileged instruction for direct access to a hardware resource is set and encapsulated into an API, which is deployed in user space in order to reduce system overheads for accessing the hardware resource and improve processing efficiency.

Abstract: A memory segment access method and apparatus relates to the field of computer technologies, which are used to resolve a problem of a relatively low memory access bandwidth caused by relatively low utilization of bandwidth resources in a multichannel memory system. The method includes acquiring, by a first scheduler, a quantity of to-be-sent memory access requests in a second scheduler, and receiving, by the first scheduler, a memory access request, and sending the memory access request through a second memory channel corresponding to the second scheduler.

Abstract: A server connection method and system, which relates to the field of communications technologies, such that servers of a same specification are used to implement an optimal network, thereby reducing complexity of routing implementation which includes, providing ten servers, where each server includes five nodes, and the five nodes of each server are connected head-to-tail in series in a same connection manner, and connecting five nodes of any server in five of the ten servers to five nodes of each of the remaining five servers in a one-to-one correspondence manner, in order to form an optimal network of a Hoffman-Singleton graph.

Abstract: A multilevel cache-based data read/write method and a computer system. The method includes acquiring a query address of a physical memory data block in which data is to be read/written, acquiring a cache location attribute of the physical memory data block, querying whether a cache is hit until one cache is hit or all caches are missed, where the querying is performed according to the query address in descending order of levels of caches storable for the physical memory data block, and the levels of the caches are indicated by the cache location attribute, and if one cache is hit, reading/writing the data in the query address of the physical memory data block in the hit cache; or, if all caches are missed, reading/writing the data in the query address of the physical memory data block in a memory.

Abstract: Receiving point of interest zones and alerts on user devices comprises communicating, by a user computing device to a remote computing device, a request for point of interest data corresponding to points of interest within a proximity of the user device; presenting the received point of interest data; identifying a particular point of interest; and outputting an alert regarding the particular point of interest. Receiving point of interest zones on user devices comprises communicating a request for point of interest data; receiving the point of interest data from the remote network device wherein a size of the point of interest zone is determined based on a density of points of interest in the proximity of the user, and wherein the shape of the point of interest zone is expanded in a direction of travel and contracted in the opposite direction; and presenting the received point of interest data.

Abstract: A TLB management method and computer are provided. The method includes querying a TLB storage directory table using a VPID of a first VCPU as an index, to obtain an address of a TLB storage table corresponding to the first VCPU; then accessing, according to the address of the TLB storage table corresponding to the first VCPU, the TLB storage table corresponding to the first VCPU, and reading a valid TLB entry in the TLB storage table corresponding to the first VCPU into a physical TLB.

Abstract: A method and an apparatus for determining a physical address are disclosed. According to the present disclosure, a page size is obtained according to the higher-order N bits of a linear address, where N is greater than 0 and less than a quantity of bits of the linear address; an index number of a translation lookaside buffer TLB is obtained according to the page size; a mask is obtained according to the page size and a supported minimum page size; a label of the TLB is obtained according to the mask; the higher-order MAC1 bits of a physical address corresponding to the linear address are obtained by searching the TLB according to the index number and the label; and the physical address is obtained according to the mask, the supported minimum page, and the higher-order MAC1 bits of the physical address.

Abstract: A memory system, a method for processing a memory access request, and a computer system are provided. The memory system includes a first memory and a second memory that are of different types and separately configured to store operating data of a processor; a memory indexing table that stores a fetch address of a data unit block located in the first memory; a buffer scheduler configured to receive a memory access request of a memory controller, determine whether the data unit block corresponding to the fetch address is stored in the first memory or the second memory, and complete a fetch operation of the memory access request in the determined memory. A memory access request may be separately completed in different type of memory, which is transparent to an operating system, does not cause page fault, and can improve a memory access speed.

Abstract: A memory management method implemented by a requesting node includes sending first indication information used for indicating a length of memory required by the requesting node and receiving second indication information used for indicating first remote memory provided to the requesting node by a target contributing node in at least one contributing node that can provide remote memory. The method also includes determining, from available virtual addresses, a first virtual address corresponding to the first remote memory, and sending a first data read/write instruction for the first data when first data whose pointer is within a range of the first virtual address needs to be read/written, where the first data read/write instruction includes third indication information, and the third indication information is used for indicating storage space, for storing the first data, in the first remote memory.

Abstract: A cross-page prefetching method, apparatus, and system are disclosed, which can improve a prefetching hit ratio of a prefetching device, and further improve efficiency of memory access. The method includes: receiving an indication message, sent by a cache, that a physical address is missing, where the indication message carries a mapped-to first physical address and contiguity information of a first physical page to which the first physical address belongs; acquiring a prefetching address according to the first physical address and a step size that is stored in a prefetching device; and if a page number of a physical page to which the prefetching address belongs is different from a page number of the first physical page, and it is determined, according to the contiguity information of the first physical page, that the first physical page is contiguous, prefetching data at the prefetching address.

Abstract: A predication technique for out-of-order instruction processing provides efficient out-of-order execution with low hardware overhead. A special op-code demarks unified regions of program code that contain predicated instructions that depend on the resolution of a condition. Field(s) or operand(s) associated with the special op-code indicate the number of instructions that follow the op-code and also contain an indication of the association of each instruction with its corresponding conditional path. Each conditional register write in a region has a corresponding register write for each conditional path, with additional register writes inserted by the compiler if symmetry is not already present, forming a coupled set of register writes. Therefore, a unified instruction stream can be decoded and dispatched with the register writes all associated with the same re-name resource, and the conditional register write is resolved by executing the particular instruction specified by the resolved condition.