Patents by Inventor Lok Won Kim

Lok Won Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12688602
    Abstract: An electronic device mounted on a fixed or a movable apparatus is provided. The electronic device may comprise a neural processing unit (NPU), including a plurality of processing elements (PEs), configured to process an operation of an artificial neural network model trained to detect or track at least one object and output an inference result based on at least one image acquired from at least one camera; and a signal generator generating a signal applicable to the at least one camera.
    Type: Grant
    Filed: January 24, 2024
    Date of Patent: July 21, 2026
    Assignee: DEEPX CO., LTD.
    Inventors: Ha Joon Yu, You Jun Kim, Lok Won Kim
  • Patent number: 12682208
    Abstract: Provided are a system and a method for performing layer optimization of a stacked resistive random access memory device by using artificial intelligence technology. The method relates to a method using a neural network device for performing layer optimization of a stacked resistive random access memory device by using artificial intelligence technology, and may comprise the steps of: classifying, by the neural network device, binary neural network (BNN) parameters into a physical parameter and a hyper-parameter in a BNN model; obtaining, by the neural network device, an optimal parameter by using the physical parameter and the hyper-parameter; and calculating, by the neural network device, a minimum channel size in the BNN model by using the optimal parameter.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: July 14, 2026
    Assignee: UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG UNIVERSITY
    Inventor: Lok Won Kim
  • Publication number: 20260196034
    Abstract: An image processing method performed by a neural processing unit is disclosed. The method includes receiving an input image including at least one object and processing the input image using a first model via the neural processing unit to detect a particular object among the at least one object, the first model being an artificial neural network-based object detector trained to detect the particular object in an image. The method further includes processing the input image using a second model via the neural processing unit to blur the particular object in the input image, the second model being an artificial neural network trained to blur a region corresponding to the particular object. An output image including the blurred particular object is generated.
    Type: Application
    Filed: March 6, 2026
    Publication date: July 9, 2026
    Applicant: DEEPX CO., LTD.
    Inventors: Lok Won KIM, Shin Woo JEON
  • Publication number: 20260192825
    Abstract: A neural processing unit (NPU) includes a controller including a scheduler, the controller configured to receive from a compiler a machine code of an artificial neural network (ANN) including a fusion ANN, the machine code including data locality information of the fusion ANN, and receive heterogeneous sensor data from a plurality of sensors corresponding to the fusion ANN; at least one processing element configured to perform fusion operations of the fusion ANN including a convolution operation and at least one special function operation; a special function unit (SFU) configured to perform a special function operation of the fusion ANN; and an on-chip memory configured to store operation data of the fusion ANN, wherein the schedular is configured to control the at least one processing element and the on-chip memory such that all operations of the fusion ANN are processed in a predetermined sequence according to the data locality information.
    Type: Application
    Filed: March 2, 2026
    Publication date: July 9, 2026
    Inventor: Lok Won KIM
  • Publication number: 20260170318
    Abstract: A neural processing unit (NPU), a method for driving an artificial neural network (ANN) model, and an ANN driving apparatus are provided. The NPU includes a semiconductor circuit that includes at least one processing element (PE) configured to process an operation of an artificial neural network (ANN) model; and at least one memory configurable to store a first kernel and a first kernel filter. The NPU is configured to generate a first modulation kernel based on the first kernel and the first kernel filter and to generate second modulation kernel based on the first kernel and a second kernel filter generated by applying a mathematical function to the first kernel filter. Power consumption and memory read time are both reduced by decreasing the data size of a kernel read from a separate memory to an artificial neural network processor and/or by decreasing the number of memory read requests.
    Type: Application
    Filed: January 13, 2026
    Publication date: June 18, 2026
    Inventor: Lok Won KIM
  • Patent number: 12657446
    Abstract: A scalable AI system includes a plurality of slots on a main board, at least one AI module mounted in the slots to perform AI operations, and a main processor that controls the entire system. A user can flexibly scale the overall AI computation performance of the system by adjusting the number of AI modules as needed. Each AI module is equipped with a low-power NPU specialized for AI operations and adopts standard form factors (e.g., M.2, E1.S) to improve economy and scalability. This can solve the problems of high-power consumption and cost, which are limitations of GPU-based systems, and can efficiently support various AI applications.
    Type: Grant
    Filed: July 14, 2025
    Date of Patent: June 16, 2026
    Assignee: DEEPX CO., LTD.
    Inventors: Lok Won Kim, In Goo Kang
  • Patent number: 12658280
    Abstract: Provided is a method for performing an aging test on a neural processing unit (NPU) with a capability of a runtime test. The method may comprise: performing an aging test on the NPU which comprises a plurality of functional components. The plurality of functional components may comprise at least one memory and plural processing elements. The performing of the aging test may include: performing a scan test on the NPU to verify whether at least one functional component in the NPU is defective or not; and performing a memory test on the at least one memory. At least one of the scan test and the memory test may be repeatedly performed to put a stress on the NPU for the aging test. The aging test may be repeated by a predetermined number.
    Type: Grant
    Filed: April 29, 2024
    Date of Patent: June 16, 2026
    Assignee: DEEPX CO., LTD.
    Inventor: Lok Won Kim
  • Patent number: 12651450
    Abstract: A neural processing unit (NPU) for decoding video or feature map is provided. The NPU may comprise at least one processing element (PE) to perform an inference using an artificial neural network. The at least one PE may be configured to receive and decode data included in a bitstream. The data included in the bitstream may comprise data of a base layer. Alternatively, the data included in the bitstream may comprise data of the base layer and data of at least one enhancement layer. The data of the base layer included in the bitstream may include a first feature map. The data of the at least one enhancement layer included in the bitstream may include a second feature map.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: June 9, 2026
    Assignee: DEEPX CO., LTD.
    Inventors: Lok Won Kim, Ha Joon Yu
  • Publication number: 20260154956
    Abstract: An image processing method is disclosed. The method includes receiving an input image including at least one object, and classifying the at least one object in the input image using a first model based on an artificial neural network trained to classify objects into one of a plurality of predetermined categories. At least one second model corresponding to the classified category of the at least one object is determined from among a plurality of second models, each of which is based on an artificial neural network trained to output a specialized processing applied image specific to a respective category. An output image is obtained by inputting the input image, or a region thereof corresponding to the at least one object, into the determined at least one second model.
    Type: Application
    Filed: January 23, 2026
    Publication date: June 4, 2026
    Applicant: DEEPX CO., LTD.
    Inventors: Lok Won KIM, Shin Woo JEON
  • Patent number: 12646584
    Abstract: A neural processing unit (NPU) is capable of testing a component of the NPU in a running system, i.e., during runtime. The NPU includes a plurality of functional components, each of which includes an electronic circuit; at least one wrapper connected to at least one of the functional components; and an in-system component tester (ICT). The ICT performs a selection of one of the at least one functional component, in an idle state, as a component under test (CUT) and performs a test, via the at least one wrapper, of the selected functional component. The ICT may monitor states of the plurality of the functional components via the at least one wrapper, stop the test based on a detection of a collision due to an access to the selected functional component, and return a connection of the selected functional component to the at least one wrapper according to the stop.
    Type: Grant
    Filed: April 5, 2024
    Date of Patent: June 2, 2026
    Assignee: DEEPX CO., LTD.
    Inventors: Lok Won Kim, Jeong Kyun Yim
  • Publication number: 20260148046
    Abstract: A neural processing unit may be provided. The neural processing unit may comprise a controller circuit configured to select an activation function processing method among a first method or a second method, according to an activation function included in a neural network model, a programmed activation function execution unit (PAFE unit) configured to execute a programmed activation function (PAF) that approximate the activation function and output a first activation value, and a converter circuit configured to convert the first activation value and output a second activation value. In the first method, only the PAFE unit may operate. In the second method, both the PAFE unit and the converter may operate.
    Type: Application
    Filed: August 13, 2025
    Publication date: May 28, 2026
    Inventors: Jin Ung JEONG, Lok Won KIM, Hyung Jin CHUN
  • Patent number: 12626112
    Abstract: A neural processing unit (NPU) includes an internal memory storing information on combinations of a plurality of artificial neural network (ANN) models, the plurality of ANN models including first and second ANN models; a plurality of processing elements (PEs) to process first operations and second operations of the plurality of ANN models in sequence or in parallel, the plurality of PEs including first and second groups of PEs; and a scheduler to allocate to the first group of PEs a part of the first operations for the first ANN model and to allocate to the second group of PEs a part of the second operations for the second ANN model, based on an instruction related to information on an operation sequence of the plurality of ANN models or further based on ANN data locality information. The first and second operations may be performed in parallel or in a time division.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: May 12, 2026
    Assignee: DEEPX CO., LTD.
    Inventor: Lok Won Kim
  • Publication number: 20260127432
    Abstract: A heterogeneous processor includes a first processor and a second processor of a different type. The heterogeneous processor operates in either a low-power mode or a full-power mode. The first processor is configured to operate in the low-power mode, process sensing data from a sensor using a trained neural network model, and generate a wake-up signal when an output of the trained neural network model satisfies a predefined criterion. The wake-up signal is provided to the second processor during the low-power mode. The second processor remains in a powered-down state during the low-power mode and transitions to the full-power mode in response to the wake-up signal.
    Type: Application
    Filed: December 19, 2025
    Publication date: May 7, 2026
    Inventor: Lok Won KIM
  • Publication number: 20260127439
    Abstract: A method may comprise receiving a first neural network (NN) model including one or more functions; generating a second NN model in a form of directed acyclic graph (DAG) including one or more graph modules by converting the one or more functions; calculating one or more scale values by obtaining maximum and minimum values of parameters input to the one or more graph modules; updating the parameters based on the one or more scale values; and generating a third NN model, in a form of machine code executable on a particular neural processing unit, including the updated parameters.
    Type: Application
    Filed: January 2, 2026
    Publication date: May 7, 2026
    Inventors: Lok Won KIM, Jang Min SON, You Jun KIM, Bum Jun JUNG
  • Publication number: 20260116431
    Abstract: A neural processing unit (NPU) includes a controller including a scheduler, the controller configured to receive from a compiler a machine code of an artificial neural network (ANN) including a fusion ANN, the machine code including data locality information of the fusion ANN, and receive heterogeneous sensor data from a plurality of sensors corresponding to the fusion ANN; at least one processing element configured to perform fusion operations of the fusion ANN including a convolution operation and at least one special function operation; a special function unit (SFU) configured to perform a special function operation of the fusion ANN; and an on-chip memory configured to store operation data of the fusion ANN, wherein the schedular is configured to control the at least one processing element and the on-chip memory such that all operations of the fusion ANN are processed in a predetermined sequence according to the data locality information.
    Type: Application
    Filed: December 24, 2025
    Publication date: April 30, 2026
    Inventor: Lok Won KIM
  • Publication number: 20260111947
    Abstract: A method for providing shopping information using an electronic device is disclosed. The method includes inputting a product image acquired via a camera module into an AI recognition model including an artificial neural network to obtain recognition results, and determining whether product information is recognized from the product image. When the AI recognition model fails to recognize the product information, a user input interface is displayed together with recognition failure information on a display module. User input data is received through the user input interface, and the product information is determined based on the received user input data. A query based on the product information is transmitted to a server via a communication module, and shopping information corresponding to the transmitted query is received from the server and displayed on the display module.
    Type: Application
    Filed: December 18, 2025
    Publication date: April 23, 2026
    Applicant: DEEPX CO., LTD.
    Inventor: Lok Won KIM
  • Publication number: 20260104820
    Abstract: According to an example of the present disclosure, a system is provided. A system may include a processor configured to output a memory control signal including an artificial neural network data locality, and a memory controller configured to receive the memory control signal from the processor and control a main memory in which data of an artificial neural network model corresponding to the artificial neural network data locality, is stored.
    Type: Application
    Filed: December 14, 2025
    Publication date: April 16, 2026
    Inventor: Lok Won KIM
  • Patent number: 12594965
    Abstract: A neural processing unit (NPU) includes a controller including a scheduler, the controller configured to receive from a compiler a machine code of an artificial neural network (ANN) including a fusion ANN, the machine code including data locality information of the fusion ANN, and receive heterogeneous sensor data from a plurality of sensors corresponding to the fusion ANN; at least one processing element configured to perform fusion operations of the fusion ANN including a convolution operation and at least one special function operation; a special function unit (SFU) configured to perform a special function operation of the fusion ANN; and an on-chip memory configured to store operation data of the fusion ANN, wherein the scheduler is configured to control the at least one processing element and the on-chip memory such that all operations of the fusion ANN are processed in a predetermined sequence according to the data locality information.
    Type: Grant
    Filed: July 19, 2024
    Date of Patent: April 7, 2026
    Assignee: DEEPX CO., LTD.
    Inventor: Lok Won Kim
  • Publication number: 20260087336
    Abstract: A neural processing unit (NPU) includes an internal memory storing information on combinations of a plurality of artificial neural network (ANN) models, the plurality of ANN models including first and second ANN models; a plurality of processing elements (PEs) to process first operations and second operations of the plurality of ANN models in sequence or in parallel, the plurality of PEs including first and second groups of PEs; and a scheduler to allocate to the first group of PEs a part of the first operations for the first ANN model and to allocate to the second group of PEs a part of the second operations for the second ANN model, based on an instruction related to information on an operation sequence of the plurality of ANN models or further based on ANN data locality information. The first and second operations may be performed in parallel or in a time division.
    Type: Application
    Filed: October 2, 2025
    Publication date: March 26, 2026
    Inventor: Lok Won KIM
  • Publication number: 20260087337
    Abstract: A neural processing unit (NPU) includes an internal memory storing information on combinations of a plurality of artificial neural network (ANN) models, the plurality of ANN models including first and second ANN models; a plurality of processing elements (PEs) to process first operations and second operations of the plurality of ANN models in sequence or in parallel, the plurality of PEs including first and second groups of PEs; and a scheduler to allocate to the first group of PEs a part of the first operations for the first ANN model and to allocate to the second group of PEs a part of the second operations for the second ANN model, based on an instruction related to information on an operation sequence of the plurality of ANN models or further based on ANN data locality information. The first and second operations may be performed in parallel or in a time division.
    Type: Application
    Filed: October 2, 2025
    Publication date: March 26, 2026
    Inventor: Lok Won KIM