Abstract: Systems, devices, and methods related to or that employ chalcogenide memory components and compositions are described. A component of a memory cell, such as a selector device, storage device, or self-selecting memory device, may be made of a chalcogenide material composition. A chalcogenide material may have a composition that includes one or more elements from the boron group, such as boron, aluminum, gallium, indium, or thallium. The chalcogenide material, for instance, may have a composition of selenium, germanium, and at least one of boron, aluminum, gallium, indium, or thallium. The chalcogenide material may in some cases also include arsenic, but may in some cases lack arsenic.

Abstract: An example three-dimensional (3-D) memory array includes a substrate material including a plurality of conductive contacts arranged in a staggered pattern and a plurality of planes of a conductive material separated from one another by a first insulation material formed on the substrate material. Each of the plurality of planes of the conductive material includes a plurality of recesses formed therein. A second insulation material is formed in a serpentine shape through the insulation material and the conductive material. A plurality of conductive pillars are arranged to extend substantially perpendicular to the plurality of planes of the conductive material and the substrate and each respective conductive pillar is coupled to a different respective one of the conductive contacts. A chalcogenide material is formed in the plurality of recesses such that the chalcogenide material in each respective recess is formed partially around one of the plurality of conductive pillars.

Abstract: Methods, systems, and devices for self-selecting memory with horizontal access lines are described. A memory array may include first and second access lines extending in different directions. For example, a first access line may extend in a first direction, and a second access line may extend in a second direction. At each intersection, a plurality of memory cells may exist, and each plurality of memory cells may be in contact with a self-selecting material. Further, a dielectric material may be positioned between a first plurality of memory cells and a second plurality of memory cells in at least one direction. each cell group (e.g., a first and second plurality of memory cells) may be in contact with one of the first access lines and second access lines, respectively.

Abstract: Systems, devices, and methods related to or that employ chalcogenide memory components and compositions are described. A component of a memory cell, such as a selector device, storage device, or self-selecting memory device, may be made of a chalcogenide material composition. A chalcogenide material may have a composition that includes one or more elements from the boron group, such as boron, aluminum, gallium, indium, or thallium. The chalcogenide material, for instance, may have a composition of selenium, germanium, and at least one of boron, aluminum, gallium, indium, or thallium. The chalcogenide material may in some cases also include arsenic, but may in some cases lack arsenic.

Abstract: A self-selecting memory cell may be composed of a memory material that changes threshold voltages based on the polarity of the voltage applied across it. Such a memory cell may be formed at the intersection of a conductive pillar and electrode plane in a memory array. A dielectric material may be formed between the memory material of the memory cell and the corresponding electrode plane. The dielectric material may form a barrier that prevents harmful interactions between the memory material and the material that makes up the electrode plane. In some cases, the dielectric material may also be positioned between the memory material and the conductive pillar to form a second dielectric barrier. The second dielectric barrier may increase the symmetry of the memory array or prevent harmful interactions between the memory material and an electrode cylinder or between the memory material and the conductive pillar.

Abstract: An example three-dimensional (3-D) memory array includes a substrate material including a plurality of conductive contacts arranged in a staggered pattern and a plurality of planes of a conductive material separated from one another by a first insulation material formed on the substrate material. Each of the plurality of planes of the conductive material includes a plurality of recesses formed therein. A second insulation material is formed in a serpentine shape through the insulation material and the conductive material. A plurality of conductive pillars are arranged to extend substantially perpendicular to the plurality of planes of the conductive material and the substrate and each respective conductive pillar is coupled to a different respective one of the conductive contacts. A chalcogenide material is formed in the plurality of recesses such that the chalcogenide material in each respective recess is formed partially around one of the plurality of conductive pillars.

Abstract: An example three-dimensional (3-D) memory array includes a substrate material including a plurality of conductive contacts arranged in a staggered pattern and a plurality of planes of a conductive material separated from one another by a first insulation material formed on the substrate material. Each of the plurality of planes of the conductive material includes a plurality of recesses formed therein. A second insulation material is formed in a serpentine shape through the insulation material and the conductive material. A plurality of conductive pillars are arranged to extend substantially perpendicular to the plurality of planes of the conductive material and the substrate and each respective conductive pillar is coupled to a different respective one of the conductive contacts. A chalcogenide material is formed in the plurality of recesses such that the chalcogenide material in each respective recess is formed partially around one of the plurality of conductive pillars.

Abstract: A memory cell can include a chalcogenide material having a narrowed end. A conductive material can be positioned at the narrowed end of the chalcogenide material. A dielectric barrier layer can be disposed between the conductive material and the narrowed end of the chalcogenide material. A dielectric spacer material can be positioned along a narrowed segment of the chalcogenide material.

Abstract: Methods, systems, and devices for self-selecting memory with horizontal access lines are described. A memory array may include first and second access lines extending in different directions. For example, a first access line may extend in a first direction, and a second access line may extend in a second direction. At each intersection, a plurality of memory cells may exist, and each plurality of memory cells may be in contact with a self-selecting material (SSM). Further, a dielectric material may be positioned between a first plurality of memory cells and a second plurality of memory cells in at least one direction. each cell group (e.g., a first and second plurality of memory cells) may be in contact with one of the first access lines and second access lines, respectively.

Abstract: The present disclosure includes three dimensional memory arrays. An embodiment includes a first plurality of conductive lines separated from one another by an insulation material, a second plurality of conductive lines arranged to extend substantially perpendicular to and pass through the first plurality of conductive lines and the insulation material, and a storage element material formed between the first and second plurality of conductive lines where the second plurality of conductive lines pass through the first plurality of conductive lines. The storage element material is between and in direct contact with a first portion of each respective one of the first plurality of conductive lines and a portion of a first one of the second plurality of conductive lines, and a second portion of each respective one of the first plurality of conductive lines and a portion of a second one of the second plurality of conductive lines.

Abstract: A self-selecting memory cell may be composed of a memory material that changes threshold voltages based on the polarity of the voltage applied across it. Such a memory cell may be formed at the intersection of a conductive pillar and electrode plane in a memory array. A dielectric material may be formed between the memory material of the memory cell and the corresponding electrode plane. The dielectric material may form a barrier that prevents harmful interactions between the memory material and the material that makes up the electrode plane. In some cases, the dielectric material may also be positioned between the memory material and the conductive pillar to form a second dielectric barrier. The second dielectric barrier may increase the symmetry of the memory array or prevent harmful interactions between the memory material and an electrode cylinder or between the memory material and the conductive pillar.

Abstract: The present disclosure includes three dimensional memory arrays. An embodiment includes a first plurality of conductive lines separated from one another by an insulation material, a second plurality of conductive lines arranged to extend substantially perpendicular to and pass through the first plurality of conductive lines and the insulation material, and a storage element material formed between the first and second plurality of conductive lines where the second plurality of conductive lines pass through the first plurality of conductive lines. The storage element material is between and in direct contact with a first portion of each respective one of the first plurality of conductive lines and a portion of a first one of the second plurality of conductive lines, and a second portion of each respective one of the first plurality of conductive lines and a portion of a second one of the second plurality of conductive lines.

Abstract: Disclosed herein is a memory cell including a memory element and a selector device. Data may be stored in both the memory element and selector device. The memory cell may be programmed by applying write pulses having different polarities and magnitudes. Different polarities of the write pulses may program different logic states into the selector device. Different magnitudes of the write pulses may program different logic states into the memory element. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities and magnitudes of the write pulses.

Abstract: Disclosed herein is a memory cell including a memory element and a selector device. Data may be stored in both the memory element and selector device. The memory cell may be programmed by applying write pulses having different polarities and magnitudes. Different polarities of the write pulses may program different logic states into the selector device. Different magnitudes of the write pulses may program different logic states into the memory element. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities and magnitudes of the write pulses.

Abstract: A self-selecting memory cell may be composed of a memory material that changes threshold voltages based on the polarity of the voltage applied across it. Such a memory cell may be formed at the intersection of a conductive pillar and electrode plane in a memory array. A dielectric material may be formed between the memory material of the memory cell and the corresponding electrode plane. The dielectric material may form a barrier that prevents harmful interactions between the memory material and the material that makes up the electrode plane. In some cases, the dielectric material may also be positioned between the memory material and the conductive pillar to form a second dielectric barrier. The second dielectric barrier may increase the symmetry of the memory array or prevent harmful interactions between the memory material and an electrode cylinder or between the memory material and the conductive pillar.

Abstract: Methods, systems, and devices for self-selecting memory with horizontal access lines are described. A memory array may include first and second access lines extending in different directions. For example, a first access line may extend in a first direction, and a second access line may extend in a second direction. At each intersection, a plurality of memory cells may exist, and each plurality of memory cells may be in contact with a self-selecting material (SSM). Further, a dielectric material may be positioned between a first plurality of memory cells and a second plurality of memory cells in at least one direction each cell group (e.g., a first and second plurality of memory cells) may be in contact with one of the first access lines and second access lines, respectively.

Abstract: Systems, devices, and methods related to or that employ chalcogenide memory components and compositions are described. A component of a memory cell, such as a selector device, storage device, or self-selecting memory device, may be made of a chalcogenide material composition. A chalcogenide material may have a composition that includes one or more elements from the boron group, such as boron, aluminum, gallium, indium, or thallium. The chalcogenide material, for instance, may have a composition of selenium, germanium, and at least one of boron, aluminum, gallium, indium, or thallium. The chalcogenide material may in some cases also include arsenic, but may in some cases lack arsenic.

Abstract: The present disclosure includes three dimensional memory arrays. An embodiment includes a first plurality of conductive lines separated from one another by an insulation material, a second plurality of conductive lines arranged to extend substantially perpendicular to and pass through the first plurality of conductive lines and the insulation material, and a storage element material formed between the first and second plurality of conductive lines where the second plurality of conductive lines pass through the first plurality of conductive lines. The storage element material is between and in direct contact with a first portion of each respective one of the first plurality of conductive lines and a portion of a first one of the second plurality of conductive lines, and a second portion of each respective one of the first plurality of conductive lines and a portion of a second one of the second plurality of conductive lines.

Abstract: A self-selecting memory cell may be composed of a memory material that changes threshold voltages based on the polarity of the voltage applied across it. Such a memory cell may be formed at the intersection of a conductive pillar and electrode plane in a memory array. A dielectric material may be formed between the memory material of the memory cell and the corresponding electrode plane. The dielectric material may form a barrier that prevents harmful interactions between the memory material and the material that makes up the electrode plane. In some cases, the dielectric material may also be positioned between the memory material and the conductive pillar to form a second dielectric barrier. The second dielectric barrier may increase the symmetry of the memory array or prevent harmful interactions between the memory material and an electrode cylinder or between the memory material and the conductive pillar.

Abstract: A memory cell can include a chalcogenide material having a narrowed end. A conductive material can be positioned at the narrowed end of the chalcogenide material. A dielectric barrier layer can be disposed between the conductive material and the narrowed end of the chalcogenide material. A dielectric spacer material can be positioned along a narrowed segment of the chalcogenide material.