Abstract: Methods and systems are provided for associating objects in a database. An exemplary method involves identifying one or more objects in the database that are likely to be related to a first object in the database that is based on data obtained from a local application associated with a user and displaying the identified objects on a client device associated with the user. In exemplary embodiments, the identified objects are displayed in response to selection of a graphical user interface element enabling indication of a second object from among the one or more objects, wherein the first object is associated with the second object in the database after receiving indication of the second object. In one or more exemplary embodiments, the database is a multi-tenant database in a multi-tenant system providing instances of a virtual application to multiple tenants.

Abstract: A semiconductor memory device includes a memory array, a row selection circuit and a bit line selection circuit. The memory array is composed of a plurality of cell units, wherein each cell unit has memory cells connected in series. The row selection circuit selects the memory cells in a row direction of the cell units, and the bit line selection circuit selects a bit line from an even bit line and an odd bit line coupled to the cell units. The bit line selection circuit includes a first selection part including selection transistors for selectively coupling the even or odd bit line to a sensor circuit and a second selection part including bias transistors for selectively coupling the even or odd bit line to a voltage source providing biases, wherein the bias transistors and the memory cells are formed in a common well.

Abstract: A method of fabricating a memory is provided. A substrate including a memory region and a periphery region is provided. A plurality of gates each having spacers is formed on the substrate. A plurality of openings is formed between the gates in the memory region. A first material layer is formed in the memory region to cover the gates and fill the openings. A barrier layer is formed on the substrate to cover the gates in the periphery region and the first material layer in the memory region. A second material layer is formed on the substrate in the periphery region to cover the barrier layer in the periphery region. The barrier layer covering the first material layer is removed. The first material layer is partially removed to form a plurality of second openings. Each second opening is disposed on a top of the gate in the memory region.

Abstract: A method of fabricating a memory is provided. A substrate comprising a memory region and a periphery region is provided. A plurality of gates is formed on the substrate and a first spacer is formed on a sidewall of each gate, where a plurality of openings is formed between the gates in the memory region. A first material layer formed on the substrate in the memory region covers the gates in the memory region and fills the openings. A process is performed to the periphery region. The first material layer is partially removed to form a first pattern in each opening respectively. A second material layer formed on the substrate covers the memory region and the periphery region to expose the first patterns. The first patterns are removed to form a plurality of contact openings in the second material layer. The contact plugs are formed in the contact openings.

Abstract: A non-volatile memory is described, which includes gate structures, doped regions, second spacers and contact plugs. The gate structures are disposed on the substrate, each of which includes a control gate and a gate dielectric layer. The control gates are disposed on the substrate, and two first spacers are deployed at both sides of each control gate. The gate dielectric layers are disposed between the control gates and the substrate, respectively. Each of the doped regions is formed in the substrate between two adjacent gate structures. The second spacers are disposed on the sidewalls of the gate structures. The contact plugs are formed between two adjacent second spacers, respectively.

Abstract: In accordance with embodiments, there are provided mechanisms and methods for associating a record with an account from an on-demand database system. These mechanisms and methods for associating a record with an account from an on-demand database system can enable improved synchronization between an on-demand database system and a software element separate from the on-demand database system, etc.

Abstract: Compounds having a structure of Formula (A) are provided. Uses of such compounds for treatment of various indications, including prostate cancer as well as methods of treatment involving such compounds are provided. Uses of compounds having a structure of Formula (F) for treatment of various indications, including prostate cancer as well as methods of treatment involving such compounds are also provided.

Abstract: A method of fabricating a memory is provided. A substrate comprising a memory region and a periphery region is provided. A plurality of gates is formed on the substrate and a first spacer is formed on a sidewall of each gate, where a plurality of openings is formed between the gates in the memory region. A first material layer formed on the substrate in the memory region covers the gates in the memory region and fills the openings. A process is performed to the periphery region. The first material layer is partially removed to form a first pattern in each opening respectively. A second material layer formed on the substrate covers the memory region and the periphery region to expose the first patterns. The first patterns are removed to form a plurality of contact openings in the second material layer. The contact plugs are formed in the contact openings.

Abstract: Methods for patent summarization are disclosed. A digital file comprising an issued patent document or a published application is acquired. At least one claim string is acquired from the digital file. Multiple elements are acquired from the claim string. A part-of relationship architecture among a portion of the elements is generated according to the claim string. At least one is-a relationship for at least one of the elements is generated according to the claim string. At least one association relationship for at least one of the elements is generated according to the claim string. The part-of relationship architecture, as-is relationship and association relationship are displayed.

Abstract: In a method of fabricating a flash memory, a substrate with isolation structures formed therein and a dielectric layer and a floating gate formed thereon between isolation structures is provided. A mask layer is formed on the substrate, covering the isolation structures in a periphery region and the isolation structure in a cell region adjacent to the periphery region. The isolation structures in the cell region not covered by the mask layer are partially removed. Therefore, a first height difference is between surfaces of the isolation structures in the periphery region and a surface of the dielectric layer, and between a surface of the isolation structure in the cell region adjacent to the periphery region and the surface of the dielectric layer. A second height difference smaller than the first height difference is between surfaces of other isolation structures in the cell region and the surface of the dielectric layer.

Abstract: In a method of fabricating a flash memory, a substrate with isolation structures formed therein and a dielectric layer and a floating gate formed thereon between isolation structures is provided. A mask layer is formed on the substrate, covering the isolation structures in a periphery region and the isolation structure in a cell region adjacent to the periphery region. The isolation structures in the cell region not covered by the mask layer are partially removed. Therefore, a first height difference is between surfaces of the isolation structures in the periphery region and a surface of the dielectric layer, and between a surface of the isolation structure in the cell region adjacent to the periphery region and the surface of the dielectric layer. A second height difference smaller than the first height difference is between surfaces of other isolation structures in the cell region and the surface of the dielectric layer.

Abstract: A non-volatile memory is described, which includes gate structures, doped regions, second spacers and contact plugs. The gate structures are disposed on the substrate, each of which includes a control gate and a gate dielectric layer. The control gates are disposed on the substrate, and two first spacers are deployed at both sides of each control gate. The gate dielectric layers are disposed between the control gates and the substrate, respectively. Each of the doped regions is formed in the substrate between two adjacent gate structures. The second spacers are disposed on the sidewalls of the gate structures. The contact plugs are formed between two adjacent second spacers, respectively.

Abstract: The present invention relates to oligonucleotide sequences for amplification primers and detection probes and to their use in nucleic acid amplification methods for the detection of HBV in biological samples. In particular, oligonucleotide sequences are provided for the sensitive qualitative or quantitative detection of all eight HBV genotypes. The invention also provides oligonucleotide primer sets and primer/probe sets in the form of kits for the diagnosis of HBV infection.

Abstract: A memory cell for an electrically writeable and erasable memory medium as well as a memory medium thereof is provided. The memory cell comprises a data recording element, the data recording element has a plurality of multiple-layer structure disposed one on top of another; each the multiple-layer structure comprising a plurality of sequentially disposed individual layers. At least one of the plurality of individual layers is capable of changing phase between a crystalline state and an amorphous state in response to an electrical pulse, one of the plurality of individual layers having at least one atomic element which is absent from other one of the plurality of individual layers, and the plurality of multiple-layer structure is of a superlattice-like structure to lower a heat diffusion out of the data recording element to shorten a phase change time of the respective individual layers.

Abstract: The present invention relates to oligonucleotide sequences for amplification primers and detection probes and their use in nucleic acid amplification methods for the specific detection of clinically relevant CYP2D6 polymorphisms, in particular CYP2D6 polymorphisms associated with adverse drug response. The oligonucleotide sequences are also provided assembled as kits that can be used to predict how an individual will respond to drugs or other xenobiotic compounds that are metabolized, at least in part, by CYP2D6.

Abstract: The present invention relates to oligonucleotide sequences for amplification primers and detection probes and their use in nucleic acid amplification methods for the specific detection of clinically relevant CYP2C9 polymorphisms, in particular CYP2C9 polymorphisms associated with adverse drug response. The oligonucleotide sequences are also provided assembled as kits that can be used to predict how an individual will respond to drugs or other xenobiotic compounds that are metabolized, at least in part, by CYP2C9.

Abstract: The present invention provides a biomarker for detecting gastric diseases, especially gastric cancer selected from: a nucleic acid sequence of GroES, complementary strand, or derivatives thereof or an amino acid sequence of GroES, derivatives, fragments or variants thereof or antibodies against said amino acid sequences or combinations thereof, yet provides a kit for detecting gastric cancer by use of above-mentioned biomarkers and a detection method.

Abstract: An instant message is received from a first daemon corresponding to a first instant messaging application type originating with a first client, and transmits the instant message to a second daemon corresponding to a second instant messaging application type originating with a second client. A third daemon receives the instant message using communication protocol corresponding to the first instant messaging application type. A message switching unit acquires the second instant messaging application type corresponding to the third daemon identity, and acquires a second daemon identity. A fourth daemon transmits the instant message to the second daemon corresponding to the second daemon identity using communication protocol corresponding to the second instant messaging application type.

Abstract: Provided is a kinetic PCR (“kPCR”) assay for determining gene copy number of a target gene located on chromosome 17. The kPCR assay uses the MMP-28 gene located at the 17q11.2-17q12 loci as a control and thus, is capable of detecting gene copy number of any gene on chromosome 17 in both singleplex and multiplex format without the need for a standard curve. The kPCR assay is useful for determining the gene copy number of the HER2/neu gene located at loci 17q12-17q21.32, which is a requirement for determining if a breast cancer patient is a candidate for anti-HER2/neu gene therapy.

Abstract: The present invention provides a biomarker for detecting gastric diseases, especially gastric cancer selected from: a nucleic acid sequence of GroES, complementary strand, or derivatives thereof or an amino acid sequence of GroES, derivatives, fragments or variants thereof or antibodies against said amino acid sequences or combinations thereof, yet provides a kit for detecting gastric cancer by use of above-mentioned biomarkers and a detection method.