Abstract: The invention is notably directed to a method of in-memory processing, the aim of which is to perform matrix-vector calculations. The method relies on a device having a crossbar array structure (15). The latter includes N input lines (152) and M output lines (153), which are interconnected at cross-points defining N×M cells (155), where N?2 and M?2. The cells include respective memory systems, each designed to store K weights Wi,j,k, where K?2. Thus, the crossbar array structure includes N×M memory systems, which are capable of storing K sets of N×M weights. In order to perform multiply-accumulate (MAC) operations, the method first enables N×M active weights for the N×M cells by selecting, for each of the memory systems, a weight from its K weights and setting the selected weight as an active weight. Next, signals encoding a vector of N components are applied to the N input lines of the crossbar array structure. This causes the latter to perform MAC operations based on the vector and the N×M active weights.

Abstract: The present invention relates to a method of processing a workpiece comprising contacting a tool and a workpiece to effect a change in the shape of the workpiece, and applying a metalworking fluid to a surface area where the tool and the workpiece are in contact, where the metalworking fluid contains a propoxylate of the formula R—O—(C3H6O)n—H, where R is a branched C6 to C20 alkyl and n is from 3 to 30. The invention further relates to the metalworking fluid, and to a use of the propoxylate as additive in metalworking fluids.

Abstract: The present invention relates to a monosaccharide-tagged nano-liposome, which is characterized that the targeting monosaccharide is conjugated to cholesterol and the monosaccharide-conjugated cholesterol is incorporate into the phospholipid bilayer. The nano-liposome of present invention exhibits the ability to carry the loaded drug to target cells, such as cancer cells and cancer stem cells in a tumor tissue, and may be internalized by endocytosis to produce direct cytotoxicity or suppress stemness gene expression, so as to avoid toxicity to normal cells and effectively improve the therapeutic effect of cancer clinical medication and radiation therapy.

Abstract: The present invention relates to a method of processing a workpiece comprising contacting a tool and a workpiece to effect a change in the shape of the workpiece, and applying a metalworking fluid to a surface area where the tool and the workpiece are in contact, where the metalworking fluid contains a propoxylate of the formula R—O—(C3H6O)n—H, where R is a branched C6 to C20 alkyl and n is from 3 to 30. The invention further relates to the metalworking fluid, and to a use of the propoxylate as additive in metalworking fluids.

Abstract: A semiconductor package includes a build-up structure; a semiconductor disposed on the build-up structure in a flip-chip manner and having a plurality of bumps penetrating therethrough; an electronic element disposed on the semiconductor chip; and an encapsulant formed on the build-up structure and encapsulating the semiconductor chip and the electronic element, thereby improving the product yield and the overall heat dissipating efficiency.

Abstract: An interposer is provided which includes: a substrate having a first surface with a plurality of first conductive pads and a second surface opposite to the first surface, the second surface having a plurality of second conductive pads; a plurality of conductive through holes penetrating the first and second surfaces of the substrate and electrically connecting the first and second conductive pads; and a first removable electrical connection structure formed on the first surface and electrically connecting a portion of the first conductive pads so as to facilitate electrical testing of the interposer.

Abstract: An electronic package is provided, which includes: a first circuit structure; a plurality of first electronic elements disposed on a surface of the first circuit structure; at least a first conductive element formed on the surface of the first circuit structure; and a first encapsulant formed on the surface of the first circuit structure and encapsulating the first electronic elements and the first conductive element, with a portion of the first conductive element exposed from the first encapsulant. By directly disposing the electronic elements having high I/O functionality on the circuit structure, the present disclosure eliminates the need of a packaging substrate having a core layer, thereby reducing the thickness of the electronic package. The present disclosure further provides a method for fabricating the electronic package.

Abstract: A semiconductor package includes a build-up structure; a semiconductor disposed on the build-up structure in a flip-chip manner and having a plurality of bumps penetrating therethrough; an electronic element disposed on the semiconductor chip; and an encapsulant formed on the build-up structure and encapsulating the semiconductor chip and the electronic element, thereby improving the product yield and the overall heat dissipating efficiency.

Abstract: A semiconductor package includes a build-up structure; a semiconductor disposed on the build-up structure in a flip-chip manner and having a plurality of bumps penetrating therethrough; an electronic element disposed on the semiconductor chip; and an encapsulant formed on the build-up structure and encapsulating the semiconductor chip and the electronic element, thereby improving the product yield and the overall heat dissipating efficiency.

Abstract: An electronic module is provided, including an electronic element and a strengthening layer formed on a side surface of the electronic element but not formed on an active surface of the electronic element so as to strengthen the structure of the electronic module. Therefore, the electronic element is prevented from being damaged when the electronic module is picked and placed.

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

Abstract: A package structure is provided, which includes: a dielectric layer having opposite first and second surfaces; a circuit sub-layer formed in the dielectric layer; an electronic element disposed on the first surface of the dielectric layer and electrically connected to the circuit sub-layer; a plurality of conductive posts formed on the first surface of the dielectric layer and electrically connected to the circuit sub-layer; and an encapsulant formed on the first surface of the dielectric layer and encapsulating the electronic element and the conductive posts. Upper surfaces of the conductive posts are exposed from the encapsulant so as to allow another electronic element to be disposed on the conductive posts and electrically connected to the circuit sub-layer through the conductive posts, thereby overcoming the conventional drawback that another electronic element can only be disposed on a lower side of a package structure and improving the functionality of the package structure.

Abstract: An electronic package is provided, which includes: a first circuit structure; a plurality of first electronic elements disposed on a surface of the first circuit structure; at least a first conductive element formed on the surface of the first circuit structure; and a first encapsulant formed on the surface of the first circuit structure and encapsulating the first electronic elements and the first conductive element, with a portion of the first conductive element exposed from the first encapsulant. By directly disposing the electronic elements having high I/O functionality on the circuit structure, the present disclosure eliminates the need of a packaging substrate having a core layer, thereby reducing the thickness of the electronic package. The present disclosure further provides a method for fabricating the electronic package.

Abstract: An electronic package is provided, including: a circuit structure having opposite first and second surfaces, wherein first and second circuit layers are formed on the first and second surfaces of the circuit structure, respectively, the first circuit layer having a minimum trace width less than that of the second circuit layer; a separation layer formed on the first surface of the circuit structure; a metal layer formed on the separation layer and electrically connected to the first circuit layer; an electronic element disposed on the first surface of the circuit structure and electrically connected to the metal layer; and an encapsulant formed on the circuit structure to encapsulate the electronic element. By disposing the electronic element having high I/O function on the circuit structure, the invention eliminates the need of a packaging substrate having a core layer and thus reduces the thickness of the electronic package.

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

Abstract: An electronic device includes a circuit board having a plurality of conductive contacts, and an electronic component disposed on the circuit board and having a plurality of electrode terminals. The conductive contacts include a plurality of solder pads spaced apart from each other, and are coupled to the electrode terminals, respectively. The stress generated by any one of the electrode terminals is distributed to all of the solder pads so as to prevent the electronic component from being offset during an assembly process.

Abstract: An electronic package is provided, which includes: a first circuit structure; a plurality of first electronic elements disposed on a surface of the first circuit structure; at least a first conductive element formed on the surface of the first circuit structure; and a first encapsulant formed on the surface of the first circuit structure and encapsulating the first electronic elements and the first conductive element, with a portion of the first conductive element exposed from the first encapsulant. By directly disposing the electronic elements having high I/O functionality on the circuit structure, the present disclosure eliminates the need of a packaging substrate having a core layer, thereby reducing the thickness of the electronic package. The present disclosure further provides a method for fabricating the electronic package.